{ "count" : 87895, "data" : [ { "id" : "6a216deb74d8ee00a0c0c4a3", "title" : "SMTS Analog Design Engineer, Mixed-Signal PHY (Clocking & High-Speed I/O)", "company" : "Micron Technology", "industry" : "Semiconductor", "salary" : { "min" : 159000.0, "max" : 347000.0, "currency" : "USD", "frequency" : "yearly" }, "location" : "Boise, ID - Main Site", "locations" : [ "Boise, ID - Main Site", "United States of America" ], "timestamp" : "2026-06-05T07:11:58.079", "fingerprint" : "5e3a127091dbbdedda12a4298a41a3777e39ba6017b56f6a85138e3a56dcaae6", "source" : "workday", "language" : "en", "applyUrl" : "https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Principal-Analog-Design-Engineer---Mixed-Signal-PHY--Clocking---High-Speed-I-O-_JR99169", "externalId" : "JR99169", "industryFunction" : { }, "locationPoint" : "43.6135,-116.20345", "structuredLocations" : [ { "city" : "Boise", "state" : "Idaho", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "43.6166163,-116.2008860" } ], "locationText" : "Boise, Idaho, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Analog design, Mixed-Signal PHY, Clocking, High-Speed I/O, PLL, DLL, CDR, Transmitter design, Receiver design, Bias generation, Reference generation, Calibration architecture, CMOS nodes, HSpice, Monte Carlo, Mismatch analysis, Verilog-AMS", "professionalSkills" : [ "Circuit design", "Architecture definition", "Simulation", "Verification", "Silicon bring-up", "Design documentation" ], "hardSkillsList" : [ "Jitter analysis", "Phase noise", "Period jitter", "Cycle-to-cycle jitter", "Signal chain partitioning", "Power domain strategy", "Performance tradeoffs", "Area tradeoffs", "Power tradeoffs", "Yield sensitivity", "Analog trim loop" ], "softSkillsList" : [ "Cross-discipline collaboration" ], "hardSkills" : [ { "name" : "Jitter analysis", "level" : "intermediate" }, { "name" : "Phase noise", "level" : "intermediate" }, { "name" : "Period jitter", "level" : "intermediate" }, { "name" : "Cycle-to-cycle jitter", "level" : "intermediate" }, { "name" : "Signal chain partitioning", "level" : "intermediate" }, { "name" : "Power domain strategy", "level" : "intermediate" }, { "name" : "Performance tradeoffs", "level" : "intermediate" }, { "name" : "Area tradeoffs", "level" : "intermediate" }, { "name" : "Power tradeoffs", "level" : "intermediate" }, { "name" : "Yield sensitivity", "level" : "intermediate" }, { "name" : "Analog trim loop", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Cross-discipline collaboration" } ], "majorSkills" : "Clocking architecture, High-speed signaling, Analog design", "majorSkillsList" : [ "Clocking architecture", "High-speed signaling", "Analog design" ], "coreResponsibilities" : "Own circuit design, Develop architecture decisions, Develop simulation execution, Maintain simulation execution, Define interface specifications, Review custom analog layout, Support post-silicon characterization, Author block-level specifications, Author simulation summary reports, Author interface control documents", "teamCollaboration" : "Peer technical contributor; Cross-discipline collaboration", "domainKnowledge" : "High-speed interface; Memory and storage; Advanced CMOS nodes; Mixed-signal IC design; High-speed signaling; Die-to-die interconnects; SerDes interfaces; Short-reach interconnect standards; Chip-to-chip PHY architectures", "domainList" : [ "high-speed-interface", "memory-and-storage", "advanced-cmos-nodes", "mixed-signal-ic-design", "high-speed-signaling", "die-to-die-interconnects", "serdes-interfaces", "short-reach-interconnect-standards", "chip-to-chip-phy-architectures" ], "domainSpecificKnowledge" : [ "High-speed interface", "Memory and storage", "Advanced CMOS nodes", "Mixed-signal IC design", "High-speed signaling", "Die-to-die interconnects", "SerDes interfaces", "Short-reach interconnect standards", "Chip-to-chip PHY architectures" ], "toolProficiency" : [ "HSpice", "Verilog-AMS" ], "communicationSkills" : "Written communication; Interface control documents", "documentationSkills" : "Block-level specifications; Simulation summary reports; Interface control documents", "innovationCreativity" : "Push boundaries; Pathfinding team", "problemSolvingSkills" : "Root cause analysis; Performance delta identification", "outcomesObjectives" : "Prepare innovations for adoption; Validate boundaries with hardware data", "qualificationsBasic" : "BS, MS, or PhD in Electrical Engineering, 10+ years analog/mixed-signal IC design, At least one tape-out, Primary circuit ownership role, Deep expertise clocking circuit design, Transistor-level simulation skills, Solid understanding jitter analysis, Experience defining analog-digital interfaces, Ability to work effectively as peer, Written communication skills", "qualificationsPreferred" : "MS/PhD strongly preferred, Experience high-speed transmitter design, Experience high-speed receiver design, Familiarity die-to-die PHY architectures, Experience OTP/fuse-based calibration, Familiarity real-number modeling, Post-silicon characterization experience, Prior experience small team", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron's Interface Pathfinding team operates at the leading edge of that mission — driving performance-scaling innovation across circuits, signaling, packaging, and interconnects with a 3–5 year technology horizon. As a Principal Analog Design Engineer, you will be a core technical contributor on a small, senior team spanning analog design, layout, silicon characterization, digital design, and physical design — united around the goal of preparing high-speed interface innovations for high-confidence product adoption. The analog design scope is broad and deep, with clocking as a primary technical focus, but the program values engineers who bring perspective across the full signal chain. Key design domains include clocking architecture (PLL/DLL, clock distribution, jitter budgeting, clock recovery), transmitter design (high-speed output drivers, pre-emphasis, swing/impedance control), receiver design (sense amplifiers, CTLE/DFE equalization, samplers), bias and reference generation, and calibration architecture. The circuits are custom and original — this is not integration or maintenance work. The goal is to push the boundaries of what is possible in high-speed signaling and validate those boundaries with real hardware data. This is a long-term opportunity on an active program with real momentum — strong execution early is expected to lead to follow-on projects of increasing scope and complexity. **Responsibilities** * **Circuit Design:** Own the design of one or more custom analog blocks from specification through schematic, simulation, and layout review — with clocking (PLL, DLL, CDR) as the primary focus and transmitter/receiver circuits as valued secondary experience. * **Architecture Definition:** Contribute to top-level PHY analog architecture decisions — clocking topology, signal chain partitioning, power domain strategy, and performance/area/power tradeoffs. * **Simulation & Verification:** Develop and maintain transistor-level simulation testbenches; execute corner, Monte Carlo, and mismatch analysis to characterize design margin and yield sensitivity. * **Analog-Digital Interface:** Define clean interface specifications between custom analog blocks and the digital control wrapper — signal naming, timing contracts, and boundary constraint documentation in coordination with the Chip Lead. * **Layout Collaboration:** Work closely with the layout team to review and guide custom analog layout — matching, shielding, guard ring, and parasitic sensitivity for high-speed circuits. * **Silicon Bring-Up:** Support post-silicon characterization in the lab — correlating measured results to simulation, identifying root causes of performance delta, and extracting maximum learning from each hardware run. * **Design Documentation:** Author block-level specifications, simulation summary reports, and interface control documents that serve as the authoritative reference for the team and for follow-on program development. **Basic Qualifications** * BS, MS, or PhD in Electrical Engineering or related field (MS/PhD strongly preferred for this level) * 10+ years of analog/mixed-signal IC design experience with at least one tape-out in a primary circuit ownership role * Deep expertise in clocking circuit design — PLL, DLL, or CDR architecture and transistor-level implementation in advanced CMOS nodes * Strong transistor-level simulation skills using HSpice or equivalent; comfort with corner, Monte Carlo, and mismatch analysis for yield-aware design * Solid understanding of jitter analysis — phase noise, period jitter, cycle-to-cycle jitter, and their impact on high-speed link timing margins * Experience defining analog-digital interfaces in a mixed-signal environment — including timing contracts, reset/initialization sequencing, and digital control of analog parameters * Ability to work effectively as a peer technical contributor on a small team — comfortable with broad ownership, cross-discipline collaboration, and making design decisions with real consequences * Strong written communication skills — this role produces specifications and simulation reports, not just schematics **Preferred Qualifications** * Experience with high-speed transmitter design — output driver architectures, pre-emphasis, swing control, and impedance matching for multi-Gbps die-to-die or SerDes interfaces * Experience with high-speed receiver design — sense amplifiers, CTLE/DFE equalization, sampler design, and threshold calibration * Familiarity with die-to-die or chip-to-chip PHY architectures — UCIe, AIB, BoW, or proprietary short-reach interconnect standards * Experience with OTP/fuse-based calibration architectures and analog trim loop implementation * Familiarity with real-number modeling (RNM) or Verilog-AMS behavioral modeling for use in mixed-signal simulation environments * Post-silicon characterization experience — correlating simulation results to measured eye diagrams, BER curves, phase noise plots, and jitter histograms on real hardware * Prior experience in a small team or pathfinding environment where the analog architecture is not handed down but actively developed The US base salary range that Micron Technology estimates it could pay for this full-time position is: $159,000.00 - $347,000.00 a year Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on _[micron.com/careers/benefits](https://www.micron.com/careers/benefits)_. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your _**[**right to work click here.**](http://www.justice.gov/crt/worker-information)**_ To learn more about Micron, please visit _[micron.com/careers](https://www.micron.com/careers)_ US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at _[hrsupport_na @micron.com](mailto:hrsupport_na@micron.com)_ or 1-800-336-8918 (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert**:** Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.", "summaryDescription" : "SMTS Analog Design Engineer, Mixed-Signal PHY (Clocking & High-Speed I/O) at Micron Technology. Skills: Clocking architecture, High-speed signaling, Analog design. Own circuit design. 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System architects; Layout engineers; Cross-functional teams; System engineers; Device engineers; Packaging engineers; Product engineers", "domainKnowledge" : "Broadband analog; RF systems; High-speed systems; Mixed-signal systems; Communication systems; Computing systems; Graphene solutions; Photonic communication; High-throughput networks; Low-delay networks; CMOS device physics; FinFET device physics; High-frequency circuits; Analog circuit design; RF circuit design; High-speed circuit design; Mixed-signal circuit design; TIAs; LNAs; PLLs; SerDes; Optical interfaces", "domainList" : [ "broadband-analog", "rf-systems", "high-speed-systems", "mixed-signal-systems", "communication-systems", "computing-systems", "graphene-solutions", "photonic-communication", "high-throughput-networks", "low-delay-networks", "cmos-device-physics", "finfet-device-physics", "high-frequency-circuits", "analog-circuit-design", "rf-circuit-design", "high-speed-circuit-design", "mixed-signal-circuit-design", "tias", "lnas", "plls", "serdes", "optical-interfaces" ], "domainSpecificKnowledge" : [ "Broadband analog", "RF systems", "High-speed systems", "Mixed-signal systems", "Communication systems", "Computing systems", "Graphene solutions", "Photonic communication", "High-throughput networks", "Low-delay networks", "CMOS device physics", "FinFET device physics", "High-frequency circuits", "Analog circuit design", "RF circuit design", "High-speed circuit design", "Mixed-signal circuit design", "TIAs", "LNAs", "PLLs", "SerDes", "Optical interfaces" ], "toolProficiency" : [ "Cadence Virtuoso", "Spectre", "ADS", "HFSS" ], "documentationSkills" : "Document design decisions", "continuousLearning" : "Continuous learning; Professional development; Personal development", "innovationCreativity" : "Fundamental change; Make a difference", "problemSolvingSkills" : "Debugging; Data analysis", "qualificationsBasic" : "MSc or PhD in Electrical Engineering, 2–3 years industry experience, analog circuit design fundamentals, CMOS and/or FinFET device physics, high-frequency circuit behavior, high-speed or RF blocks experience, simulation, debugging, data-analysis, interpret PVT and Monte Carlo results", "qualificationsPreferred" : "equivalent hands-on research experience", "remoteFriendly" : true, "workSiteFlexibility" : "Onsite", "rawDescription" : "About us We see the semiconductor industry as a realm of possibility. We see opportunity. We see the profound impact that our graphene solutions will have in transforming the industry. We invite you to join us in driving change with our fundamentally human-centered approach, uniting bright minds around a shared vision. The vision is: Prove to everybody that you can make a fundamental change. Prove with your knowledge and skills how things can be done differently. Together, we can change the paradigm of how the world connects About our technology The semiconductor industry’s growing demand for more powerful chips with higher bandwidth and lower power finds its solution in our technology. We connect chips to high-throughput, low-delay computing networks. The key lies in harnessing the physical properties of graphene to combine electronic computing with photonic communication, allowing countless chips to interact almost as if they were one. Our graphene photonic innovation increases computing power and efficiency to a new order of magnitude In short, we connect chips to create powerful and energy-efficient networks, overcoming connectivity limitations in the semiconductor industry. We deliver the graphene solution The Role We are seeking an Analog / RF / High-Speed IC Design Engineer to support the design and validation of broadband analog, RF, and high-speed mixed-signal integrated circuit blocks for next-generation communication and computing systems. In this role, you will work closely with experienced designers, system architects, and layout engineers from concept through silicon bring-up. To join our team, you should be excited to: - Design, simulate, and optimize analog, RF, and mixed-signal circuit blocks including TIAs, high-speed drivers, LNAs, PLLs/oscillators, clock distribution and equalization circuits - Perform analyses using AC, transient, noise, jitter, linearity, stability, PVT, corner, and Monte Carlo simulations to optimize performance and robustness - Collaborate with layout engineers on parasitic-aware implementation and post-layout verification - Support silicon bring-up, lab characterization, debugging, and performance correlation versus simulation data - Work closely with cross-functional teams including system, device, packaging, and product engineering to define specifications, document and drive design decisions Your Qualifications - Strong analog fundamentals, passion for high-speed and RF systems, and the ability to translate theoretical concepts into robust silicon implementations - MSc or PhD in Electrical Engineering, Microelectronics, Physics, or a related field - Approximately 2–3 years of industry experience, or equivalent hands-on research experience in analog, RF, mixed-signal, or high-speed IC design - Strong understanding of analog circuit design fundamentals, including gain, bandwidth, noise, linearity, feedback, stability, and frequency response - Knowledge of CMOS and/or FinFET device physics and high-frequency circuit behavior - Experience with high-speed or RF blocks such as amplifiers, clocking circuits, SerDes, or optical interfaces. - Strong simulation, debugging, and data-analysis skills; able to interpret PVT and Monte Carlo results. - Experience with Cadence Virtuoso and Spectre - Proficiency in MATLAB and/or Python for modeling, data analysis, and automation - Knowledge of RF and electromagnetic simulation tools such as ADS, HFSS or equivalent - Experience with post-layout extraction and verification tools - Familiarity with high-speed lab test equipment and data-analysis workflows Our work culture People Over Processes. At Black Semiconductor, flexibility is key—we ensure work adapts to life, not the other way around. We champion work-life harmony, where careers are meaningful and enriching. Our processes are human-centric, allowing you to focus on what matters Let’s grow together. Your potential is our priority. We provide the autonomy to make a lasting impact and nurture your growth through a culture of continuous learning. We invest in your journey for professional and personal development Your Health and Future Matter. Your well-being is paramount. We offer a comprehensive benefits package with outstanding insurance, pension and virtual stock options for your mental, physical, and financial health. Your peace of mind is our priority - in the present and future We Live Openness. Collaboration and inclusivity are the cornerstones of our culture. We practice openness, fostering trust and respect. Individuality is our collective strength, fueling innovation and driving us forward We connect chips – and people. We encourage qualified individuals from any background to apply. We foster an inclusive and supportive work environment that values collaboration, innovation, and growth. Join our team and be part of an organization dedicated to making a difference in the industry Can you picture yourself in this Role and our Company? Let’s connect! If your application results in an employment relationship, your Applicant Data will be transferred to our personnel records and processed in accordance with applicable legal requirements; otherwise, your Applicant Data will be retained for up to six (6) months after completion of the recruitment process. Read more about our privacy policy here. https://www.blacksemi.com/privacy-policy", "summaryDescription" : "Analog / RF / High-Speed IC Design Engineer at blacksemi. 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"locations" : [ "San Diego, California, USA" ], "timestamp" : "2026-06-14T22:37:39.884", "fingerprint" : "45b8913df1d3089b3aca2c68296837c1c9f7c16fd0009c40540edb70d02b8a24", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/3123280/apply", "externalId" : "1eef0927-7c61-40f5-aadc-2aab28c2ba32", "industryFunction" : { }, "structuredLocations" : [ { "city" : "San Diego", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "32.7174202,-117.1627720" } ], "locationText" : "San Diego, California, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "Master's", "experienceMinYears" : 7, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "CMOS technologies, Matlab, Verilog-A, Python, Perl, SKILL", "professionalSkills" : [ "Product definition", "Product execution", "Product optimization", "Circuit architectures", "System performance", "Analog interface", "Digital interface", "Bench test plans", "Production test plans", "Volume production" ], "hardSkillsList" : [ "Mixed-signal design", "High-speed DACs", "High-speed ADCs", "Analog blocks", "Mixed-signal blocks", "Circuit layout", "Parasitic extraction", "Simulation", "SERDES", "Data converters", "Clock distribution", "Jitter concepts", "Phase noise concepts" ], "softSkillsList" : [ "Responsive" ], "hardSkills" : [ { "name" : "Mixed-signal design", "level" : "intermediate" }, { "name" : "High-speed DACs", "level" : "intermediate" }, { "name" : "High-speed ADCs", "level" : "intermediate" }, { "name" : "Analog blocks", "level" : "intermediate" }, { "name" : "Mixed-signal blocks", "level" : "intermediate" }, { "name" : "Circuit layout", "level" : "intermediate" }, { "name" : "Parasitic extraction", "level" : "intermediate" }, { "name" : "Simulation", "level" : "intermediate" }, { "name" : "SERDES", "level" : "intermediate" }, { "name" : "Data converters", "level" : "intermediate" }, { "name" : "Clock distribution", "level" : "intermediate" }, { "name" : "Jitter concepts", "level" : "intermediate" }, { "name" : "Phase noise concepts", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Responsive" } ], "majorSkills" : "Mixed-signal silicon, Data converters, SERDES, CMOS technologies", "majorSkillsList" : [ "Mixed-signal silicon", "Data converters", "SERDES", "CMOS technologies" ], "coreResponsibilities" : "Design innovative product solutions, Drive key aspects of product definition, Drive key aspects of product execution, Drive key aspects of product optimization, Architectural definition, Design mixed-signal circuit blocks, Simulate mixed-signal circuit blocks, Layout mixed-signal circuit blocks, Perform extracted simulation, Create power optimized solutions, Create cost optimized solutions, Design high-speed DACs, Design high-speed ADCs, Design analog/mixed-signal blocks, Explore circuit architectures, Perform circuit layout, Perform parasitic extraction, Perform simulation, Define analog interface requirements, Define digital interface requirements, Define supporting digital functions, Specify bench test plans, Specify production test plans, Enable volume production", "teamCollaboration" : "Cross-disciplinary staff; Internal inter-disciplinary team; Third-party suppliers; Cross-functional teams", "domainKnowledge" : "Low Earth Orbit satellites; Broadband connectivity; RFIC; Deeply scaled CMOS; FinFET; SOI; BiCMOS; Bulk CMOS; Time-interleaved ADC; Digitally-assisted analog; SERDES; Data converter clock distribution; Jitter concepts; Phase noise concepts", "domainList" : [ "low-earth-orbit-satellites", "broadband-connectivity", "rfic", "deeply-scaled-cmos", "finfet", "soi", "bicmos", "bulk-cmos", "time-interleaved-adc", "digitally-assisted-analog", "serdes", "data-converter-clock-distribution", "jitter-concepts", "phase-noise-concepts" ], "domainSpecificKnowledge" : [ "Low Earth Orbit satellites", "Broadband connectivity", "RFIC", "Deeply scaled CMOS", "FinFET", "SOI", "BiCMOS", "Bulk CMOS", "Time-interleaved ADC", "Digitally-assisted analog", "SERDES", "Data converter clock distribution", "Jitter concepts", "Phase noise concepts" ], "toolProficiency" : [ "Virtuoso Schematic Editor", "Incisive", "Xcelium", "VCS", "AMS Designer" ], "innovationCreativity" : "Conceive innovative product solutions", "problemSolvingSkills" : "Power/area/performance trade-offs", "specialRequirements" : "Export Control Requirement", "outcomesObjectives" : "Create power optimized solutions; Create cost optimized solutions", "qualificationsBasic" : "Master's degree in Electrical or Communications Engineering, 7+ years of experience in mixed-signal design, Experience in taking designs to volume production, U. S. citizen or national, U. S. permanent resident, Lawfully admitted into the U. S. as a refugee, Granted asylum", "qualificationsPreferred" : "10+ years of experience in high-speed, low-power mixed-signal circuit design, FinFET, SOI, BiCMOS, and Bulk CMOS technologies experience, Knowledge of time-interleaved ADC architectures, Knowledge of digitally-assisted analog techniques, Proficient in modeling circuits using Matlab, Proficient in modeling circuits using Verilog-A, Knowledgeable in SERDES, Knowledgeable in data converter clock distribution design, Knowledgeable in jitter/phase noise concepts, Proficiency with digital and mixed signal simulators, Knowledge of the Cadence Virtuoso Design Framework, Knowledge of Virtuoso Schematic Editor, Knowledge of Virtuoso Analog Design Environment, Knowledge of programming in Python, Knowledge of programming in Perl, Knowledge of programming in SKILL", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Amazon LEO is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! The Role: As Senior Mixed-Signal Silicon Engineer, you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions. You will work closely with an internal inter-disciplinary team, and third-party suppliers to drive key aspects of product definition, execution and optimization. You must be responsive, flexible and able to succeed within an open collaborative peer environment. As a member of the RFIC team, you will be responsible for the architectural definition, design, simulation, layout, and extracted simulation for transmit and receive mixed-signal circuit blocks including data converters and aspects of SERDES. Strong focus will be on creating power and cost optimized solutions for a given system performance. Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Design & optimize high-speed (>800Msps) medium resolution (5-8 bits) DACs & ADCs and other analog/mixed-signal blocks in deeply scaled CMOS technologies. • Explore circuit architectures for power/area/performance trade-offs. • Perform circuit layout, parasitic extraction and simulation. • Collaborate with cross-functional teams to define analog/digital interface requirements and define supporting digital functions. • Specify bench and production test plans for your design and enable volume production. Basic Qualifications: - Master's degree in Electrical or Communications Engineering or a related field - 7+ years of experience in mixed-signal design, preferably in an advanced node. - Experience in taking designs to volume production. Preferred Qualifications: - 10+ years of experience in high-speed, low-power mixed-signal circuit design, layout and verification in the following : FinFET, SOI, BiCMOS, and Bulk CMOS technologies. - Knowledge of time-interleaved ADC architectures, digitally-assisted analog techniques. - Proficient in modeling circuits using Matlab, Verilog-A. - Knowledgeable in SERDES, data converter clock distribution design and jitter/phase noise concepts. - Proficiency with digital and mixed signal simulators, for example Incisive/Xcelium, VCS, AMS Designer. - Knowledge of the Cadence Virtuoso Design Framework, Virtuoso Schematic Editor, and Analog Design Environment (Explorer/Assembler). - Knowledge of programming in Python, Perl, and SKILL. - Effective written and verbal communication skills Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $143,300/year in our lowest geographic market up to $247,600/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits . This position will remain posted until filled. Applicants should apply via our internal or external career site.", "summaryDescription" : "Senior Mixed-Signal Silicon Engineer at Amazon Kuiper Manufacturing Enterprises LLC. Skills: Mixed-signal silicon, Data converters, SERDES, CMOS technologies. Design innovative product solutions. Drive key aspects of product definition", "postedDate" : "2026-06-12T22:59:06.150", "createdAt" : "2026-06-12T22:59:06.150", "lastUpdated" : "2026-06-14T22:37:39.884", "ingestTimestamp" : "2026-06-12T22:59:06.150", "mongoId" : "69164d7f70f0b99d586f2294", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/3123280/apply", "salaryAnnualMin" : 143300, "salaryAnnualMax" : 247600, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Mixed-signal design", "High-speed DACs", "High-speed ADCs", "Analog blocks", "Mixed-signal blocks", "Circuit layout", "Parasitic extraction", "Simulation", "SERDES", "Data converters", "Clock distribution", "Jitter concepts", "Phase noise concepts", "Responsive", "Mixed-signal silicon", "CMOS technologies", "Product definition", "Product execution", "Product optimization", "Circuit architectures", "System performance", "Analog interface", "Digital interface", "Bench test plans", "Production test plans", "Volume production", "Low Earth Orbit satellites", "Broadband connectivity", "RFIC", "Deeply scaled CMOS", "FinFET", "SOI", "BiCMOS", "Bulk CMOS", "Time-interleaved ADC", "Digitally-assisted analog", "Data converter clock distribution", "Virtuoso Schematic Editor", "Incisive", "Xcelium", "VCS", "AMS Designer" ], "skillCount" : 42, "jobCategory" : "other", "dataQualityScore" : 1.0, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology" }, { "id" : "6a305b00f292fd229cf58232", "title" : "Senior Signal Integrity Engineer", "company" : "Graphcore", "industry" : "Technology", "salary" : { "min" : 155000.0, "max" : 215000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Senior Signal Integrity Engineer in Austin, United States, adjusted for industry and company size." }, "location" : "Austin, Texas, United States", "locations" : [ "Austin", "Texas", "United States" ], "timestamp" : "2026-06-16T08:52:55.461", "fingerprint" : "92697eda6cd1f1db76185615b907de67f7127facde107fff59b8c6a1bcea114d", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/graphcore/jobs/8588019002", "externalId" : "8588019002", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Austin", "state" : "Texas", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "30.2711286,-97.7436995" } ], "locationText" : "Austin, Texas, United States", "minimumEducation" : "Bachelor's", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI, I2C, Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE, Python, MATLAB", "professionalSkills" : [ "Simulation correlation", "Technical communication", "Design methodology", "Channel performance", "Layout optimization", "Routing rules", "System design", "Schematic review", "Layout review", "Validation data review", "Measurement summaries", "Debug findings", "Technical recommendations" ], "hardSkillsList" : [ "Signal integrity analysis", "High-speed I/O optimization", "Low-speed I/O optimization", "Time-domain simulation", "Frequency-domain simulation", "Lab validation", "Measurement correlation", "S-parameters analysis", "Impedance profiles", "Eye diagrams", "Jitter analysis", "Timing margins", "Insertion loss", "Return loss", "Crosstalk analysis", "De-embedding", "Fixture design", "Lab automation", "Measurement methodology" ], "hardSkills" : [ { "name" : "Signal integrity analysis", "level" : "intermediate" }, { "name" : "High-speed I/O optimization", "level" : "intermediate" }, { "name" : "Low-speed I/O optimization", "level" : "intermediate" }, { "name" : "Time-domain simulation", "level" : "intermediate" }, { "name" : "Frequency-domain simulation", "level" : "intermediate" }, { "name" : "Lab validation", "level" : "intermediate" }, { "name" : "Measurement correlation", "level" : "intermediate" }, { "name" : "S-parameters analysis", "level" : "intermediate" }, { "name" : "Impedance profiles", "level" : "intermediate" }, { "name" : "Eye diagrams", "level" : "intermediate" }, { "name" : "Jitter analysis", "level" : "intermediate" }, { "name" : "Timing margins", "level" : "intermediate" }, { "name" : "Insertion loss", "level" : "intermediate" }, { "name" : "Return loss", "level" : "intermediate" }, { "name" : "Crosstalk analysis", "level" : "intermediate" }, { "name" : "De-embedding", "level" : "intermediate" }, { "name" : "Fixture design", "level" : "intermediate" }, { "name" : "Lab automation", "level" : "intermediate" }, { "name" : "Measurement methodology", "level" : "intermediate" } ], "majorSkills" : "Signal integrity, High-speed interfaces, SI/PI simulation, Lab validation", "majorSkillsList" : [ "Signal integrity", "High-speed interfaces", "SI/PI simulation", "Lab validation" ], "coreResponsibilities" : "Develop high-speed signaling solutions, Validate high-speed signaling solutions, Optimize high-speed signaling solutions, Perform end-to-end signal integrity analysis, Analyze high-speed I/O interfaces, Optimize high-speed I/O interfaces, Analyze low-speed I/O interfaces, Optimize low-speed I/O interfaces, Perform time-domain simulations, Perform frequency-domain simulations, Support lab validation, Correlate simulation results, Identify margin gaps, Debug issues, Improve design methodology, Optimize I/O channel performance, Guide board layout, Guide stack-ups, Guide routing rules, Guide system design, Review schematics, Review layouts, Review simulation results, Review validation data, Prepare validation reports, Communicate measurement summaries, Communicate debug findings, Communicate technical recommendations", "teamCollaboration" : "Cross-functional technical communication; Collaborate with silicon teams; Collaborate with package teams; Collaborate with board teams; Collaborate with connector teams; Collaborate with cable teams; Collaborate with system design teams; Work with interconnect vendors; Work with ODMs; Internal teams; Senior technical stakeholders", "domainKnowledge" : "High-speed digital systems; Blade architectures; Rack-level architectures; Compute platforms; Silicon design; Package design; Interconnect design; Board design; System design; I/O channel performance; Board layout; Stack-ups; Routing rules; Backplane hardware; Rack-level hardware; Hyperscale environments; Data center infrastructure; Cloud infrastructure; Compute hardware; Board-to-board interconnects; Cable interconnects; SI/PI performance; Thermal considerations; Mechanical considerations", "domainList" : [ "high-speed-digital-systems", "blade-architectures", "rack-level-architectures", "compute-platforms", "silicon-design", "package-design", "interconnect-design", "board-design", "system-design", "i-o-channel-performance", "board-layout", "stack-ups", "routing-rules", "backplane-hardware", "rack-level-hardware", "hyperscale-environments", "data-center-infrastructure", "cloud-infrastructure", "compute-hardware", "board-to-board-interconnects", "cable-interconnects", "si-pi-performance", "thermal-considerations", "mechanical-considerations" ], "domainSpecificKnowledge" : [ "High-speed digital systems", "Blade architectures", "Rack-level architectures", "Compute platforms", "Silicon design", "Package design", "Interconnect design", "Board design", "System design", "I/O channel performance", "Board layout", "Stack-ups", "Routing rules", "Backplane hardware", "Rack-level hardware", "Hyperscale environments", "Data center infrastructure", "Cloud infrastructure", "Compute hardware", "Board-to-board interconnects", "Cable interconnects", "SI/PI performance", "Thermal considerations", "Mechanical considerations" ], "toolProficiency" : [ "Ansys HFSS", "Keysight ADS", "Cadence Sigrity", "CST", "SPICE", "VNA", "TDR", "BERT", "Oscilloscopes", "Python", "MATLAB" ], "communicationSkills" : "Technical communication; Validation reports; Measurement summaries; Debug findings; Technical recommendations; Present technical findings", "documentationSkills" : "Validation reports", "problemSolvingSkills" : "Debug issues; Troubleshooting", "outcomesObjectives" : "Optimize I/O channel performance; Improve design methodology", "qualificationsBasic" : "Bachelor’s or Master’s degree, Experience in signal integrity, Hands-on measurement expertise, Experience measuring and analyzing S-parameters, Knowledge of high-speed interfaces, Experience with SI/PI simulation tools, Ability to correlate lab measurements, Communication skills", "qualificationsPreferred" : "Experience in hyperscale, Experience with blade architectures, Knowledge of thermal considerations, Experience with calibration, Experience using Python scripting", "workSiteFlexibility" : "Onsite", "rawDescription" : "About the Role We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design, with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication. Key Responsibilities End-to-end signal integrity analysis for blade- and rack-level system architectures. Analyze and optimize high-speed and low-speed I/O interfaces, including PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI, I2C, etc. and related interconnects. Perform time-domain and frequency-domain simulations using tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE, or similar. Support hands-on lab validation using VNA, TDR, BERT, and high-speed oscilloscopes. Correlate simulation results with lab measurements to identify margin gaps, debug issues, and improve design methodology. Collaborate with silicon, package, board, connector, cable, and system design teams to optimize I/O channel performance. Work with interconnect vendors and ODMs to guide board layout, stack-ups, routing rules, and system design decisions. Review schematics, layouts, simulation results, and validation data for blade, backplane, and rack-level hardware. Prepare and communicate clear validation reports, measurement summaries, debug findings, and technical recommendations to internal teams, vendors, and senior technical stakeholders. Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Strong experience in signal integrity for high-speed digital systems. Hands-on measurement expertise using VNAs, TDRs, BERTs, and high-speed oscilloscopes. Experience measuring and analyzing S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and crosstalk. Knowledge of high-speed interfaces such as PCIe Gen4/5/6, Ethernet, DDR, SerDes, and related I/O technologies. Experience with SI/PI simulation tools such as HFSS, ADS, Sigrity, CST, SPICE, or equivalent. Ability to correlate lab measurements with simulations and use data to guide design decisions. Strong communication skills, including the ability to produce clear validation reports, present technical findings, and work effectively across multi-functional engineering teams. Preferred Qualifications Experience in hyperscale, data center, cloud infrastructure, or advanced compute hardware environments. Experience with blade, backplane, board-to-board, cable, or rack-level interconnect architectures. Knowledge of thermal and mechanical considerations that impact SI/PI performance. Experience with calibration, de-embedding, fixture design, lab automation, or measurement methodology development. Experience using Python, MATLAB, or similar scripting languages for simulation automation, measurement automation, and data analysis. Tools / Technologies Measurement: VNA, TDR, BERT, high-speed oscilloscopes Simulation: Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE Interfaces: PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI, high-speed interconnects Analysis: S-parameters, eye diagrams, jitter, timing margins, impedance control, crosstalk, insertion loss, return loss, de-embedding, measurement-to-simulation correlation Why Join Us This is an opportunity to work on complex, high-performance compute platforms while partnering with experienced technical leaders, ODMs, and interconnect vendors. You will play a key role in defining, measuring, validating, and optimizing next-generation system-level I/O performance. USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.", "summaryDescription" : "Senior Signal Integrity Engineer at Graphcore. Skills: Signal integrity, High-speed interfaces, SI/PI simulation, Lab validation. Develop high-speed signaling solutions. Validate high-speed signaling solutions", "postedDate" : "2026-06-15T23:22:40.855", "createdAt" : "2026-06-15T23:22:40.855", "lastUpdated" : "2026-06-16T08:52:55.461", "ingestTimestamp" : "2026-06-15T23:22:40.855", "mongoId" : "6a305b00f292fd229cf58232", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 155000, "salaryAnnualMax" : 215000, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "Signal integrity analysis", "High-speed I/O optimization", "Low-speed I/O optimization", "Time-domain simulation", "Frequency-domain simulation", "Lab validation", "Measurement correlation", "S-parameters analysis", "Impedance profiles", "Eye diagrams", "Jitter analysis", "Timing margins", "Insertion loss", "Return loss", "Crosstalk analysis", "De-embedding", "Fixture design", "Lab automation", "Measurement methodology", "Signal integrity", "High-speed interfaces", "SI/PI simulation", "Simulation correlation", "Technical communication", "Design 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"structuredLocations" : [ { "city" : "Geneva", "state" : "Geneva", "country" : "Switzerland", "continent" : "eu", "source" : "llm", "workMode" : "hybrid", "geo" : "46.2017559,6.1466014" } ], "locationText" : "Geneva, Geneva, Switzerland", "employmentType" : "FULL_TIME", "experienceMinYears" : 0, "experienceMaxYears" : 2, "experienceLevel" : "entry", "technicalSkills" : "CMOS, Analogue-to-digital converters, Silicon photonics, Optical receiver circuits, TIA, ADC, DAC, Control systems, Python, Bash, MATLAB, Ansys HFSS, Simulia CST", "professionalSkills" : [ "IC design", "Electronics engineering", "Particle physics detectors", "High speed links", "Detector technologies", "Communication systems" ], "hardSkillsList" : [ "Analogue circuit design", "Mixed-signal circuit design", "CMOS circuit design", "Laboratory testing", "Circuit characterisation", "Circuit validation", "Radiation qualification", "Single-event effects", "Total ionising dose", "Physical verification", "Electromagnetics simulation" ], "softSkillsList" : [ "Work independently" ], "hardSkills" : [ { "name" : "Analogue circuit design", "level" : "intermediate" }, { "name" : "Mixed-signal circuit design", "level" : "intermediate" }, { "name" : "CMOS circuit design", "level" : "intermediate" }, { "name" : "Laboratory testing", "level" : "intermediate" }, { "name" : "Circuit characterisation", "level" : "intermediate" }, { "name" : "Circuit validation", "level" : "intermediate" }, { "name" : "Radiation qualification", "level" : "intermediate" }, { "name" : "Single-event effects", "level" : "intermediate" }, { "name" : "Total ionising dose", "level" : "intermediate" }, { "name" : "Physical verification", "level" : "intermediate" }, { "name" : "Electromagnetics simulation", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Work independently" } ], "majorSkills" : "Mixed-Signal IC Design, Analogue/Custom IC Design, High-speed CMOS circuits", "majorSkillsList" : [ "Mixed-Signal IC Design", "Analogue/Custom IC Design", "High-speed CMOS circuits" ], "coreResponsibilities" : "Study architectures for analogue and mixed-signal circuits, Define architectures for analogue and mixed-signal circuits, Design CMOS circuit blocks, Verify CMOS circuit blocks, Perform laboratory testing of circuits, Perform characterisation of circuits, Perform validation of circuits, Carry out radiation qualification of manufactured devices", "teamCollaboration" : "Work independently", "domainKnowledge" : "High Energy Physics; Radiation-tolerant systems; Optical communication systems; Silicon photonics; Particle physics detectors; Analogue electronics; Mixed-signal circuits; CMOS circuits; Clock generation; Clock distribution; DLL circuits; PLL circuits; CDR circuits; Wireline drivers; Laser drivers; External modulators; Electromagnetics", "domainList" : [ "high-energy-physics", "radiation-tolerant-systems", "optical-communication-systems", "silicon-photonics", "particle-physics-detectors", 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holidays, Work in Radiation Areas, Work during nights, Sundays and official holidays, when required by the needs of the Organization", "qualificationsBasic" : "Master's degree with 2 to 6 years of post-graduation professional experience, PhD with no more than 3 years of post-graduation professional experience, National of a CERN Member or Associate Member State, Never had a CERN fellow or graduate contract before", "qualificationsPreferred" : "Experience with electromagnetics (EM) simulation tools", "remoteFriendly" : false, "workSiteFlexibility" : "Hybrid", "rawDescription" : "Join the CERN Experimental Physics Department and help develop next-generation detector technologies for future High Energy Physics experiments. As part of the High Speed Links programme, you will contribute to radiation-tolerant optical communication systems that combine custom ASICs, silicon photonics, optical modules, and FPGA platforms to enable reliable high-speed data transmission in extreme environments. We are seeking an Analogue/Custom IC Design Engineer to design and validate advanced communication ASICs and high-speed CMOS circuits for particle physics detectors. The role involves taking cutting-edge technologies from prototype development through to full system demonstrators. Your responsibilities * Study and define architectures for analogue and mixed-signal circuits that enable high-speed communication systems using silicon photonics. * Design and verify CMOS circuit blocks such as clock and data recovery (CDR) circuits, high speed clock distribution networks and high-speed analogue-to-digital converters (ADCs). * Perform laboratory testing, characterisation, and validation of circuits. * Carry out radiation qualification (single-event effects and total ionising dose) of manufactured devices. Your profile * A strong background in digital and analogue electronics, ideally in an IC design environment. * Familiarity with clock generation and distribution, including fundamentals of DLL, PLL, and CDR circuits. * The ability to solve engineering problems using a variety of analysis and simulation methods. * Hands-on experience in the design, testing and debugging of electronic circuits. * A strong team player who can also work independently. Skills * Design, simulation and layout of CMOS integrated circuits using Cadence Virtuoso. * Working knowledge of physical verification flows (DRC, LVS, PEX) using Siemens Calibre or Cadence PVS. * Knowledge of at least one of the following: optical receiver circuits, high data rate drivers (wireline, laser and/or external modulators), PLL and CDR design, TIA, ADC and DAC design, control systems. * Working knowledge of at least one programming, scripting, or data analysis language (e.g., Python, Bash, MATLAB). * Experience with electromagnetics (EM) simulation tools (e.g., Ansys HFSS, Simulia CST) is considered a plus. * Spoken and written English, with a commitment to learn French. Eligibility criteria: * You are a national of a [CERN Member or Associate Member State](https://home.cern/about/member-states). * You have a professional background in Electronics Engineering (or a related field) and have either: * a Master's degree with 2 to 6 years of post-graduation professional experience; * or a PhD with no more than 3 years of post-graduation professional experience. * You have never had a CERN fellow or graduate contract before. ## Additional Information Job closing date: 01.07.2026 at 23:59 CEST. Contract duration: 24 months, with a possible extension up to 36 months maximum. Working hours: 40 hours per week Job flexibility: Hybrid Target start date: 01-August-2026 This position involves: * Work during nights, Sundays and official holidays. * Work in Radiation Areas. * Work during nights, Sundays and official holidays, when required by the needs of the Organization. Job reference: EP-ESE-ME-2026-107-GRAP Field of work: Electrical or Electronics Engineering Benchmark job: 200050 - Electronics Engineer Global Benefits * A monthly stipend between 6372-7004 Swiss Francs per month (tax free) depending on your degree. * 30 days of paid leave per year plus 2 weeks annual closure. * Coverage by CERN’s comprehensive health insurance scheme (for yourself, your spouse and children), and membership of the CERN Pension Fund. * Family, child and infant monthly allowances depending on your individual circumstances. * A relocation package (installation grant and travel expenses) depending on your individual circumstances. * Possibility to extend your contract up to 36 months. * On-the-job and formal training including language classes. Overview of CERN - Discover a world where the impossible is made possible! At CERN, the European Organization for Nuclear Research, we are pushing the frontiers of science and technology. Our groundbreaking work brings together not only physicists but also a diverse range of professionals from engineering, technical, scientific, and administrative fields. Together, we foster an environment where innovation and collaboration thrive. Every day, we face exciting new challenges and opportunities to contribute to cutting-edge research that shapes our understanding of the universe. We meet these challenges through the diverse perspectives within our teams, ensuring every contribution is valued and driving our shared sense of inclusion and purpose. Diversity is a core value of CERN since its foundation, and it remains central to our mission and continued success. If you are ready to be part of a dynamic, inclusive community pushing the boundaries of knowledge, CERN is the place where your curiosity and skills can thrive. Be part of our mission to uncover what lies at the heart of the universe! TAKE PART! More information about us, here:[careers.cern](https://careers.cern/)", "summaryDescription" : "Mixed-Signal IC Design Engineer at CERN. Skills: Mixed-Signal IC Design, Analogue/Custom IC Design, High-speed CMOS circuits. Study architectures for analogue and mixed-signal circuits. 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Your responsibilities * Study and define architectures for analogue and mixed-signal circuits that enable high-speed communication systems using silicon photonics. * Design and verify CMOS circuit blocks such as clock and data recovery (CDR) circuits, high speed clock distribution networks and high-speed analogue-to-digital converters (ADCs). * Perform laboratory testing, characterisation, and validation of circuits. * Carry out radiation qualification (single-event effects and total ionising dose) of manufactured devices. Your profile * A strong background in digital and analogue electronics, ideally in an IC design environment. * Familiarity with clock generation and distribution, including fundamentals of DLL, PLL, and CDR circuits. * The ability to solve engineering problems using a variety of analysis and simulation methods. * Hands-on experience in the design, testing and debugging of electronic circuits. * A strong team player who can also work independently. Skills * Design, simulation and layout of CMOS integrated circuits using Cadence Virtuoso. * Working knowledge of physical verification flows (DRC, LVS, PEX) using Siemens Calibre or Cadence PVS. * Knowledge of at least one of the following: optical receiver circuits, high data rate drivers (wireline, laser and/or external modulators), PLL and CDR design, TIA, ADC and DAC design, control systems. * Working knowledge of at least one programming, scripting, or data analysis language (e.g., Python, Bash, MATLAB). * Experience with electromagnetics (EM) simulation tools (e.g., Ansys HFSS, Simulia CST) is considered a plus. * Spoken and written English, with a commitment to learn French. Eligibility criteria: * You are a national of a [CERN Member or Associate Member State](https://home.cern/about/member-states). * You have a professional background in Electronics Engineering (or a related field) and have either: * a Master's degree with 2 to 6 years of post-graduation professional experience; * or a PhD with no more than 3 years of post-graduation professional experience. * You have never had a CERN fellow or graduate contract before. ## Additional Information Job closing date: 01.07.2026 at 23:59 CEST. Contract duration: 24 months, with a possible extension up to 36 months maximum. Working hours: 40 hours per week Job flexibility: Hybrid Target start date: 01-August-2026 This position involves: * Work during nights, Sundays and official holidays. * Work in Radiation Areas. * Work during nights, Sundays and official holidays, when required by the needs of the Organization. Job reference: EP-ESE-ME-2026-107-GRAP Field of work: Electrical or Electronics Engineering Benchmark job: 200050 - Electronics Engineer Global Benefits * A monthly stipend between 6372-7004 Swiss Francs per month (tax free) depending on your degree. * 30 days of paid leave per year plus 2 weeks annual closure. * Coverage by CERN’s comprehensive health insurance scheme (for yourself, your spouse and children), and membership of the CERN Pension Fund. * Family, child and infant monthly allowances depending on your individual circumstances. * A relocation package (installation grant and travel expenses) depending on your individual circumstances. * Possibility to extend your contract up to 36 months. * On-the-job and formal training including language classes. Overview of CERN - Discover a world where the impossible is made possible! At CERN, the European Organization for Nuclear Research, we are pushing the frontiers of science and technology. Our groundbreaking work brings together not only physicists but also a diverse range of professionals from engineering, technical, scientific, and administrative fields. Together, we foster an environment where innovation and collaboration thrive. Every day, we face exciting new challenges and opportunities to contribute to cutting-edge research that shapes our understanding of the universe. We meet these challenges through the diverse perspectives within our teams, ensuring every contribution is valued and driving our shared sense of inclusion and purpose. Diversity is a core value of CERN since its foundation, and it remains central to our mission and continued success. If you are ready to be part of a dynamic, inclusive community pushing the boundaries of knowledge, CERN is the place where your curiosity and skills can thrive. Be part of our mission to uncover what lies at the heart of the universe! TAKE PART! More information about us, here:[careers.cern](https://careers.cern/)", "summaryDescription" : "Mixed-Signal IC Design Engineer at CERN. Skills: Mixed-Signal IC Design, Analogue IC Design, High-speed CMOS circuits, Radiation-tolerant optical communication. Study architectures for analogue circuits. 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Essential Performance Responsibilities: Plans according to state standards and student IEPS Participates, as appropriate, on pre-assessment teams to determine necessity for comprehensive student evaluation, initiates, schedules, and attends IEP meetings; works with multi-disciplinary team to diagnose need; structures/implements IEP for each student identified Defines, structures, and communicates daily expectations according to state standards and IEP including but not limited to, course goals, objectives, learning methods, and activities Communicates with parents, regular education staff members, special education staff members, and other appropriate stakeholders on course instructional strategies and objectives, students' grasp of material, outcomes and perspectives for applications of materials learned Receives and reports student progress; in-puts student data via computer; negotiates schedules and communicates with all pertinent participants (administration, parents, staff, students, etc.) Provides differentiated instruction based on the student's individual level of functioning and preferred/necessary learning modalities Controls classroom and teaches individual behavior through classroom structure, routine, communication opportunities, and individualized behavior methods; adapts and adjusts course content and reading levels to specify skills to be taught; discerns learning styles and means of building memory and study skills; assists individual students in achieving academic, daily living, and social skills learning objectives by working with them individually and in small groups Presents various learning opportunities appropriate to each student's IEP including, but not limited to, classroom structure, multi-media, assistive technology, alternative communication opportunities, support of regular classroom teachers, and other presentations and/or opportunities inside or outside Prepares and displays events and reinforcement activities which encourage participation Evaluates according to state standards and student IEPs Plans assessments for evaluation to include, but not limited to, various diagnostic techniques; standardized survey and criterion-referenced test; teacher-developed oral and written tests; student personal indices (effort, potential, interests, memory) Designs subject-based reinforcement to follow assessments and student's learning objectives (computer lab activities, working independently or on group projects, field/community reinforcement) Designs a grading system which encourages motivation and participation; collects and enters student data in computer from charts and observations; reports progress on a regular basis as required Provides a positive role model of appropriate and respectful interactions with students and staff Develops, teaches, and reviews clear and concise classroom structure, rules, routines, procedures, and expectations individualized to student need. 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Beaumont District Headquarters (20DISTHQ)
8350 EASTEX FREEWAY
Beaumont, 77708

, Beaumont District Headquarters" ], "timestamp" : "2026-06-16T00:57:09.400", "fingerprint" : "2512cf652bdc1de15e33b33959da3ebc5b89f9efebcfed09bd852df7dc1e4625", "source" : "taleo", "language" : "en", "applyUrl" : "https://fa009.taleo.net/careersection/ex/jobdetail.ftl?job=43722", "externalId" : "43722", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Beaumont", "state" : "Texas", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "30.0829344,-94.0984277" } ], "locationText" : "Beaumont, Texas, United States", "technicalSkills" : "ITS", "professionalSkills" : [ "System design", "Traffic flow" ], "hardSkillsList" : [ "Traffic signal systems" ], "hardSkills" : [ { "name" : "Traffic signal systems", "level" : "intermediate" } ], "majorSkills" : "Intelligent Transportation Systems, Traffic signal design", "majorSkillsList" : [ "Intelligent Transportation Systems", "Traffic signal design" ], "coreResponsibilities" : "Design automated systems, Refine automated systems, Implement automated systems, Steward technology for Operations Center", "teamCollaboration" : "Public partners; Private partners", "domainKnowledge" : "Intelligent Transportation Systems", "domainList" : [ "intelligent-transportation-systems" ], "domainSpecificKnowledge" : [ "Intelligent Transportation Systems" ], "outcomesObjectives" : "Keep traffic flowing; Keep communities moving", "qualificationsBasic" : "5+ years ITS experience", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "TxDOT's Beaumont District is looking for an ITS Analyst I to join us in our Traffic Signal Department. If you’re driven by the challenge of shaping smarter, safer, and more connected transportation networks, this role puts you at the center of that mission. As a key contributor to our Intelligent Transportation Systems (ITS) initiatives, you’ll design, refine, and implement the automated systems that keep traffic flowing and communities moving. You’ll work independently on meaningful technical projects, collaborate with public and private partners, and help steward the technology that powers our Intelligent Transportation Operations Center. It’s a chance to turn complex data and infrastructure into real-world impact. Salary Plan/Grade: ITS Analyst I (B21): $54,278 - $87,046/yearly Physical Work Location: 8350 Eastex Freeway, Beaumont TX, 77708 54,278.00 87,046.00", "summaryDescription" : "ITS Analyst I- Traffic Signal Crew at TxDOT. Skills: Intelligent Transportation Systems, Traffic signal design. Design automated systems. Refine automated systems", "createdAt" : "2026-06-14T20:49:32.015", "lastUpdated" : "2026-06-16T00:57:09.400", "ingestTimestamp" : "2026-06-14T20:49:32.015", "mongoId" : "69dde4492beec4dd3d9a32dd", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 54278, "salaryAnnualMax" : 87046, "salaryBand" : "50k-75k", "hasSalary" : true, "allSkills" : [ "Traffic signal systems", "Intelligent Transportation Systems", "Traffic signal design", "System design", "Traffic flow" ], "skillCount" : 5, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Entry", "dataQualityScore" : 0.6666667, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Government", "llmIndustryConfidence" : 0.92 }, { "id" : "6a2a544d74d8ee00a0602792", "title" : "Analog Design Engineer", "company" : "Tenstorrent", "industry" : "Technology", "salary" : { "min" : 100000.0, "max" : 500000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "North America", "locations" : [ "North America" ], "timestamp" : "2026-06-14T05:01:56.452", "fingerprint" : "e9db8ccbdc70f00035fd1a4cf380863795333efc1135b5aacda800e88bcccd9e", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/tenstorrent/jobs/5160368007", "externalId" : "5160368007", "industryFunction" : { }, "structuredLocations" : [ { "country" : "United States", "continent" : "na", "workMode" : "remote" }, { "country" : "Canada", "continent" : "na", "workMode" : "remote" } ], "locationText" : "United States; Canada", "minimumEducation" : "Master's", "technicalSkills" : "Analog design, Mixed-signal design, FinFET, PLL, AMS, High-speed datacomm, SerDes, Die-to-die PHY, Tx/Rx, DDR, PCIe, USB PHY, Bias generators, Amplifiers, LDOs, ADCs, DACs, Oscillators, Switched-cap circuits, High-speed digital, Equalization techniques, CTLE, DFE, De-emphasis", "professionalSkills" : [ "Circuit architecture", "Silicon bring-up", "Silicon testing", "Layout interaction", "Tape-out", "IP integration", "IP optimization" ], "hardSkillsList" : [ "Analog/mixed-signal IC design", "PLL/AMS design", "High-speed datacomm/SerDes", "Die-to-die PHY design", "Tx/Rx design", "DDR PHY design", "PCIe PHY design", "USB PHY design", "Bias generator design", "Amplifier design", "LDO design", "ADC/DAC design", "Oscillator design", "Switched-cap circuit design", "High-speed digital design", "Equalization techniques", "CTLE", "DFE", "De-emphasis" ], "softSkillsList" : [ "Curiosity" ], "hardSkills" : [ { "name" : "Analog/mixed-signal IC design", "level" : "intermediate" }, { "name" : "PLL/AMS design", "level" : "intermediate" }, { "name" : "High-speed datacomm/SerDes", "level" : "intermediate" }, { "name" : "Die-to-die PHY design", "level" : "intermediate" }, { "name" : "Tx/Rx design", "level" : "intermediate" }, { "name" : "DDR PHY design", "level" : "intermediate" }, { "name" : "PCIe PHY design", "level" : "intermediate" }, { "name" : "USB PHY design", "level" : "intermediate" }, { "name" : "Bias generator design", "level" : "intermediate" }, { "name" : "Amplifier design", "level" : "intermediate" }, { "name" : "LDO design", "level" : "intermediate" }, { "name" : "ADC/DAC design", "level" : "intermediate" }, { "name" : "Oscillator design", "level" : "intermediate" }, { "name" : "Switched-cap circuit design", "level" : "intermediate" }, { "name" : "High-speed digital design", "level" : "intermediate" }, { "name" : "Equalization techniques", "level" : "intermediate" }, { "name" : "CTLE", "level" : "intermediate" }, { "name" : "DFE", "level" : "intermediate" }, { "name" : "De-emphasis", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Curiosity" } ], "majorSkills" : "Analog design, Mixed-signal design, Chiplet PHY IP, FinFET technology", "majorSkillsList" : [ "Analog design", "Mixed-signal design", "Chiplet PHY IP", "FinFET technology" ], "coreResponsibilities" : "Develop die-to-die chiplet PHY IP, Design PLLs, Design analog/mixed-signal blocks, Manage full lifecycle: design, Manage verification, Manage layout interaction, Manage tape-out, Manage silicon bring-up, Ensure production quality, Integrate AMS IP, Optimize AMS IP", "teamCollaboration" : "Cross-functional teams; Circuit architects; Analog teams; Digital teams; Verification teams; Layout teams; Software teams", "domainKnowledge" : "Deep sub-micron technologies; FinFET technologies; High-speed I/O; PHY architectures; AI computing", "domainList" : [ "deep-sub-micron-technologies", "finfet-technologies", "high-speed-i-o", "phy-architectures", "ai-computing" ], "domainSpecificKnowledge" : [ "Deep sub-micron technologies", "FinFET technologies", "High-speed I/O", "PHY architectures", "AI computing" ], "toolProficiency" : [ "EDA tools" ], "continuousLearning" : "Learn advanced FinFET nodes; Learn high-speed I/O; Learn PHY architectures; Learn scalable AMS IP", "innovationCreativity" : "Innovate at heart of interconnects", "specialRequirements" : "U.S. export laws compliance", "qualificationsBasic" : "10+ years analog/mixed-signal IC design experience, FinFET experience, PLL/AMS design experience, MSEE/PhD or equivalent background, Production tape-outs track record, Silicon bring-up/testing experience, Industry-standard EDA tools hands-on use, High-speed datacomm/SerDes experience, Die-to-die PHY design experience, Tx/Rx experience, DDR experience, PCIe experience, USB PHY components experience, Bias generators expertise, Amplifiers expertise, LDOs expertise, ADCs/DACs expertise, Oscillators expertise, Switched-cap circuits expertise, High-speed digital familiarity, Equalization techniques familiarity, CTLE familiarity, DFE familiarity, De-emphasis familiarity, Eligible to access U.S. export-controlled technology", "qualificationsPreferred" : "Experience at various levels", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an experienced Analog Design Engineer to develop cutting-edge die-to-die chiplet PHY IP solutions that power the future of AI computing. You'll work at the forefront of deep sub-micron technologies, collaborating with circuit architects and cross-functional teams to push the boundaries of analog/mixed-signal design. If you have a proven track record of delivering production-quality silicon and want to innovate at the heart of next-generation interconnects, join our team. This role is remote, based out of any in North America. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are A Analog/Mixed-Signal Design Engineer to develop die-to-die chiplet PHY IP, including PLLs and key analog/mixed-signal blocks in deep sub-micron FinFET technologies. A hands-on owner for the full lifecycle: design, verification, layout interaction, tape-out, and silicon bring-up to production quality. A strong cross-functional partner who can work with architecture, analog, digital, verification, layout, and software teams to integrate and optimize AMS IP. What we need 10+ years of analog/mixed-signal IC design experience in FinFET, including PLL/AMS design, with an MSEE/PhD or equivalent background. Strong track record in production tape-outs, silicon bring-up/testing, and hands-on use of industry-standard EDA tools with close layout collaboration. Deep experience in high-speed datacomm/SerDes and die-to-die PHY design, including Tx/Rx, DDR, PCIe, and USB PHY components. Collaborative, self-driven engineer with expertise across key circuits such as bias generators, amplifiers, LDOs, ADCs/DACs, oscillators, switched-cap circuits, plus familiarity with high-speed digital and equalization techniques like CTLE, DFE, and de-emphasis. What you will learn How to push the limits of die-to-die chiplet PHY IP in advanced FinFET nodes, from architecture through high-volume production. How to co-optimize analog, digital, and layout to hit aggressive performance, power, and area targets in complex SoCs. Deeper expertise in high-speed I/O and PHY architectures, plus practical methodologies for scalable, reusable AMS IP across multiple products. Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made. Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer. This offer of employment is contingent upon the applicant being eligible to access U. S. export-controlled technology. Due to U. S. export laws, including those codified in the U. S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U. S. and all countries outside the U. S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U. S. Commerce Department or applicable federal agency. If employment is not possible due to U. S. export laws, any offer of employment will be rescinded.", "summaryDescription" : "Analog Design Engineer at Tenstorrent. Skills: Analog design, Mixed-signal design, Chiplet PHY IP, FinFET technology. Develop die-to-die chiplet PHY IP. Design PLLs", "postedDate" : "2026-06-11T19:08:37.642", "createdAt" : "2026-06-11T19:08:37.642", "lastUpdated" : "2026-06-14T05:01:56.452", "ingestTimestamp" : "2026-06-11T19:08:37.642", "mongoId" : "6a2a544d74d8ee00a0602792", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 100000, "salaryAnnualMax" : 500000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Analog/mixed-signal IC design", "PLL/AMS design", "High-speed datacomm/SerDes", "Die-to-die PHY design", "Tx/Rx design", "DDR PHY design", "PCIe PHY design", "USB PHY design", "Bias generator design", "Amplifier design", "LDO design", "ADC/DAC design", "Oscillator design", "Switched-cap circuit design", "High-speed digital design", "Equalization techniques", "CTLE", "DFE", "De-emphasis", "Curiosity", "Analog design", "Mixed-signal design", "Chiplet PHY IP", "FinFET technology", "Circuit architecture", "Silicon bring-up", "Silicon testing", "Layout interaction", "Tape-out", "IP integration", "IP optimization", "Deep sub-micron technologies", "FinFET technologies", "High-speed I/O", "PHY architectures", "AI computing", "EDA tools" ], "skillCount" : 37, "jobCategory" : "design", "jobSubcategory" : "mixed-signal-design", "dataQualityScore" : 0.7777778, "daysOld" : 2, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Technology" }, { "id" : "6a2c8c8374d8ee00a0975b5d", "title" : "Senior Signal Processing Engineer", "company" : "WHOOP", "industry" : "Sensor Intelligence", "salary" : { "min" : 150000.0, "max" : 215000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Boston, MA", "locations" : [ "Boston, MA" ], "timestamp" : "2026-06-16T06:54:43.709", "fingerprint" : "1dc53efc7a23be4a2afc3d8c4ff5361234abf473d8561d381e81f17e856c88be", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/whoop/07146ea6-838b-4b90-b645-4289985ebc6b/application", "externalId" : "07146ea6-838b-4b90-b645-4289985ebc6b", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Boston", "state" : "Massachusetts", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "42.3588336,-71.0578303" } ], "locationText" : "Boston, Massachusetts, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor's", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Signal processing, Embedded systems, Sensor fusion, Machine learning, Python, C++, MATLAB, ECG, IMU, Biometrics", "professionalSkills" : [ "Algorithm development", "Data analysis", "System design" ], "hardSkillsList" : [ "Algorithm implementation", "Data interpretation", "Biometric data analysis" ], "hardSkills" : [ { "name" : "Algorithm implementation", "level" : "intermediate" }, { "name" : "Data interpretation", "level" : "intermediate" }, { "name" : "Biometric data analysis", "level" : "intermediate" } ], "majorSkills" : "Signal processing, Machine learning, Embedded systems", "majorSkillsList" : [ "Signal processing", "Machine learning", "Embedded systems" ], "coreResponsibilities" : "Develop and implement signal processing algorithms, Develop and implement sensor fusion algorithms, Develop and implement machine learning algorithms, Process and analyze wearable sensor data, Optimize algorithms for embedded systems, Collaborate with hardware and software teams, Validate algorithms with real-world data, Contribute to system design and architecture", "teamCollaboration" : "Hardware teams; Software teams; Cross-functional teams", "domainKnowledge" : "Wearable sensors; Biometric data; ECG signal processing; IMU data analysis", "domainList" : [ "wearable-sensors", "biometric-data", "ecg-signal-processing", "imu-data-analysis" ], "domainSpecificKnowledge" : [ "Wearable sensors", "Biometric data", "ECG signal processing", "IMU data analysis" ], "toolProficiency" : [ "MATLAB", "Python", "C++" ], "communicationSkills" : "Technical communication", "documentationSkills" : "Algorithm documentation; Technical documentation", "problemSolvingSkills" : "Algorithm optimization; Data interpretation", "qualificationsBasic" : "Bachelor's degree in Electrical Engineering, 5+ years of experience in signal processing, Experience with embedded systems, Experience with sensor fusion algorithms, Experience with machine learning algorithms", "qualificationsPreferred" : "Master's degree or PhD, Experience with wearable sensor data, Experience with Python for data analysis, Experience with C++ for embedded systems", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At WHOOP, we're on a mission to unlock human performance and healthspan. WHOOP empowers members to perform at a higher level through a deeper understanding of their bodies and daily lives. WHOOP is seeking a Senior Signal Processing Engineer to join the Sensor Intelligence Group (SIG), a cross-functional team collaborating across WHOOP Labs, Firmware, and Data Science. This role is central to developing next-generation sensor processing to enable foundational health features at WHOOP. You’ll develop the edge signal processing underpinning WHOOP physiological insights and coaching, ultimately delivering meaningful and personalized feedback to millions of members. RESPONSIBILITIES: - - Lead the design and development of signal processing for real-time, edge inference on consumer products - Own the full lifecycle: prototyping, validation, productionization, and continuous improvement - Evaluate commercial solutions; create demos and inform build/buy decisions - Collaborate cross-functionally with hardware, software, and product teams to bring algorithms to WHOOP members - Mentor junior engineers and contribute to a high-performance, research-to-production culture QUALIFICATIONS: - - B.S. in Electrical Engineering or related field, M.S. or PhD preferred - 5+ years of experience developing and deploying real-time sensor signal processing algorithms (e.g., physiological, audio, motion, etc.) - Demonstrated experience deploying algorithms to consumer product embedded platforms (e.g. fixed-point DSPs or MCUs) - Strong foundation in signal processing fundamentals (e.g., filtering, spectral analysis, time-frequency methods) - Experience with system-level design and optimization to maximize product battery life - Proficiency in Python or MATLAB for algorithm prototyping and with C/C++ for deployment to embedded product platforms - Excellent communication skills, including the ability to present technical results to a diverse audience BONUS QUALIFICATIONS: - - Experience developing hybrid DSP/ML systems, with a focus on signal pre-processing and/or feature extraction - Knowledge of embedded systems, RTOS, or firmware development - Deep understanding of sensor physics or sensor fusion techniques - Knowledge of microcontroller libraries for efficient signal processing (e.g. CMSIS-DSP or CMSIS-NN) This role is based in the WHOOP office located in Boston, MA. The successful candidate must be prepared to relocate if necessary to work out of the Boston, MA office. Interested in the role, but don’t meet every qualification? We encourage you to still apply! At WHOOP, we believe there is much more to a candidate than what is written on paper, and we value character as much as experience. As we continue to build a diverse and inclusive environment, we encourage anyone who is interested in this role to apply. WHOOP is an Equal Opportunity Employer and participates in E-verify https://www.e-verify.gov/ to determine employment eligibility. It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability. The WHOOP compensation philosophy is designed to attract, motivate, and retain exceptional talent by offering competitive base salaries, meaningful equity, and consistent pay practices that reflect our mission and core values. At WHOOP, we view total compensation as the combination of base salary, equity, and benefits, with equity serving as a key differentiator that aligns our employees with the long-term success of the company and allows every member of our corporate team to own part of WHOOP and share in the company’s long-term growth and success. The U.S. base salary range for this full-time position is $150,000 - $215,000 Salary ranges are determined by role, level, and location. Within each range, individual pay is based on factors such as job-related skills, experience, performance, and relevant education or training. In addition to the base salary, the successful candidate will also receive benefits and a generous equity package. These ranges may be modified in the future to reflect evolving market conditions and organizational needs. While most offers will typically fall toward the starting point of the range, total compensation will depend on the candidate’s specific qualifications, expertise, and alignment with the role’s requirements.", "summaryDescription" : "Senior Signal Processing Engineer at WHOOP. Skills: Signal processing, Machine learning, Embedded systems. Develop and implement signal processing algorithms. Develop and implement sensor fusion algorithms", "createdAt" : "2026-06-14T19:22:18.410", "lastUpdated" : "2026-06-16T06:54:43.709", "ingestTimestamp" : "2026-06-14T19:22:18.410", "mongoId" : "6a2c8c8374d8ee00a0975b5d", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 150000, "salaryAnnualMax" : 215000, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "Algorithm implementation", "Data interpretation", "Biometric data analysis", "Signal processing", "Machine learning", "Embedded systems", "Algorithm development", "Data analysis", "System design", "Wearable sensors", "Biometric data", "ECG signal processing", "IMU data analysis", "MATLAB", "Python", "C++" ], "skillCount" : 16, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.8888889, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a2ca0b774d8ee00a09a30a1", "title" : "Staff Analog Layout Engineer", "company" : "Neurophos", "industry" : "Engineering", "salary" : { "min" : 180000.0, "max" : 225000.0, "currency" : "USD", "frequency" : "Yearly" }, "location" : "San Jose, California", "locations" : [ "San Jose, California" ], "timestamp" : "2026-06-15T13:38:35.509", "fingerprint" : "fa26575cc980e9ee9f37d4a8da9573dd214cbd5b871ca444e524c48533057cac", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/neurophos/1d6bd8fd-ead0-4fe0-ae4a-4316d361110e/application", "externalId" : "1d6bd8fd-ead0-4fe0-ae4a-4316d361110e", "industryFunction" : { }, "structuredLocations" : [ { "city" : "San Jose", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.3361663,-121.8905910" }, { "city" : "Hsinchu", "country" : "Taiwan", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "24.8066333,120.9686833" } ], "locationText" : "San Jose, California, United States; Hsinchu, Taiwan", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "FinFET, GAA nodes", "hardSkillsList" : [ "IC layout", "Parasitic reduction", "Matching strategies", "Electromigration", "IR drop analysis" ], "hardSkills" : [ { "name" : "IC layout", "level" : "intermediate" }, { "name" : "Parasitic reduction", "level" : "intermediate" }, { "name" : "Matching strategies", "level" : "intermediate" }, { "name" : "Electromigration", "level" : "intermediate" }, { "name" : "IR drop analysis", "level" : "intermediate" } ], "majorSkills" : "Analog Layout, Deep-submicron processes, TSMC processes", "majorSkillsList" : [ "Analog Layout", "Deep-submicron processes", "TSMC processes" ], "coreResponsibilities" : "Perform custom IC layout execution, Optimize layout solutions, Deliver IP-level floor planning, Implement layout techniques, Execute block-level design sign-offs, Evaluate layout trade-offs, Implement power and clock delivery, Coordinate with designers, CAD engineers, EDA vendors", "teamCollaboration" : "Circuit designers; CAD engineers; EDA vendors", "domainKnowledge" : "TSMC N12; TSMC N3P; TSMC N2P; Deep-submicron processes; Restricted Design Rules; Electromigration; PLLs; Data Converters; ADC; DAC", "domainList" : [ "tsmc-n12", "tsmc-n3p", "tsmc-n2p", "deep-submicron-processes", "restricted-design-rules", "electromigration", "plls", "data-converters", "adc", "dac" ], "domainSpecificKnowledge" : [ "TSMC N12", "TSMC N3P", "TSMC N2P", "Deep-submicron processes", "Restricted Design Rules", "Electromigration", "PLLs", "Data Converters", "ADC", "DAC" ], "toolProficiency" : [ "Cadence Virtuoso", "Synopsys Custom Compiler", "Mentor Calibre", "Siemens ICV" ], "qualificationsBasic" : "B.S. or M.S. degree, 3-8+ years IC layout experience, Mastery of EDA tools, Deep understanding of layout techniques", "qualificationsPreferred" : "Prior tape-out success, Domain knowledge in analog/mixed signal blocks, Working knowledge of layout automation scripting", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "ABOUT NEUROPHOS The demand for new datacenters and AI compute is rapidly outpacing the planet's energy capacity. Digital solutions are hitting a power wall as we approach the physical limits of traditional silicon. Conquering this bottleneck isn’t about bigger chips or more of them; it means rethinking the fundamental architecture. The industry's current path isn’t going to meet the need, so we took a different approach. Instead of traditional electronic circuits, we use silicon photonics and an active, programmable metasurface to perform matrix multiplications at the speed of light. Our optical cells are 10,000x smaller than traditional photonic components, enabling unprecedented density. By using photonics instead of electricity, our chips become more efficient as they scale. This architecture will deliver up to 100 times the energy efficiency of existing solutions while significantly improving performance for large-scale AI inference. We’ve assembled a world-class team of industry veterans and recently raised a $110M Series A https://www.neurophos.com/110m-raise led by Gates Frontier. Participants include M12 (Microsoft’s Venture Fund), Carbon Direct Capital, Aramco Ventures, Bosch Ventures, Tectonic Ventures, Space Capital, and others. We have also been recognized on the EE Times Silicon 100 list for several consecutive years. Join us and shape the future of computing! POSITION OVERVIEW We are seeking a seasoned Senior or Staff Analog Layout Engineer to play a vital role in developing cutting-edge full-custom electronic transceiver components that interface directly with our custom silicon photonics and are essential to our revolutionary photonic AI platform. You will develop and optimize high-performance Analog IPs tailored for TSMC’s deep-submicron processes, including N12, N3P, and N2P. You will push the boundaries of Power, Performance, and Area (PPA) while mitigating the impact of Restricted Design Rules (RDRs) and electromigration. LOCATION San Jose, CA or Hsinchu, Taiwan. Full-time onsite position. KEY RESPONSIBILITIES - Perform custom IC layout execution of high-speed analog/RF circuits. - Optimize layout solutions to meet stringent TSMC manufacturing constraints, DFM rules, and antenna restrictions - Deliver IP-level floor planning, power planning, and signal distribution, implementing layout techniques for strict ESD and Latch-up prevention. - Execute and debug block-level design sign-offs, including DRC (Design Rule Check), LVS (Layout Versus Schematic), and RC Extraction using standard industry tools. - Evaluate layout trade-offs among area, yield, and performance; implement the power and clock delivery networks to ensure power and signal integrity. - Coordinate directly with circuit designers, CAD engineers, and EDA vendors to ensure IP design fits seamlessly into the production flow. QUALIFICATIONS - B.S. or M.S. degree in Electrical Engineering, Computer Engineering, or a closely related discipline. - 3-8+ years of professional custom or block-level IC layout experience in deep-submicron, advanced FinFET/GAA nodes (3nm, 2nm, etc.). - Mastery of industry-standard EDA tools for layout and verification (e.g., Cadence Virtuoso, Synopsys Custom Compiler, Mentor Calibre, Siemens ICV). - Deep understanding of deep-submicron layout techniques, parasitic reduction, matching strategies, and electro-migration (EM/IR). PREFERRED SKILLS - Prior tape-out success in TSMC N3 or N2 process nodes. - Domain knowledge in laying out high-performance analog/mixed signal blocks, such as PLLs and Data Converters (ADC/DAC). - Working knowledge of layout automation scripting languages (e.g., TCL, Perl, Python). WHAT WE OFFER This is an opportunity to play a pivotal role in an innovative startup redefining the future of AI hardware. Work on a game-changing technology at the intersection of photonics and AI as part of a collaborative and brilliant team. You’ll contribute to a platform that redefines computational performance and accelerates the future of artificial intelligence. Come help us bring this transformative technology to the world. BENEFITS Join a team that invests in your future and your well-being. At Neurophos, we offer: - 100% coverage of base health plan premiums for you and your dependents, plus HSA contributions. - Unlimited PTO. No rigid vacation banks, just a focus on delivery. - 401(k) matching and stock option opportunities to ensure our success is your success. - Full suite of voluntary benefits, including Dental, Vision, Life, Hospital, Critical Illness, and Accident insurance. - Personalized Benefits. Choose the plans that fit your life and take the cash back for those that don’t.", "summaryDescription" : "Staff Analog Layout Engineer at Neurophos. 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Blocks include Tx, Rx, PLL and miscellaneous high-precision analog circuits. Responsibilities: * DDR I/O Design: Develop and optimize high-speed DDR I/O interfaces, ensuring signal integrity, noise immunity, and compatibility with industry standards. * Principal Liaison: Liaise between Analog Design Team and Verification/Validation/Test teams. * Analyze Si ATE/Bench data against product spec. Use Excel/MATLAB/scripts to efficiently parse through large data set extracting actionable information. * Collaboration: Work closely with digital design engineers, systems engineers, and other stakeholders to ensure seamless integration of analog and digital components. * Technical Leadership: Provide technical guidance and mentorship to junior engineers and contribute to the development of best practices and design methodologies. * Design Verification: Conduct comprehensive simulations and testing to validate design performance and reliability. Address any issues and implement corrective actions as needed. * Documentation: Create detailed design documentation, including specifications, schematics, and design reports. Ensure that all design activities are well-documented and comply with internal and external standards. * Innovation: Stay abreast of industry trends and emerging technologies. Propose and implement innovative solutions to enhance product performance and capabilities with focus on low power circuit design. * Circuit Reliability: Ensure designs meet EM/IR/Aging requirements. * Layout: Ensure layouts meet high analog standards for matching and performance. ## Qualifications * Advanced degree in Electronics/Microelectronics Engineering or related discipline. * 10-15 years of analog circuit design experience. * Expertise in high-speed DDR I/O interface design and optimization - emphasis on DDR5/DDR6 IO architecture, Client/Data Center Server circuits and system design, validation. * In-depth knowledge of analog Rx/Tx design, including signal integrity and noise immunity. * Proficiency with analog design tools (e.g., Cadence Virtuoso, Maestro, Spectre, HSPICE) and simulation techniques. * Strong understanding of signal integrity. * Strong understanding of general analog design principles and methodologies. * Excellent verbal and written communication skills in English. ## Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog & Connectivity, and Power. With a diverse team of over 22,000 professionals in more than 30 countries, we continue to expand our boundaries to offer enhanced user experiences through digitalization and usher into a new era of innovation. We design and develop sustainable, power-efficient solutions today that help people and communities thrive tomorrow, ‘To Make Our Lives Easier.’ At Renesas, you can: * Launch and advance your career in technical and business roles across four Product Groups and various corporate functions. You will have the opportunities to explore our hardware and software capabilities and try new things. * Make a real impact by developing innovative products and solutions to meet our global customers' evolving needs and help make people’s lives easier, safe and secure. * Maximize your performance and wellbeing in our flexible and inclusive work environment. Our people-first culture and global support system, including the remote work option and Employee Resource Groups, will help you excel from the first day. Are you ready to own your success and make your mark? Join Renesas. Shape Your Future with Us. Renesas Electronics is an equal opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state or local law. For more information, please read our [Diversity & Inclusion Statement](https://jobs.renesas.com/diversity-and-inclusion). Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. 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As a member of the UC organization, you’ll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS. Within AWS UC, Amazon Dedicated Cloud (ADC) roles engage with AWS customers who require specialized security solutions for their cloud services. The SIP (Signal-Integrity & Packaging) team is part of Annapurna-Lab’s Chip development team. The team is dealing with the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives. The team’s work includes close work with the BackEnd team on integrating these interfaces to the Die, the package layout design of the BGA’s substrate, Signal and power integrity simulations, and working with the system team to come up with optimal pin-out and optimal PCB breakout schemes. We are looking for highly motivated Electrical Engineering graduates, or engineers with up to 3 years' experience in related fields, to join our growing team specializing in Signal Integrity and IC Package Design. The position offers a unique entry point into a diverse and multidisciplinary domain Key job responsibilities As a SIP engineer, you will be invoved in: • Work on cutting edge high-speed interfaces such as PCIe, DDR and Ethernet. • End-to-end solution of high-speed interfaces; from floor-planning at the DIE level, through Package and PCB routing, addressing both robust SI/PI considerations as well as optimizing layout routing. • Signal and power integrity modeling and simulation of high-speed interconnects using advanced SI/PI simulation tools. • Hands-on lab work involving oscilloscopes, spectrum analyzers, and other RF/mixed-signal measurement equipment, for advanced electrical characterization. You will undergo a comprehensive training program, providing you with the essential knowledge and skills required to succeed in this field. The work is multidisciplinary, bridging physical design, electromagnetic theory, and practical engineering challenges. About the team Diverse Experiences AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Why AWS? Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Inclusive Team Culture AWS values curiosity and connection. Our employee-led and company-sponsored affinity groups promote inclusion and empower our people to take pride in what makes us unique. Our inclusion events foster stronger, more collaborative teams. Our continual innovation is fueled by the bold ideas, fresh perspectives, and passionate voices our teams bring to everything we do. Mentorship & Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Work/Life Balance We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why flexible work hours and arrangements are part of our culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud. Basic Qualifications: - • BSc in Electrical Engineering or Electrical Engineering and Physics. Make sure to include a grade sheet with your CV, in a single PDF. - • Strong foundations in physics and electromagnetics Preferred Qualifications: - • Communication, Electromagnetics, Signal processing, Microelectrinics - • Previous experience with lab equipment (e.g oscilloscope, spectrum analyzer) is a strong advantage - • Familiarity with simulation/extraction tools (e.g. HFSS, Sigrity, HSpice) - an advantage Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. 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Business partnership; First mile stakeholders; Middle mile stakeholders; Operational AMZL Teams; Transportation functions; Senior management; Senior stakeholders; Functional teams; Individuals at all levels", "projectManagementSkills" : [ "Cross-functional projects", "Action plans" ], "domainKnowledge" : "EU Operations; Fast network; Ultra fast network; SD network programs; In-station operations; Seasonal peak demand; Customer order cut offs; End to end performance", "domainList" : [ "eu-operations", "fast-network", "ultra-fast-network", "sd-network-programs", "in-station-operations", "seasonal-peak-demand", "customer-order-cut-offs", "end-to-end-performance" ], "domainSpecificKnowledge" : [ "EU Operations", "Fast network", "Ultra fast network", "SD network programs", "In-station operations", "Seasonal peak demand", "Customer order cut offs", "End to end performance" ], "toolProficiency" : [ "Microsoft Excel" ], "communicationSkills" : "Presentations to customers; Presentations to stakeholders; Presentations to teammates; Communication with senior management", "problemSolvingSkills" : "Solving complex problems; Solving ambiguous problems", "outcomesObjectives" : "Deliver actionable insights; Impact daily business; Improve customer experience; Increase reliability; Increase consistent delivery; Remove pipeline defects; Deliver performance improvement", "qualificationsBasic" : "Bachelor's degree, Experience building measures and metrics, Developing reporting solutions, Experience in logistics, Transportation experience, Supply chain experience, Import/export operations experience, Data entry experience, Data administration experience, Experience working with cross-functional teams, Advanced Microsoft Excel knowledge, Fluent English speaking, Fluent English writing, Fluent English reading", "qualificationsPreferred" : "Master's degree, Experience communicating presentations, Experience delivering presentations, Experience managing multiple projects, Meeting aggressive deadlines, Managing multiple competing priorities, Engaging senior executives, Influencing senior executives", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "[This role can be based in Luxembourg, London, Munich, Paris, Milan, Madrid] Speed is one of the key growth pillar for EU Operations. We are the forefront of this transformational change offering and building services and network that are at the leading end of Fast and ultra fast network. The Speed Program Team drives the SD network programs with cost-optimal and speed and quality aware solutions for in-station operations, year-round and enabling the business to scale for seasonal peak demand increases. The ideal candidate is passionate about leveraging data to deliver actionable insights that impact daily business, has a strong delivery record and experienced in driving execution in a cross-functional environment, backed by analysis and data. They thrive in a fast-paced environment, relish working with large amounts of data, and enjoys the challenge of solving highly complex, and sometimes ambiguous problems. We are now looking to hire a passionate, dynamic, analytical, innovative, hands-on and customer-obsessed candidate to support network optimization. The Speed Programs Analyst act as the lead on driving network performance (quality, speed and cost) through projects and network initiatives, and will form a business partnership with first and middle mile stakeholders and operational AMZL Teams. You will play a key role in developing and deploying network speed initiatives, delivering our vision to improve customer order cut offs and driving great customer experience, as well as in our cost out activities and asset utilization. A significant proportion of role will be identifying and implementing design and process solutions that increase the reliability and consistent delivery of end to end performance, removing defects from the pipeline and deliver a corresponding improvement. The role will own the approval from senior functional leaders to enable strategies to improve performance and schedule cross-functional resource allocation efficiently and effectively. You will work closely with our Transportation functions and will be a natural self-starter who is comfortable supporting complex cross functional projects and action plans. You will have a true hands-on approach, the ability to generate solutions, strong process management skills, and be an effective communicator. This position involves regular communication with senior management on network performance, risks and time critical mitigation activities. In order to be successful in this position, you need to be comfortable interfacing with senior stakeholders as well as driving various functional teams and individuals at all levels of the organization. Keeping an open mind, sense of humor, drive and ambition will help you remain innovative in our culture. This will be an exciting opportunity for you to possess a high level of autonomy, drive real operational improvements while managing a variety of job responsibilities. Basic Qualifications: - Bachelor's degree - Experience building measures and metrics, and developing reporting solutions - Experience in logistics, transportation, supply chain, import/export operations, or data entry/data administration - Experience working with cross-functional teams - Knowledge of Microsoft Excel at an advanced level, including: pivot tables, macros, index/match, vlookup, VBA, data links, etc. - Speak, write, and read fluently in English Preferred Qualifications: - Master's degree - Experience communicating and delivering presentations to customers, stakeholders, and/or teammates - Experience managing multiple projects and meeting aggressive deadlines - Experience in managing multiple, competing priorities simultaneously - Experience engaging and influencing senior executives, demonstrating a strong familiarity with decision-making processes in enterprise customers Amazon is an equal opportunities employer. We believe passionately that employing a diverse workforce is central to our success. We make recruiting decisions based on your experience and skills. We value your passion to discover, invent, simplify and build. Protecting your privacy and the security of your data is a longstanding top priority for Amazon. Please consult our Privacy Notice ( https://www.amazon.jobs/en/privacy_page ) to know more about how we collect, use and transfer the personal data of our candidates. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. 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"qualificationsBasic" : "PhD in Electrical Engineering, Physics, Photonics, or related discipline, 3 years of industry experience, Silicon photonics device design, layout, and testing experience, Integrated silicon photonics components design experience, Modeling and data analysis in Python experience, Experience with integrated lasers, SOAs, Excellent communication skills, Demonstrated ability to collaborate effectively with multidisciplinary teams, Demonstrate problem solving skills", "qualificationsPreferred" : "Layout experience with foundry PDKs, Code-based GDS creation experience, Experience with optical and electronic test equipment, Wafer-level testing experience, Statistical data analysis experience, Project execution skills, Ability to handle multiple priorities, Ability to meet project milestones", "remoteFriendly" : true, "workSiteFlexibility" : "Hybrid", "rawDescription" : "Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter! If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders. Lightmatter is (re)inventing the future of computing with light! We are hiring a Photonics Design Engineer to join our development team. In this role, you will design, layout, and test silicon photonics devices for an integrated and scalable laser system.You will collaborate closely with cross-functional teams including photonics, packaging, systems, and software to define and refine specifications, ensuring that all designs meet or exceed performance targets and align with product requirements. Join a tight-knit team where each individual’s contributions directly influence the success of the company and product. You'll have the opportunity to build innovative laser solutions from the ground up and tackle groundbreaking challenges. Work with people who love to build and who thrive in diverse technical environments where great ideas are prioritized. Key Responsibilities: Design and optimize silicon photonic devices for laser systems, including couplers, muxes, rings, switches, and other active and passive components. Layout device test structures as well as complex integrated photonic systems. Work with the characterization team to develop and execute test plans for device validation, analyzing results to assess performance and troubleshoot issues. Work closely with packaging and systems engineering teams to address integration challenges, ensuring high alignment between device and system requirements. Implement rigorous simulation, modeling, and testing methodologies to calibrate designs and optimize performance across manufacturing variability. Engage in problem solving and contribute to new device designs and architectures. Publish novel photonics results, and participate in premier optics/photonics conferences. Required Qualifications: PhD in Electrical Engineering, Physics, Photonics, or related discipline with 3 years of industry experience Experience in silicon photonics device design, layout, and testing, ideally in a product development environment Demonstrated track record of designing integrated silicon photonics components using Lumerical, Tidy3D, or equivalent Proficiency in modeling and data analysis in Python Experience with integrated lasers, SOAs Excellent communication skills, with a demonstrated ability to collaborate effectively with multidisciplinary teams Demonstrate strong problem solving skills in problems that do not have obvious solutions Can-do, positive attitude Preferred Qualifications: Experience doing layout with foundry PDKs Experience with code-based GDS creation such as GDS Factory or similar Experience with optical and electronic test equipment, wafer-level testing and statistical data analysis (e.g., optical spectrum analyzers, tunable lasers, OBR/OVA, oscilloscopes, BERT). Strong project execution skills, with the ability to handle multiple priorities and meet project milestones. We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data. Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution. $200,000—$225,000 USD Benefits Comprehensive Health Care Plan (Medical, Dental & Vision) Retirement Savings Matching Program Life Insurance (Basic, Voluntary & AD&D) Generous Time Off (Vacation, Sick & Public Holidays) Paid Family Leave Short Term & Long Term Disability Training & Development Commuter Benefits Flexible, hybrid workplace model Equity grants (applicable to full-time employees) Benefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law. Export Control Candidates should have capacity to comply with the federally mandated requirements of U. S. export control laws.", "summaryDescription" : "Photonics Design Engineer at Lightmatter. Skills: Silicon photonics, Device design, Laser systems. Design silicon photonic devices. Optimize silicon photonic devices", "postedDate" : "2026-06-15T23:20:13.535", "createdAt" : "2026-06-15T23:20:13.535", "lastUpdated" : "2026-06-16T08:02:54.267", "ingestTimestamp" : "2026-06-15T23:20:13.535", "mongoId" : "6a3051a1f292fd229cf03978", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 200000, "salaryAnnualMax" : 225000, "salaryBand" : "200k+", "hasSalary" : true, "allSkills" : [ "Silicon photonics", "Integrated photonics", "Laser systems", "Data analysis", "Device design", "Device layout", "Device testing", "Problem solving", "AI data center infrastructure", "HPC workloads", "Lumerical", "Tidy3D", "Python" ], "skillCount" : 13, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Lead", "dataQualityScore" : 1.0, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a30510bf292fd229cef8947", "title" : "Senior Design Engineer", "company" : "Newsela", "industry" : "Education", "salary" : { "min" : 118000.0, "max" : 135000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Remote - FTE", "locations" : [ "Remote - FTE" ], "timestamp" : "2026-06-16T06:54:54.482", "fingerprint" : "54085d5a9a79a52f9f542593e8dd3a2de57d6db5fc38474975525fc529cc04a9", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/newsela/jobs/7998049", "externalId" : "7998049", "industryFunction" : { }, "structuredLocations" : [ { "country" : "United States", "continent" : "na", "workMode" : "remote" } ], "locationText" : "United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 6, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "React, TypeScript, HTML, CSS, AI tools", "professionalSkills" : [ "Design intent translation", "Technical realization", "User problem articulation", "Business problem articulation", "Solution proposal", "Interaction prototyping", "State prototyping", "Motion prototyping", "Idea validation", "Intent communication", "Feedback reception", "Feedback giving" ], "hardSkillsList" : [ "Front-end implementation", "Accessibility standards", "User research", "Qualitative research", "Quantitative research" ], "hardSkills" : [ { "name" : "Front-end implementation", "level" : "intermediate" }, { "name" : "Accessibility standards", "level" : "intermediate" }, { "name" : "User research", "level" : "intermediate" }, { "name" : "Qualitative research", "level" : "intermediate" }, { "name" : "Quantitative research", "level" : "intermediate" } ], "majorSkills" : "UI/UX design, Front-end implementation, Design systems", "majorSkillsList" : [ "UI/UX design", "Front-end implementation", "Design systems" ], "coreResponsibilities" : "Own design experience, Own technical realization, Understand user problems, Articulate user problems, Understand business problems, Articulate business problems, Engage with users, Surface pain points, Support day-to-day improvements, Propose design solutions, Translate design intent, Write production code, Develop engineering fluency, Unblock designers, Bridge design and engineering, Establish design system, Maintain design system, Manage component library, Manage Storybook documentation, Build design principles repository, Maintain design principles repository, Prototype complex interactions, Prototype complex states, Prototype complex motion, Inform design direction, Document decisions, Document specifications, Give actionable feedback, Receive actionable feedback, Partner cross-functionally, Leverage AI tools", "teamCollaboration" : "Partner with Design; Partner with Engineering; Partner with UX Research; Partner with Data; Partner with Content; Partner with Marketing; Cross-functional partnering", "domainKnowledge" : "Web platform; Mobile-web platform; Design systems as code; Accessibility standards; WCAG", "domainList" : [ "web-platform", "mobile-web-platform", "design-systems-as-code", "accessibility-standards", "wcag" ], "domainSpecificKnowledge" : [ "Web platform", "Mobile-web platform", "Design systems as code", "Accessibility standards", "WCAG" ], "toolProficiency" : [ "Figma", "Storybook", "GitHub Copilot", "Cursor", "V0" ], "documentationSkills" : "Design specifications; Component library documentation", "continuousLearning" : "Learning allowance; External training sessions; Classes; Workshops; Conferences; Educational materials", "innovationCreativity" : "Prototype complex interactions; Prototype complex states; Prototype complex motion; Validate ideas quickly; Experiment; Iterate", "problemSolvingSkills" : "Problem identification; Solution design; Feasibility assessment", "outcomesObjectives" : "Improve product daily; Scale quality and consistency", "qualificationsBasic" : "6+ years product/UX design, 6+ years front-end engineering, Expert-level Figma, Production front-end code, React proficiency, TypeScript proficiency, Modern HTML/CSS proficiency, Shipped pixel-accurate code, Shipped accessible code, Building design systems as code, Maintaining design systems as code, Incorporating accessibility standards, Leverage quantitative research, Leverage qualitative research, Document decisions clearly, Document specifications clearly, Give actionable feedback, Receive actionable feedback, Partner cross-functionally, Leverage AI tools", "qualificationsPreferred" : "Backend experience welcome, Full-stack experience welcome, Motion Design knowledge, Animation using Rive knowledge", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "The role: As a Senior Design Engineer, you will work at the intersection of design and engineering, splitting your time roughly 50/50 between UI/UX design and hands-on front-end implementation (flexible toward 60/40 engineering and beyond for the right person). You will own both the design experience and its technical realization for the products that empower our content creators to develop the content teachers and students use, with a focus on building a product that improves every day. Why you’ll love this role: Understand and articulate user and business problems, engaging with users frequently to surface pain points and support day-to-day improvements, then propose thoughtful, feasible design solutions. Translate design intent (your own and other designers’) into high-quality, accessible, production-ready front-end code that faithfully matches the design vision. Develop deep fluency in our engineering ecosystem (architecture, component libraries, APIs, build tooling, and constraints) and use it to unblock designers and bridge design and engineering. Establish and maintain a design system as living code, keeping our design sources of truth accurate and up to date, and managing the component library and its documentation in Storybook. Build and maintain a shared repository of design principles the team consistently follows, so quality and consistency scale across people and products. Prototype complex interactions, states, and motion to validate ideas quickly and communicate intent precisely. Reporting to the Product Design Manager, partner closely with Design, Engineering, UX Research, Data, Content, and Marketing to align on problems, define solutions, and ensure feasibility. Why you’re a great fit: 6+ years spanning product/UX design and front-end engineering, with genuine depth in both rather than one: expert-level Figma, and proficiency writing production front-end code (e.g., React, TypeScript, modern HTML/CSS) within an existing codebase. Backend or full-stack experience is welcome and a strong plus; the role can flex toward engineering for candidates who lean that way. A proven track record of taking designs from concept through to shipped, pixel-accurate, accessible code, and of helping other designers get their work implemented faithfully. Strong understanding of web and mobile-web platform technologies; you know when to use broad-stroke sketches, lean on the design system, or apply pixel-perfect attention to detail. Hands-on experience building and maintaining design systems as code (including Storybook), and incorporating accessibility standards (e.g., WCAG) into both specs and shipped code. You leverage quantitative and qualitative research on user pain points and goals to inform your design direction and document decisions and specifications clearly. You give and receive actionable feedback with a collaborative mindset, partnering cross-functionally (Product, Engineering, UX Research, Data, Content, Marketing) at all stages of the product life cycle. You actively leverage AI tools (e.g., GitHub Copilot, Cursor, v0, and AI features within Figma) to expedite exploration, accelerate craft, and pressure-test ideas, as a force multiplier for design judgment rather than a replacement for it. You bring a “try anything once” attitude, unintimidated by unfamiliar tools, techniques, or problem spaces and eager to experiment, learn quickly, and iterate. While not required, knowledge of Motion Design or animation using Rive would be a plus. All offers of employment are contingent upon the successful completion of a background check as part of our pre-employment process. Why you’ll love working at Newsela: Health & Wellness: Comprehensive medical benefits with employer contribution to premiums and to HSA accounts. Additional benefits such as gym reimbursement, pet insurance, free access to the Calm app, Rocket Lawyer and more to help you stay healthy: mind, body, and soul. Work From Home: We are a fully remote company. We provide a monthly tech stipend to support your WFH needs! Supporting ALL Families: Inclusive benefits to support you and your family, including parental leave, fertility support, adoption, and more! Financial Wellbeing: Invest in your future with our 401(k) plan, which includes a employer match to help you build long-term financial security. Time Off: Flexible PTO, paid sick time off, company holidays plus winter break (Dec 24th - Jan 1st). Professional Development: Newsela offers an annual learning and development allowance to employees to attend external training sessions, classes, workshops, conferences, and educational materials to foster professional growth within their current role and career aspirations at Newsela. Make A Difference: No matter your role or department, the work you do each day helps share the future of education and improves the lives of students and teachers. About Newsela: Newsela is a leading education technology company dedicated to meaningful classroom learning for every student. We deliver integrated, AI-powered solutions designed to unlock student engagement, empower teachers, and drive meaningful learning outcomes. Our suite of products supports knowledge and skill development, writing practice, daily instruction, assessment, and data-informed decision-making across K–12 classrooms. Grounded in learning science research, Newsela’s solutions integrate content, assessment, and analytics to help educators track progress, understand student outcomes, and deliver high-impact instruction that supports every learner. #LI-Remote Final compensation will be determined based on the candidate’s individual skills, qualifications, and experience. Total compensation for this role also includes incentive stock options and benefits. Base Compensation Range $118,000—$135,000 USD", "summaryDescription" : "Senior Design Engineer at Newsela. Skills: UI/UX design, Front-end implementation, Design systems. Own design experience. Own technical realization", "postedDate" : "2026-06-15T23:15:50.102", "createdAt" : "2026-06-15T23:15:50.102", "lastUpdated" : "2026-06-16T06:54:54.482", "ingestTimestamp" : "2026-06-15T23:15:50.102", "mongoId" : "6a30510bf292fd229cef8947", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 118000, "salaryAnnualMax" : 135000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Front-end implementation", "Accessibility standards", "User research", "Qualitative research", "Quantitative research", "UI/UX design", "Design systems", "Design intent translation", "Technical realization", "User problem articulation", "Business problem articulation", "Solution proposal", "Interaction prototyping", "State prototyping", "Motion prototyping", "Idea validation", "Intent communication", "Feedback reception", "Feedback giving", "Web platform", "Mobile-web platform", "Design systems as code", "WCAG", "Figma", "Storybook", "GitHub Copilot", "Cursor", "V0" ], "skillCount" : 28, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 1.0, "daysOld" : 0, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Education", "llmIndustryConfidence" : 0.95 }, { "id" : "69f4a7e74c40e2acd1c64752", "title" : "Applied Scientist, Speed + AI", "company" : "Amazon.com Services LLC", "industry" : "Machine Learning Science, Applied Science, operations", "salary" : { "min" : 136000.0, "max" : 184000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Bellevue, Washington, USA", "locations" : [ "Bellevue, Washington, USA" ], "certifications" : [ "GCP Professional Data Engineer", "AWS Data Analytics", "Databricks Certified", "Dbt Certified" ], "timestamp" : "2026-06-16T04:31:16.038", "fingerprint" : "bfb65876da2e5fdc0b29d631dd5dce92df0ee43ddf506061d8e6ed45e34fa7a1", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.jobs/jobs/10408753/apply", "externalId" : "24e7cdc5-6e9f-420c-8637-9e5daefc35f0", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bellevue", "state" : "Washington", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "47.6144219,-122.1923370" } ], "locationText" : "Bellevue, Washington, United States", "employmentType" : "FULL_TIME", "technicalSkills" : "SQL, Python, R, Spark, Machine Learning, Data Engineering, Cloud Platforms, Data Warehousing, ETL, Statistical Modeling, A/B Testing, AWS, GCP, Azure, Tableau, Power BI, Looker, Snowflake, BigQuery, Redshift, Databricks, Dbt, Fivetran, Airflow, Scikit-learn, TensorFlow, PyTorch, XGBoost, LightGBM, Hugging Face, MLflow", "professionalSkills" : [ "Quantitative analysis", "Business intelligence", "Analytics engineering" ], "hardSkillsList" : [ "Data modeling", "Algorithm development", "Statistical analysis", "Data manipulation", "Data visualization" ], "hardSkills" : [ { "name" : "Data modeling", "level" : "intermediate" }, { "name" : "Algorithm development", "level" : "intermediate" }, { "name" : "Statistical analysis", "level" : "intermediate" }, { "name" : "Data manipulation", "level" : "intermediate" }, { "name" : "Data visualization", "level" : "intermediate" } ], "majorSkills" : "Data Science, Machine Learning, Data Engineering", "majorSkillsList" : [ "Data Science", "Machine Learning", "Data Engineering" ], "coreResponsibilities" : "Develop and implement machine learning models, Design and build data pipelines, Perform data analysis and generate insights, Create and maintain dashboards and reports, Collaborate with stakeholders to understand data needs, Stay up-to-date with the latest advancements in data", "teamCollaboration" : "Cross-functional teams; Product managers; Engineering teams", "domainKnowledge" : "E-commerce analytics; Customer behavior analysis; Recommendation systems; Supply chain optimization", "domainList" : [ "e-commerce-analytics", "customer-behavior-analysis", "recommendation-systems", "supply-chain-optimization" ], "domainSpecificKnowledge" : [ "E-commerce analytics", "Customer behavior analysis", "Recommendation systems", "Supply chain optimization" ], "toolProficiency" : [ "Tableau", "Power BI", "Looker", "Snowflake", "BigQuery", "Redshift", "Databricks", "Dbt", "Fivetran", "Airflow", "Scikit-learn", "TensorFlow", "PyTorch", "XGBoost", "LightGBM", "Hugging Face", "MLflow" ], "communicationSkills" : "Present findings; Communicate insights", "documentationSkills" : "Document models; Document pipelines", "continuousLearning" : "Attend conferences; Pursue online courses", "innovationCreativity" : "Develop novel solutions; Explore new technologies", "problemSolvingSkills" : "Root cause analysis; Troubleshoot data issues; Analytical thinking", "outcomesObjectives" : "Improve product recommendations; Optimize marketing campaigns; Enhance customer experience", "qualificationsBasic" : "Bachelor's degree, 5+ years of experience in data science or related field, Proficiency in SQL, Experience with Python or R", "qualificationsPreferred" : "Master's degree or PhD, Experience with large-scale data processing, Experience with machine learning frameworks, Experience with cloud platforms (AWS, GCP, Azure), Experience with data visualization tools", "remoteFriendly" : false, "workSiteFlexibility" : "onsite", "rawDescription" : "Why this job is awesome? - This is SUPER high-visibility work: Our mission is to provide consistent, accurate, and relevant delivery information to every single page on every Amazon-owned site. - MILLIONS of customers will be impacted by your contributions: The changes we make directly impact the customer experience on every Amazon site. This is a great position for someone who likes to leverage Machine learning technologies to solve the real customer problems, and also wants to see and measure their direct impact on customers. - We are a cross-functional team that owns the ENTIRE delivery experience for customers: From the business requirements to the technical systems that allow us to directly affect the on-site experience from a central service, business and technical team members are integrated so everyone is involved through the entire development process. - You will have a chance to develop the state-of-art machine learning, including deep learning and reinforcement learning models, to build targeting, recommendation, and optimization services to impact millions of Amazon customers. - Do you want to join an innovative team of scientists and engineers who use machine learning and statistical techniques to deliver the best delivery experience on every Amazon-owned site? - Are you excited by the prospect of analyzing and modeling terabytes of data on the cloud and create state-of-art algorithms to solve real world problems? - Do you like to own end-to-end business problems/metrics and directly impact the profitability of the company? - Do you like to innovate and simplify? If yes, then you may be a great fit to join the Speed + AI team. Key job responsibilities · Research and implement machine learning and GenAI techniques to create scalable and effective models in Delivery Experience (DEX) systems · Solve business problems and identify business opportunities to provide the best delivery experience on all Amazon-owned sites. · Design and develop highly innovative machine learning and deep learning models for big data. · Build state-of-art ranking and recommendations models and apply to Amazon search engine. · Analyze and understand large amounts of Amazon’s historical business data to detect patterns, to analyze trends and to identify correlations and causalities · Establish scalable, efficient, automated processes for large scale data analyses, model development, model validation and model implementation Basic Qualifications: - Experience programming in Java, C++, Python or related language - Experience with SQL and an RDBMS (e.g., Oracle) or Data Warehouse Preferred Qualifications: - Experience implementing algorithms using both toolkits and self-developed code - Have publications at top-tier peer-reviewed conferences or journals Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits . USA, WA, Bellevue - 136,000.00 - 184,000.00 USD annually", "summaryDescription" : "Applied Scientist, Speed + AI at Amazon.com Services LLC. Skills: Data Science, Machine Learning, Data Engineering. Develop and implement machine learning models. Design and build data pipelines", "postedDate" : "2026-06-14T20:12:53.025", "createdAt" : "2026-06-14T20:12:53.025", "lastUpdated" : "2026-06-16T04:31:16.038", "ingestTimestamp" : "2026-06-14T20:12:53.025", "mongoId" : "69f4a7e74c40e2acd1c64752", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.jobs/jobs/10408753/apply", "salaryAnnualMin" : 136000, "salaryAnnualMax" : 184000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Data modeling", "Algorithm development", "Statistical analysis", "Data manipulation", "Data visualization", "Data Science", "Machine Learning", "Data Engineering", "Quantitative analysis", "Business intelligence", "Analytics engineering", "E-commerce analytics", "Customer behavior analysis", "Recommendation systems", "Supply chain optimization", "GCP Professional Data Engineer", "AWS Data Analytics", "Databricks Certified", "Dbt Certified", "Tableau", "Power BI", "Looker", "Snowflake", "BigQuery", "Redshift", "Databricks", "Dbt", "Fivetran", "Airflow", "Scikit-learn", "TensorFlow", "PyTorch", "XGBoost", "LightGBM", "Hugging Face", "MLflow" ], "skillCount" : 36, "jobCategory" : "engineering", "jobSubcategory" : "data", "seniorityLevel" : "Senior", "dataQualityScore" : 0.8888889, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "E-Commerce", "llmIndustryConfidence" : 0.98 }, { "id" : "68e0a7e3ce260f92cbf8ea71", "title" : "Speed Programs Analyst, EU Speed Programs", "company" : "Amazon Business EU SARL (UK)", "industry" : "Supply Chain/Transportation Management, Buying/Planning, transportation and logistics", "salary" : { "min" : 75000.0, "max" : 105000.0, "currency" : "EUR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level Speed Programs Analyst in Luxembourg, Luxembourg, adjusted for company size and industry." }, "location" : "London, England, GBR", "locations" : [ "London, England, GBR" ], "timestamp" : "2026-06-15T05:45:12.928", "fingerprint" : "2d3fba1b5b608747e4b7eaa6d46c21491df5ee39589741c5218a9b671678c701", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/3100653/apply", "externalId" : "a3131340-2f7f-421e-9b6e-d86d08af02d8", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Luxembourg", "country" : "Luxembourg", "continent" : "eu", "source" : "llm", "workMode" : "onsite", "geo" : "49.6112768,6.1297990" }, { "city" : "London", "country" : "United Kingdom", "continent" : "eu", "source" : "llm", "workMode" : "onsite", "geo" : "51.5074456,-0.1277653" }, { "city" : "Munich", "state" : "Bavaria", "country" : "Germany", "continent" : "eu", "source" : "llm", "workMode" : "onsite", "geo" : "48.1371079,11.5753822" }, { "city" : "Paris", "country" : "France", "continent" : "eu", "source" : "llm", "workMode" : "onsite", "geo" : "48.8534951,2.3483915" }, { "city" : "Milan", "state" : "Lombardy", "country" : "Italy", "continent" : "eu", "source" : "llm", "workMode" : "onsite", "geo" : "45.4641943,9.1896346" }, { "city" : "Madrid", "state" : "Community of Madrid", "country" : "Spain", "continent" : "eu", "source" : "llm", "workMode" : "onsite", "geo" : "40.4167820,-3.7035070" } ], "locationText" : "Luxembourg, Luxembourg; London, United Kingdom; Munich, Bavaria, Germany; Paris, France; Milan, Lombardy, Italy; Madrid, Community of Madrid, Spain", "employmentType" : "FULL_TIME", "professionalSkills" : [ "Network performance", "Process management", "Resource allocation" ], "hardSkillsList" : [ "Data analysis", "Problem solving" ], "hardSkills" : [ { "name" : "Data analysis", "level" : "intermediate" }, { "name" : "Problem solving", "level" : "intermediate" } ], "majorSkills" : "Network optimization, Operational metrics, Cross-functional execution", "majorSkillsList" : [ "Network optimization", "Operational metrics", "Cross-functional execution" ], "coreResponsibilities" : "Drive network performance, Develop network speed initiatives, Improve customer order cut offs, Drive cost out activities, Improve asset utilization, Identify design solutions, Implement process solutions, Increase reliability, Deliver end to end performance, Remove defects from pipeline, Obtain approval from senior leaders, Schedule cross-functional resource allocation, Support complex cross functional projects, Support action plans, Generate solutions, Communicate network performance, Communicate risks, Communicate mitigation activities, Drive functional teams, Drive individuals", "teamCollaboration" : "Cross-functional environment; First and middle mile stakeholders; Operational AMZL Teams; Transportation functions; Senior stakeholders; Functional teams; Individuals at all levels", "projectManagementSkills" : [ "Project execution", "Complex projects", "Action plans" ], "domainKnowledge" : "EU Operations; Fast network; Ultra fast network; SD network programs; In-station operations; Seasonal peak demand", "domainList" : [ "eu-operations", "fast-network", "ultra-fast-network", "sd-network-programs", "in-station-operations", "seasonal-peak-demand" ], "domainSpecificKnowledge" : [ "EU Operations", "Fast network", "Ultra fast network", "SD network programs", "In-station operations", "Seasonal peak demand" ], "toolProficiency" : [ "Microsoft Excel" ], "communicationSkills" : "Communicating with senior management; Communicating with senior stakeholders; Effective communicator", "problemSolvingSkills" : "Problem solving; Analytical thinking", "outcomesObjectives" : "Deliver actionable insights; Impact daily business; Improve customer experience; Increase reliability; Deliver performance improvement; Improve performance", "qualificationsBasic" : "Bachelor's degree or equivalent, Deep dive operational metrics, Network planning or logistics/operations management role, Interacting with cross-functional teams, Proficient with Microsoft Excel, Fluent in written and spoken English", "qualificationsPreferred" : "Master's degree or equivalent, Presentations and whiteboarding skills, Prioritizing and handling multiple assignments, Completing complex tasks quickly, Sound business judgment, Proven ability to influence others, Analytical thinking skills", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "[This role can be based in Luxembourg, London, Munich, Paris, Milan, Madrid] Speed is one of the key growth pillar for EU Operations. We are the forefront of this transformational change offering and building services and network that are at the leading end of Fast and ultra fast network. The Speed Program Team drives the SD network programs with cost-optimal and speed and quality aware solutions for in-station operations, year-round and enabling the business to scale for seasonal peak demand increases. The ideal candidate is passionate about leveraging data to deliver actionable insights that impact daily business, has a strong delivery record and experienced in driving execution in a cross-functional environment, backed by analysis and data. They thrive in a fast-paced environment, relish working with large amounts of data, and enjoys the challenge of solving highly complex, and sometimes ambiguous problems. We are now looking to hire a passionate, dynamic, analytical, innovative, hands-on and customer-obsessed candidate to support network optimization. The Speed Programs Analyst act as the lead on driving network performance (quality, speed and cost) through projects and network initiatives, and will form a business partnership with first and middle mile stakeholders and operational AMZL Teams. You will play a key role in developing and deploying network speed initiatives, delivering our vision to improve customer order cut offs and driving great customer experience, as well as in our cost out activities and asset utilization. A significant proportion of role will be identifying and implementing design and process solutions that increase the reliability and consistent delivery of end to end performance, removing defects from the pipeline and deliver a corresponding improvement. The role will own the approval from senior functional leaders to enable strategies to improve performance and schedule cross-functional resource allocation efficiently and effectively. You will work closely with our Transportation functions and will be a natural self-starter who is comfortable supporting complex cross functional projects and action plans. You will have a true hands-on approach, the ability to generate solutions, strong process management skills, and be an effective communicator. This position involves regular communication with senior management on network performance, risks and time critical mitigation activities. In order to be successful in this position, you need to be comfortable interfacing with senior stakeholders as well as driving various functional teams and individuals at all levels of the organization. Keeping an open mind, sense of humor, drive and ambition will help you remain innovative in our culture. This will be an exciting opportunity for you to possess a high level of autonomy, drive real operational improvements while managing a variety of job responsibilities. Basic Qualifications: - - Bachelor's degree or equivalent - - Experience in deep diving operational metrics and problem solving - - Work experience within a network planning or logistics/operations management role - - Experience interacting with cross-functional teams - Proficient with Microsoft Excel - Fluent in written and spoken English Preferred Qualifications: - Master's degree or equivalent - Knowledge of presentations and whiteboarding skills with a high degree of comfort speaking with internal and external executives, IT management, and developers - Experience prioritizing and handling multiple assignments at any given time while maintaining commitment to deadlines, or experience with Microsoft Office products and applications - Experience prioritizing and handling multiple assignments at any given time while maintaining commitment to deadlines, or experience completing complex tasks quickly with little to no guidance and react with appropriate urgency to situations that require a quick turnaround - - Sound business judgment, proven ability to influence others, and strong analytical thinking skills Amazon is an equal opportunities employer. We believe passionately that employing a diverse workforce is central to our success. We make recruiting decisions based on your experience and skills. We value your passion to discover, invent, simplify and build. Protecting your privacy and the security of your data is a longstanding top priority for Amazon. Please consult our Privacy Notice ( https://www.amazon.jobs/en/privacy_page ) to know more about how we collect, use and transfer the personal data of our candidates. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "Speed Programs Analyst, EU Speed Programs at Amazon Business EU SARL (UK). Skills: Network optimization, Operational metrics, Cross-functional execution. Drive network performance. Develop network speed initiatives", "postedDate" : "2026-06-13T11:40:50.299", "createdAt" : "2026-06-13T11:40:50.299", "lastUpdated" : "2026-06-15T05:45:12.928", "ingestTimestamp" : "2026-06-13T11:40:50.299", "mongoId" : "68e0a7e3ce260f92cbf8ea71", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/3100653/apply", "salaryBand" : "75k-100k", "hasSalary" : false, "allSkills" : [ "Data analysis", "Problem solving", "Network optimization", "Operational metrics", "Cross-functional execution", "Network performance", "Process management", "Resource allocation", "Project execution", "Complex projects", "Action plans", "EU Operations", "Fast network", "Ultra fast network", "SD network programs", "In-station operations", "Seasonal peak demand", "Microsoft Excel" ], "skillCount" : 18, "jobCategory" : "data", "dataQualityScore" : 0.8888889, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true }, { "id" : "6a2acaa174d8ee00a070c44b", "title" : "Software Engineer SMTS", "company" : "Salesforce", "industry" : "Technology", "salary" : { "min" : 3500000.0, "max" : 5500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Senior Software Engineers in SaaS in India, adjusted for Salesforce's size and industry, and the Seniority level." }, "location" : "India", "locations" : [ "India" ], "timestamp" : "2026-06-14T04:24:16.836", "fingerprint" : "908aed12cc62208d9ae2eac8e8b8e6867dc1014c86a8999962d9d4f8cbdefbf7", "source" : "workday", "language" : "en", "applyUrl" : "https://salesforce.wd12.myworkdayjobs.com/External_Career_Site/job/India---Hyderabad/Software-Engineer-SMTS_JR338173", "externalId" : "JR338173", "industryFunction" : { }, "locationPoint" : "20.5937,78.9629", "structuredLocations" : [ { "country" : "India", "continent" : "as", "workMode" : "onsite" } ], "locationText" : "India", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "AI, Java, Kafka, Elastic Search, Terraform, Kubernetes, Docker", "professionalSkills" : [ "System design", "AI development tools" ], "hardSkillsList" : [ "Prompt engineering", "Code evaluation" ], "hardSkills" : [ { "name" : "Prompt engineering", "level" : "intermediate" }, { "name" : "Code evaluation", "level" : "intermediate" } ], "majorSkills" : "AI, Software Engineering, System Integration", "majorSkillsList" : [ "AI", "Software Engineering", "System Integration" ], "coreResponsibilities" : "Build and ship production-grade software, Use AI in development workflow, Design systems integrating AI agents, Contribute to building shared system context, Evaluate code for correctness, Evaluate code for quality, Evaluate code for security, Evaluate code for performance", "teamCollaboration" : "Autonomous teams", "domainKnowledge" : "AI CRM; Agentic era; Customer success", "domainList" : [ "ai-crm", "agentic-era", "customer-success" ], "domainSpecificKnowledge" : [ "AI CRM", "Agentic era", "Customer success" ], "toolProficiency" : [ "Claude Code", "GitHub Copilot", "Codex", "Cursor", "Terraform", "Kubernetes", "Docker" ], "continuousLearning" : "On-demand training", "innovationCreativity" : "Driving innovation", "problemSolvingSkills" : "Root cause analysis", "outcomesObjectives" : "Deliver secure code; Deliver optimized code; Deliver high-quality code; Drive efficiency at scale; Drive innovation at scale", "qualificationsBasic" : "Demonstrated AI-first approach to engineering, Experience using AI tools, Advanced prompt engineering skills", "qualificationsPreferred" : "Hands on experience on Java, Hands-on experience with Streaming technologies, Experience with Elastic Search, Experience with Terraform, Kubernetes, Docker, Experience working in a high-paced and rapidly growing multinational organization", "remoteFriendly" : true, "workSiteFlexibility" : "Hybrid", "rawDescription" : "_To get the best candidate experience, please consider applying for a maximum of 3 roles within 12 months to ensure you are not duplicating efforts._ Job Category Software Engineering Job Details ****About Salesforce**** Salesforce is the #1 AI CRM, where humans with agents drive customer success together. Here, ambition meets action. Tech meets trust. And innovation isn’t a buzzword — it’s a way of life. The world of work as we know it is changing and we're looking for Trailblazers who are passionate about bettering business and the world through AI, driving innovation, and keeping Salesforce's core values at the heart of it all. Ready to level-up your career at the company leading workforce transformation in the agentic era? You’re in the right place! Agentforce is the future of AI, and you are the future of Salesforce. ## About Salesforce We’re Salesforce, the Customer Company, inspiring the future of business with AI+ Data +CRM. Leading with our core values, we help companies across every industry blaze new trails and connect with customers in a whole new way. And, we empower you to be a Trailblazer, too — driving your performance and career growth, charting new paths, and improving the state of the world. If you believe in business as the greatest platform for change and in companies doing well and doing good– you’ve come to the right place. ## Role Description Salesforce has immediate opportunities for software developers who want their lines of code to have significant and measurable positive impact for users, the company's bottom line, and the industry. You will be working with a group of world-class engineers to build the breakthrough features our customers will love, adopt, and use while keeping our trusted CRM platform stable and scalable. The software engineer role at Salesforce encompasses architecture, design, implementation, and testing to ensure we build products right and release them with high quality. We pride ourselves on writing high quality, maintainable code that strengthens the stability of the product and makes our lives easier. We embrace the hybrid model and celebrate the individual strengths of each team member while cultivating everyone on the team to grow into the best version of themselves. We believe that autonomous teams with the freedom to make decisions will empower the individuals, the product, the company, and the customers they serve to thrive. ## Your Impact As a Senior Member of Technical Staff (SMTS), Software Engineering, your job responsibilities will include: * Build and ship high-quality, production-grade software using modern engineering practices, with AI as a core part of your development workflow by pushing the boundaries of AI development tools to deliver secure, optimized, and high-quality code. * Design and orchestrate complex systems where AI agents integrate seamlessly into human workflows, driving efficiency and innovation at scale. * Contribute to building and maintaining the shared system context, an explicit repository of system designs, constraints, and standards that enables AI to operate accurately and reliably. * Critically evaluate code (Human or AI-generated) for correctness, quality, security, and performance. ## Required Skills: * A demonstrated, genuine AI-first approach to engineering. Using AI to move faster, build fluency across the stack, and contribute well beyond your core specialty. * Experience using AI tools (e.g., Claude Code, GitHub Copilot, Codex, Cursor, etc.) in development workflows. * Advanced prompt engineering skills and the ability to write precise, structured prompts and cultivate the system context that makes AI outputs reliable, secure, and production-ready. ## Preferred Skills: * Hands on experience on Java is must * Hands-on experience with Streaming technologies like Kafka * Experience with Elastic Search * Experience with Terraform, Kubernetes, Docker * Experience working in a high-paced and rapidly growing multinational organization ## BENEFITS & PERKS * Comprehensive benefits package including well-being reimbursement, generous parental leave, adoption assistance, fertility benefits, and more! * World-class enablement and on-demand training with[ _Trailhead.com_](http://trailhead.com) * Exposure to executive thought leaders and regular 1:1 coaching with leadership * Volunteer opportunities and participation in our 1:1:1 model for giving back to the community * For more details, visit[ _https://www.salesforcebenefits.com/_](https://www.salesforcebenefits.com/) Unleash Your Potential When you join Salesforce, you’ll be limitless in all areas of your life. Our benefits and resources support you to find balance and _be your best_ , and our AI agents accelerate your impact so you can _do your best_. Together, we’ll bring the power of Agentforce to organizations of all sizes and deliver amazing experiences that customers love. Apply today to not only shape the future — but to redefine what’s possible — for yourself, for AI, and the world. Accommodations If you need a reasonable accommodation during the application or the recruiting process, please submit a request via this [_Accommodations Request Form_](https://careers.mail.salesforce.com/accommodations-request-form?_ga=2.139086459.912759425.1690463420-976932181.1684251251). Please note that Salesforce uses artificial intelligence (AI) tools to help our recruiters assess and evaluate candidates’ resumes and qualifications throughout the recruiting process. Humans will always make any candidate selection and hiring decisions. Please see our [_Candidate Privacy Statement_](https://www.salesforce.com/en-us/wp-content/uploads/sites/4/documents/legal/Privacy/salesforce-candidate-privacy-statement-december-2024.pdf) for more information about how we use your personal data and your rights, including with regard to use of AI tools and opt out options. Posting Statement Salesforce is an equal opportunity employer and maintains a policy of non-discrimination with all employees and applicants for employment. What does that mean exactly? It means that at Salesforce, we believe in equality for all. And we believe we can lead the path to equality in part by creating a workplace that’s inclusive, and free from discrimination. [Know your rights: workplace discrimination is illegal.](https://www.eeoc.gov/know-your-rights-workplace-discrimination-illegal) Any employee or potential employee will be assessed on the basis of merit, competence and qualifications – without regard to race, religion, color, national origin, sex, sexual orientation, gender expression or identity, transgender status, age, disability, veteran or marital status, political viewpoint, or other classifications protected by law. This policy applies to current and prospective employees, no matter where they are in their Salesforce employment journey. It also applies to recruiting, hiring, job assignment, compensation, promotion, benefits, training, assessment of job performance, discipline, termination, and everything in between. Recruiting, hiring, and promotion decisions at Salesforce are fair and based on merit. The same goes for compensation, benefits, promotions, transfers, reduction in workforce, recall, training, and education. ### ### ### ### ### ### ### ###", "summaryDescription" : "Software Engineer SMTS at Salesforce. Skills: AI, Software Engineering, System Integration. Build and ship production-grade software. Use AI in development workflow", "postedDate" : "2026-06-12T01:33:32.708", "createdAt" : "2026-06-12T01:33:32.663", "lastUpdated" : "2026-06-14T04:24:16.836", "ingestTimestamp" : "2026-06-12T01:33:32.663", "mongoId" : "6a2acaa174d8ee00a070c44b", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://salesforce.wd12.myworkdayjobs.com/External_Career_Site/job/India---Hyderabad/Software-Engineer-SMTS_JR338173", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Prompt engineering", "Code evaluation", "AI", "Software Engineering", "System Integration", "System design", "AI development tools", "AI CRM", "Agentic era", "Customer success", "Claude Code", "GitHub Copilot", "Codex", "Cursor", "Terraform", "Kubernetes", "Docker" ], "skillCount" : 17, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 1.0, "daysOld" : 2, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Technology" }, { "id" : "6a305076f292fd229cef089f", "title" : "Electrical Design Engineer", "company" : "Matic", "industry" : "Hardware", "salary" : { "min" : 120000.0, "max" : 200000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Menlo Park, CA", "locations" : [ "Menlo Park, CA" ], "timestamp" : "2026-06-16T10:00:31.991", "fingerprint" : "0c16d4821eb65a8eee354d85b236b04f8dcb2245a6b49e99261e17b25c6de039", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/maticrobots/535fbc23-57ee-41f7-a949-190572402889/application", "externalId" : "535fbc23-57ee-41f7-a949-190572402889", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Menlo Park", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.4519671,-122.1779920" } ], "locationText" : "Menlo Park, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 2, "experienceMaxYears" : 4, "technicalSkills" : "I2C, SPI, USB, MIPI", "professionalSkills" : [ "Electromechanical integration", "Signal characterization", "Functional verification", "Hardware bug tracking", "Prototype bring-up", "Component selection", "Schematic capture", "Board layout", "Test plan development", "Product validation", "Supply chain management", "Contract manufacturing" ], "hardSkillsList" : [ "Electrical design", "PCB design", "System design" ], "hardSkills" : [ { "name" : "Electrical design", "level" : "intermediate" }, { "name" : "PCB design", "level" : "intermediate" }, { "name" : "System design", "level" : "intermediate" } ], "majorSkills" : "PCBAs, Schematic capture, Board layout", "majorSkillsList" : [ "PCBAs", "Schematic capture", "Board layout" ], "coreResponsibilities" : "Work on end-to-end design, Work on manufacturing of critical PCBAs, Rapid prototyping, Component selection, Schematic capture, Prototype bring-up, Debugging, Hardware bug tracking, Functional verification, Signal characterization, Board layout of PCB assemblies, Electromechanical integration, Develop specifications, Develop accelerated test plans, Validate product for lifetime, Work with CMs, Ensure proper production of PCBAs, Ensure proper production of subassemblies", "teamCollaboration" : "Collaboration with mechanical engineers; Collaboration with firmware engineers", "domainKnowledge" : "Home robotics; Spatial AI; RGB cameras; Neural networks; On-device processing; Consumer products", "domainList" : [ "home-robotics", "spatial-ai", "rgb-cameras", "neural-networks", "on-device-processing", "consumer-products" ], "domainSpecificKnowledge" : [ "Home robotics", "Spatial AI", "RGB cameras", "Neural networks", "On-device processing", "Consumer products" ], "toolProficiency" : [ "Altium Designer", "Cadence" ], "innovationCreativity" : "Rapid prototyping", "problemSolvingSkills" : "Diagnosing complex technical issues", "qualificationsBasic" : "Technical degree in Electrical Engineering or equivalent, 2-4 years of professional electrical design experience, Previous ECAD experience, Experience with common digital protocols, Experience with component selection, Experience with schematic capture, Experience with PCB layout, Experience verifying functional requirements, Experience validating functional requirements", "qualificationsPreferred" : "Consumer product experience, Altium Designer experience, Cadence experience, MIPI experience, Exposure to regulatory certification processes, Supply chain management experience, PCBA contract manufacturing experience", "workSiteFlexibility" : "Onsite", "rawDescription" : "COMPANY OVERVIEW Each year, 2.5 trillion hours are spent on household chores. At Matic, we’re on a mission to recapture that lost time, and we’re doing it by revolutionizing home robotics. Our first product, also called Matic, is a Wall-E-esque floor cleaning robot. We've built what amounts to \"full self-driving in the home” with real-time 3D mapping, adaptive path-tracking, and a precise semantic understanding of the home. Our breakthroughs in spatial AI allow Matic to work reliably in real homes, using only RGB cameras and neural networks running on-device. PRIVACY FIRST What happens in the home, stays in the home. Our robots are private by design, with all data processing performed by the robot itself, not in the cloud. OUR APPROACH Before the iPhone, consumers adopted several distinct devices; cell phones, PDAs, and portable music players each served a particular need. We believe in a similar progression for home robotics, starting with single-purpose robots and building iteratively toward more complex capabilities over time. OUR CULTURE Matic is a tight-knit and collaborative team, singularly focused on building products our customers will cherish. We're ultra-hardworking people committed to solving tough problems that save precious time and energy. ABOUT THE ROLE At Matic, our goal is to save people time and energy through automation. Individuals spend, on average, 10+ hours weekly doing mundane tasks in their homes. We are using Level 5 Autonomy and Mobility to reimagine home devices in order to give people this time back. We build and ship great products that solve real problems for real people. Our mission-driven team values learning and curiosity in a high-ownership culture. We're looking for a Electrical Design Engineer to join us on the ground floor, with runway for huge and immediate impact. What you'll do - Work on end-to-end design and manufacturing of critical PCBAs in the system - Rapid prototyping, component selection, schematic capture, prototype bring-up and debugging, hardware bug tracking, functional verification, and signal characterization - Board layout of PCB assemblies including SoCs, microcontrollers, rugged connectors, sensors, power devices, etc. - Electromechanical integration through collaboration with mechanical and firmware engineers - Develop specifications and accelerated test plans to validate the product for its lifetime - Work with CMs to ensure proper production of PCBAs and subassemblies, perhaps also flying out to be on the line as well What we look for - Technical degree in Electrical Engineering or equivalent - 2-4 years of professional electrical design experience on a product (preferably a consumer product) that has shipped in high volume - Previous ECAD experience with tools such as Altium Designer, Cadence, or equivalent - Experience with common digital protocols including I2C, SPI, USB, MIPI - Experience with component selection, schematic capture, and PCB layout - Experience with verifying and validating functional requirements of the electrical systems - Exposure to regulatory certification processes - Supply chain management and PCBA contract manufacturing experience - Comfort with fast-paced, startup atmosphere -- you don’t shy away from the hard work - High level of maturity, ownership, and pride in your work We'd love to hear from you if... - You are genuinely motivated to help those around you - You are passionate about learning outside of your normal comfort zones - You love diagnosing complex technical issues - You are excited to do great work Compensation: Base: $120,000 - $200,000 per annum. Actual Compensation will depend on skills, experience and qualifications. Base Salary is one part of the total compensation package. The role is also eligible for equity through the company’s discretionary equity program, along with a comprehensive benefits package that includes medical, dental and vision coverage access to a 401(k) plan.", "summaryDescription" : "Electrical Design Engineer at Matic. Skills: PCBAs, Schematic capture, Board layout. Work on end-to-end design. Work on manufacturing of critical PCBAs", "createdAt" : "2026-06-16T00:30:43.242", "lastUpdated" : "2026-06-16T10:00:31.991", "ingestTimestamp" : "2026-06-16T00:30:43.242", "mongoId" : "6a305076f292fd229cef089f", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 120000, "salaryAnnualMax" : 200000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Electrical design", "PCB design", "System design", "PCBAs", "Schematic capture", "Board layout", "Electromechanical integration", "Signal characterization", "Functional verification", "Hardware bug tracking", "Prototype bring-up", "Component selection", "Test plan development", "Product validation", "Supply chain management", "Contract manufacturing", "Home robotics", "Spatial AI", "RGB cameras", "Neural networks", "On-device processing", "Consumer products", "Altium Designer", "Cadence" ], "skillCount" : 24, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Junior", "dataQualityScore" : 0.7777778, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a306e7ef292fd229cfdfa4b", "title" : "Junior Design Engineer", "company" : "Ashby", "industry" : "Engineering", "salary" : { "min" : 98000.0, "max" : 138000.0, "currency" : "CAD", "frequency" : "Yearly" }, "location" : "Remote - Canada", "locations" : [ "Remote - Canada", "Vancouver", "Toronto", "Montreal" ], "timestamp" : "2026-06-16T10:46:25.763", "fingerprint" : "e42455469c56613e0e058f33473aeb87011a86835280a5a203aa1e90d6a6b19c", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/Ashby/fe121451-d328-43c9-a1ac-89e19b973a95/application", "externalId" : "fe121451-d328-43c9-a1ac-89e19b973a95", "industryFunction" : { }, "structuredLocations" : [ { "country" : "Canada", "continent" : "na", "workMode" : "remote" } ], "locationText" : "Canada", "employmentType" : "FULL_TIME", "experienceMinYears" : 0, "experienceMaxYears" : 2, "experienceLevel" : "Junior", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "Hi \uD83D\uDC4B\uD83C\uDFFE I’m Abhik https://www.linkedin.com/in/abhikpramanik/, Ashby's Co-Founder and VP of Engineering. This role is close to my heart because, as someone who can both design and code, it’s where I’ve always done my best work, but also where I was seen as a rebel and an outsider. I want folks like me to feel at home at Ashby, and so I made Design Engineering a formal role and department that works closely with me. Our first hire was over five years ago, and we’re doubling the team from five to over ten in the next year. This role truly expects you to design and code. Design Engineer at Ashby isn’t just a Frontend Engineer with new branding, nor is it a Designer vibe coding prototypes. Combining excellence in both is where magic happens. I found that when I put my best effort into both the design and technical implementation of a feature, I had a nimbleness and creativity that was hard to achieve when I did only one or the other. For instance, the UX and UI I envisioned often influenced the data model's design and flexibility, while the understanding of technology's capabilities often simplified or improved the design. This role embraces that. You’ll work on our most challenging design problems, help others improve their designs by expanding and enhancing our in-house design system, and consult on bespoke design work needed by Product Engineers. To ground it with examples, Design Engineers at Ashby have: - Redesigned our mobile web app by talking with customers who use it often, wireframing new flows, implementing its design system, and using that system to turn the wireframes into a polished UI. - Built a set of flexible, composable components in our design system that allow other engineers to build beautiful, consistent setup wizards across our product easily. - Helped a Product Engineer improve the information hierarchy and scannability of their design for viewing a candidate’s assessments. Recruiters can quickly parse information and pick out anomalies. The Design Engineer role is more common today than five years ago, but I believe Ashby offers a unique opportunity that few can match: - You work on a product at scale, not at an early-stage startup struggling to find users and get feedback on what you’ve designed and built. At Ashby, your work will touch over 100,000 weekly active users, millions of candidates per week, and notable customers like Notion, Linear, Shopify, and Snowflake. You’ll get to test out ideas with our own recruiting team and hiring managers who use Ashby every day (like me), and often hear customer feedback as early as the day you release. - This role has always had the commitment of both Benji (CEO & Co-Founder) and me: I’ve held the role, steadfastly championed it since we started hiring in 2020, and haven’t diluted its responsibilities as we’ve grown (in fact, we’ve doubled down). - You get to shape the UI and UX of a powerful and complex product. Our users need software that helps them move quickly while adapting to their unique workflows and preferences. As a result, our UI isn’t a simple chatbox, but it can’t rely on a sea of knobs and dials either. It needs to feel approachable to someone using it for the first time while offering increasingly powerful ways to customize and automate their work. WHY YOU SHOULDN’T APPLY Design Engineers come in many flavors, not all of which fit our model. Here are some reasons you might not enjoy the role: - You only want to work on design systems. While improving our design system is one of many responsibilities, you won’t be able to work on it exclusively. - You like to do extensive research and user testing before implementation. The beauty of being part-Engineer is that you can build conviction by shipping to a subset of users (including our own team) and gathering feedback! - You want everything to be perfect before it gets into a user’s hands. One of the drivers of our success is that we ship fast. While we appreciate the strive for perfection, we also realize it doesn’t need to be achieved all at once; instead, we iterate over time, often letting user feedback and business needs drive prioritization. - You don’t have excellent taste and execution in visual design. Design Engineers set the bar for visual design in our app and continually improve it, pushing its boundaries with each new feature or redesign. - You need company-driven process and structure to get your projects across the finish line. Sprint planning and well-defined project management processes are things you need or look to others to lead. You’d rather focus on the design and technical details. - You only want to do exciting work. We’re building a team of kind, collaborative folks. Customer issues and investigations are distributed across the team, including our high-level ICs. WHAT SENIORITY/LEVEL TO APPLY FOR We’ve posted levels from Junior to Staff. The higher the level, the more experience and alignment with the role we expect when reviewing your application and while interviewing. Please apply to the one that sets the right expectations. - Junior Design Engineer (This Posting) - You should have no more than 2 years of industry experience as a designer or engineer. We want to see projects (personal or professional) with at least a couple of users that showcase great visual taste and burgeoning talent in both UI/UX and Engineering. - Design Engineer - This posting covers both Mid and Senior levels. You have 2+ years of continuous experience (e.g., internships don’t count) as an Engineer or a Designer. You have good proficiency in both Design and Engineering, with exceptional proficiency in the discipline you practice full-time. Regardless of which discipline you’re coming from, we expect experience designing products and shipping code to hundreds of users (even if through side projects). - Staff Design Engineer - We’re looking for folks who’ve practiced our flavor of Design Engineering professionally. It may not be through a formal title, but you’ve made major contributions to a design system and designed and implemented features for hundreds of users and iterated on them through user feedback. Internally, we do not use these titles, but Engineers are leveled (which you can read about here https://www.ashbyhq.com/blog/engineering/leveling-and-compensation). WHAT WE’RE BUILDING As engineers, we are used to tooling that makes us better at what we do. When we started Ashby, we saw the opposite with Talent Acquisition software. Recruiting teams were leveling up how they did their work, but instead of software meeting this new standard, it held them back. Scheduling a final round is an excellent example. Recruiting teams wanted to schedule candidates faster, track interviewer preparation and quality, and do it with half the headcount. A recruiter needed to manually collect availability from the candidate, identify qualified interviewers, perform “Calendar Tetris” to find who is available to interview the candidate, schedule on the earliest date possible, and make any last-minute adjustments as availability changed. They must do this while considering the interview load on each individual and whether interviewers need to be trained and shadowing others. \uD83E\uDD75 TA software didn’t help. As hiring managers, we know TA is a critical function, and as engineers, we know software can do better. So, we built and continue to build Ashby to give TA teams the highest standard of tooling. Software that’s intelligent and powerful. Software that provides insights into where they’re failing and automates or simplifies many of the tasks they’re underwater with. We want other functions and departments to be jealous of what TA teams can do with Ashby, and today they often are! ENGINEERING CULTURE Our engineering culture is motivated by Benji’s (my Co-founder and CEO) and my belief that a small, talented team, given the right environment, can build high-quality software fast (and work regular hours!). We do it through: - Minimal process with ownership over decisions normally made by product and design - Natural collaboration and deliberate communication - Investing in tools and abstractions that give us leverage - Putting effort into building a diverse team MINIMAL PROCESS & LOTS OF OWNERSHIP The best engineers we’ve worked with delivered reliably magical outcomes. They took customer problems and relentlessly drove them to solutions that were not only successful but often brilliant and creative. While they did this with minimal oversight, stakeholders were never in the dark as to what was going on, and no setback was a surprise. Traditional product-development processes aren’t meant for the best engineers. Their purpose is to create consistent outcomes regardless of the engineer’s skill. But, consistency comes at the expense of an engineer’s time and freedom—both ingredients necessary to generate those magical outcomes. As a result, process stifles the best engineers and doesn’t give others the opportunity to practice the behaviors that made the best engineers the “best.” At Ashby, we want to build an environment that encourages every engineer to be their best. So, at Ashby, every Engineer runs their project. Product Managers (and Designers) build strategy, do customer research, and hand off problem briefs to Engineers. Engineers take on the rest: they research the problem, write product specs, build wireframes, and implement their solution end-to-end. We rely on engineers, not process, to push information outward to the relevant folks (e.g., Product Managers) and pull folks in to help (e.g., Designers, Infra). It’s a new level of ownership for many engineers, but we’d rather an engineer fail a bit and coach up their skills than use process as a crutch. Not everyone succeeds in our culture, but those who do thrive. COLLABORATION IS NATURAL & COMMUNICATION IS DELIBERATE Our engineering team consists of lifelong learners who are talented but also humble and kind (meet them here https://www.ashbyhq.com/team!). These attributes create an environment where collaboration happens naturally. We combine this with research, prototyping, and written proposals to see around corners and get feedback from the team across time zones. Focus time is something that we hold sacred, and, with thoughtful and deliberate communication, engineers are in <2h meetings per week (I wrote about it here https://www.ashbyhq.com/blog/company/thoughtful-communication). To drive it home, here's a recent calendar of an engineer who has been with us for over 4 years. ~34 hours of focus time, 2.5h of interviews, and 3.5 hours of meetings: [https://app.ashbyhq.com/api/images/user-content/4ea5f68e-c33e-4ac9-831a-e732bee4a303/d4679311-9dba-4031-bf5e-19ce78597ab1/calendar.png] We also meet in person at least twice a year, once as a department and once as a company. You also have a small budget to meet up with folks in your city/region. INCREASE LEVERAGE, NOT TEAM SIZE We built Ashby with the quality, breadth, and depth that many customers would expect from much larger teams over larger time scales. We’ve done this through investment in: - Great developer tooling. Our CI/CD takes ~10m, and we deploy at least 15x a day. A debugger that works out of the box. Everyone on the team has contributed to our developer experience \uD83D\uDCAA\uD83C\uDFFE. - Building blocks to create powerful and customizable products fast. At the core of Ashby is a set of common components (analytics modeling and query language, policy engine, workflow engine, design system) that we constantly improve. Each improvement to a common component cascades throughout our app (short video below). - AI-powered tooling. We think of AI as a way to automate the mundane parts of building and maintaining high-quality software. We use a combination of third-party and internally built tools that, for instance, auto-triage customer issues, suggest fixes, prototype ideas, generate production-ready code, and conduct code reviews. Engineers have an unlimited token budget (but are not measured on it). We write in detail about our philosophy, current use of AI, and future plans for AI in Engineering here https://www.ashbyhq.com/blog/engineering/ai-ashby-engineering-and-the-future. Here’s an impromptu quote from Arjun in our company Slack of what it’s like to build a feature at Ashby: [https://app.ashbyhq.com/api/images/user-content/4ea5f68e-c33e-4ac9-831a-e732bee4a303/8d94727a-46d8-42a2-9627-ddcd7f822f95/arjun.png] And a demo of one of these building blocks: PUT EFFORT INTO DIVERSITY Diverse teams drive innovation and better outcomes. Having seen my mother and partner build their careers as minority women in non-diverse fields, I want to make sure Ashby creates opportunities for the next generation of engineers from underrepresented groups. Today, 25% of engineers and 50% of our engineering leaders at Ashby are from underrepresented groups. We are taking conscious steps to improve, like sourcing diverse candidates, providing generous paid family leave, no leetcode interviews, and more. INTERVIEW PROCESS At Ashby, our team and interview process want to help you show your best self. We’ll dive into past projects and simulate working together through pair programming, designing, writing design system specs collaboratively, and discussing decisions. There are no leetcode or whiteboard exercises. Our interview process is five rounds: - If we shortlist your application, we’ll ask for a video walkthrough of a product or feature you’ve designed. - Introduction call with a recruiter (30m, live). Be prepared to screen-share examples of your work. - A quick dive into some of your past work with me (30m, live). Be prepared to screen-share examples of your work. - A design take-home followed by a discussion of your decisions and reasoning (~4h async, 30m live) - Three interviews, a deep dive into a past design system or design project, a design system interview, and a pair-programming interview. (2h 45m, live) I will be your main point of contact and prep you for interviews. Each round will have written guidance so you know what to expect. You’ll meet 3-4 people in Design Engineering (with 5-15 minutes in each interview to ask them questions). If we don’t give an offer, we’ll provide feedback! YOUR FIRST THREE MONTHS AT ASHBY We want an exceptional onboarding experience for every new hire. At Ashby, your dev environment is set up with a single script, you push your first product change on day one, and you spend the rest of your time shipping product changes that give you a tour of our codebase and best practices. The product changes increase in scope and ambiguity from simple copy changes to the delivery of a prominent, impactful feature. Your manager will do a 30, 60, and 90-day review to give feedback and calibrate on how we work together. It’s a team effort to get you successfully onboarded; you’ll have a peer paired with you to answer questions, pair program, and check in often to see if you need help. The rest of the team will run training sessions on our culture, product, engineering process, and technical architecture. TECHNOLOGY STACK Our tech stack is TypeScript (frontend & backend), React, GraphQL API, Node.js, Postgres, and Redis. Depending on the level you’re applying for and your past experience, we expect, at a minimum, good proficiency with TypeScript, React, and CSS. Proficiency with backend technologies is a plus, as it allows you to work without coordinating with Product Engineers. BENEFITS - Competitive salary and equity. - 10-year exercise window for stock options. You shouldn’t feel pressure to purchase stock options if you leave Ashby —do it when you feel financially comfortable. - Unlimited PTO, and we will encourage you to take it. - A minimum of 12 weeks of fully paid parental leave, covered by Ashby. For folks outside the US, it may be longer to be in line with regional requirements. - Generous equipment, software, and office furniture budget. Get what you need to be happy and productive! - $100/month education budget with more expensive items (like conferences) covered with manager approval. - If you’re in the US, we offer top-tier health insurance for you and your dependents, with 100% of premiums covered by Ashby. In other countries, we provide high-quality supplemental health insurance for you and your dependents, also fully covered by us. Ashby’s success hinges on hiring great people and creating an environment where we can be happy, feel challenged, and do our best work. We’re being deliberate about building that environment from the ground up. I hope that excites you enough to apply. Ashby provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, sex, national origin, age, disability, genetics, sexual orientation, gender identity, or gender expression. We are committed to a diverse and inclusive workforce and welcome people from all backgrounds, experiences, perspectives, and abilities. Ashby is committed to a fair and transparent hiring process. We confirm that this advertisement is for an active, existing vacancy within our organization. Please be advised that we may use artificial intelligence-driven tools to assist our recruitment team in screening, assessing, and selecting candidates for this position.", "summaryDescription" : "Junior Design Engineer at Ashby", "createdAt" : "2026-06-16T00:30:35.250", "lastUpdated" : "2026-06-16T10:46:25.763", "ingestTimestamp" : "2026-06-16T00:30:35.250", "mongoId" : "6a306e7ef292fd229cfdfa4b", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "75k-100k", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Junior", "dataQualityScore" : 0.7777778, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a306e7ef292fd229cfdfa4c", "title" : "Junior Design Engineer", "company" : "Ashby", "industry" : "Engineering", "salary" : { "min" : 98000.0, "max" : 165000.0, "currency" : "USD", "frequency" : "Yearly" }, "location" : "Remote - US", "locations" : [ "Remote - US", "New York", "San Francisco", "Austin", "Portland", "Los Angeles", "Seattle", "Boston", "Chicago", "Denver" ], "timestamp" : "2026-06-16T10:49:57.611", "fingerprint" : "1aae3af7cdc75f41607eaca46ba0b11a2138bb1c30d178096828c5ef1855399c", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/Ashby/0f538da6-1e06-43f0-86cb-de8007814284/application", "externalId" : "0f538da6-1e06-43f0-86cb-de8007814284", "industryFunction" : { }, "structuredLocations" : [ { "country" : "United States", "continent" : "na", "workMode" : "remote" } ], "locationText" : "United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 0, "experienceMaxYears" : 2, "experienceLevel" : "Entry", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "Hi \uD83D\uDC4B\uD83C\uDFFE I’m Abhik https://www.linkedin.com/in/abhikpramanik/, Ashby's Co-Founder and VP of Engineering. This role is close to my heart because, as someone who can both design and code, it’s where I’ve always done my best work, but also where I was seen as a rebel and an outsider. I want folks like me to feel at home at Ashby, and so I made Design Engineering a formal role and department that works closely with me. Our first hire was over five years ago, and we’re doubling the team from five to over ten in the next year. This role truly expects you to design and code. Design Engineer at Ashby isn’t just a Frontend Engineer with new branding, nor is it a Designer vibe coding prototypes. Combining excellence in both is where magic happens. I found that when I put my best effort into both the design and technical implementation of a feature, I had a nimbleness and creativity that was hard to achieve when I did only one or the other. For instance, the UX and UI I envisioned often influenced the data model's design and flexibility, while the understanding of technology's capabilities often simplified or improved the design. This role embraces that. You’ll work on our most challenging design problems, help others improve their designs by expanding and enhancing our in-house design system, and consult on bespoke design work needed by Product Engineers. To ground it with examples, Design Engineers at Ashby have: - Redesigned our mobile web app by talking with customers who use it often, wireframing new flows, implementing its design system, and using that system to turn the wireframes into a polished UI. - Built a set of flexible, composable components in our design system that allow other engineers to build beautiful, consistent setup wizards across our product easily. - Helped a Product Engineer improve the information hierarchy and scannability of their design for viewing a candidate’s assessments. Recruiters can quickly parse information and pick out anomalies. The Design Engineer role is more common today than five years ago, but I believe Ashby offers a unique opportunity that few can match: - You work on a product at scale, not at an early-stage startup struggling to find users and get feedback on what you’ve designed and built. At Ashby, your work will touch over 100,000 weekly active users, millions of candidates per week, and notable customers like Notion, Linear, Shopify, and Snowflake. You’ll get to test out ideas with our own recruiting team and hiring managers who use Ashby every day (like me), and often hear customer feedback as early as the day you release. - This role has always had the commitment of both Benji (CEO & Co-Founder) and me: I’ve held the role, steadfastly championed it since we started hiring in 2020, and haven’t diluted its responsibilities as we’ve grown (in fact, we’ve doubled down). - You get to shape the UI and UX of a powerful and complex product. Our users need software that helps them move quickly while adapting to their unique workflows and preferences. As a result, our UI isn’t a simple chatbox, but it can’t rely on a sea of knobs and dials either. It needs to feel approachable to someone using it for the first time while offering increasingly powerful ways to customize and automate their work. WHY YOU SHOULDN’T APPLY Design Engineers come in many flavors, not all of which fit our model. Here are some reasons you might not enjoy the role: - You only want to work on design systems. While improving our design system is one of many responsibilities, you won’t be able to work on it exclusively. - You like to do extensive research and user testing before implementation. The beauty of being part-Engineer is that you can build conviction by shipping to a subset of users (including our own team) and gathering feedback! - You want everything to be perfect before it gets into a user’s hands. One of the drivers of our success is that we ship fast. That often means we don’t agonize over every detail and instead iterate over time, often letting user feedback and business needs drive prioritization. - You don’t have excellent taste and execution in visual design. Design Engineers set the bar for visual design in our app and continually improve it, pushing its boundaries with each new feature or redesign. - You need company-driven process and structure to get your projects across the finish line. Sprint planning and well-defined project management processes are things you need or look to others to lead. You’d rather focus on the design and technical details. - You only want to do exciting work. We’re building a team of kind, collaborative folks. Customer issues and investigations are distributed across the team, including our high-level ICs. WHAT SENIORITY/LEVEL TO APPLY FOR We’ve posted levels from Junior to Staff. The higher the level, the more experience and alignment with the role we expect when reviewing your application and while interviewing. Please apply to the one that sets the right expectations. - Junior Design Engineer (This Posting) - You should have no more than 2 years of industry experience as a designer or engineer. We want to see projects (personal or professional) with at least a couple of users that showcase great visual taste and burgeoning talent in both UI/UX and Engineering. - Design Engineer - This posting covers both Mid and Senior levels. You have 2+ years of continuous experience (e.g., internships don’t count) as an Engineer or a Designer. You have good proficiency in both Design and Engineering, with exceptional proficiency in the discipline you practice full-time. Regardless of which discipline you’re coming from, we expect experience designing products and shipping code to hundreds of users (even if through side projects). - Staff Design Engineer - We’re looking for folks who’ve practiced our flavor of Design Engineering professionally. It may not be through a formal title, but you’ve made major contributions to a design system and designed and implemented features for hundreds of users and iterated on them through user feedback. Internally, we do not use these titles, but Engineers are leveled based on proficiency (which you can read about here https://www.ashbyhq.com/blog/engineering/leveling-and-compensation). WHAT WE’RE BUILDING As engineers, we are used to tooling that makes us better at what we do. When we started Ashby, we saw the opposite with Talent Acquisition software. Recruiting teams were leveling up how they did their work, but instead of software meeting this new standard, it held them back. Scheduling a final round is an excellent example. Recruiting teams wanted to schedule candidates faster, track interviewer preparation and quality, and do it with half the headcount. A recruiter needed to manually collect availability from the candidate, identify qualified interviewers, perform “Calendar Tetris” to find who is available to interview the candidate, schedule on the earliest date possible, and make any last-minute adjustments as availability changed. They must do this while considering the interview load on each individual and whether interviewers need to be trained and shadowing others. \uD83E\uDD75 TA software didn’t help. As hiring managers, we know TA is a critical function, and as engineers, we know software can do better. So, we built and continue to build Ashby to give TA teams the highest standard of tooling. Software that’s intelligent and powerful. Software that provides insights into where they’re failing and automates or simplifies many of the tasks they’re underwater with. We want other functions and departments to be jealous of what TA teams can do with Ashby, and today they often are! ENGINEERING CULTURE Our engineering culture is motivated by Benji’s (my Co-founder and CEO) and my belief that a small, talented team, given the right environment, can build high-quality software fast (and work regular hours!). We do it through: - Minimal process with ownership over decisions normally made by product and design - Natural collaboration and deliberate communication - Investing in tools and abstractions that give us leverage - Putting effort into building a diverse team MINIMAL PROCESS & LOTS OF OWNERSHIP The best engineers we’ve worked with delivered reliably magical outcomes. They took customer problems and relentlessly drove them to solutions that were not only successful but often brilliant and creative. While they did this with minimal oversight, stakeholders were never in the dark as to what was going on, and no setback was a surprise. Traditional product-development processes aren’t meant for the best engineers. Their purpose is to create consistent outcomes regardless of the engineer’s skill. But, consistency comes at the expense of an engineer’s time and freedom—both ingredients necessary to generate those magical outcomes. As a result, process stifles the best engineers and doesn’t give others the opportunity to practice the behaviors that made the best engineers the “best.” At Ashby, we want to build an environment that encourages every engineer to be their best. So, at Ashby, every Engineer runs their project. Product Managers (and Designers) build strategy, do customer research, and hand off problem briefs to Engineers. Engineers take on the rest: they research the problem, write product specs, build wireframes, and implement their solution end-to-end. We rely on engineers, not process, to push information outward to the relevant folks (e.g., Product Managers) and pull folks in to help (e.g., Designers, Infra). It’s a new level of ownership for many engineers, but we’d rather an engineer fail a bit and coach up their skills than use process as a crutch. Not everyone succeeds in our culture, but those who do thrive. COLLABORATION IS NATURAL & COMMUNICATION IS DELIBERATE Our engineering team consists of lifelong learners who are talented but also humble and kind (meet them here https://www.ashbyhq.com/team!). These attributes create an environment where collaboration happens naturally. We combine this with research, prototyping, and written proposals to see around corners and get feedback from the team across time zones. Focus time is something that we hold sacred, and, with thoughtful and deliberate communication, engineers are in <2h meetings per week (I wrote about it here https://www.ashbyhq.com/blog/company/thoughtful-communication). Today, 25% of engineers and 50% of our engineering leaders at Ashby are from underrepresented groups. We are taking conscious steps to improve, like sourcing diverse candidates, providing generous paid family leave, no leetcode interviews, and more. [https://app.ashbyhq.com/api/images/user-content/4ea5f68e-c33e-4ac9-831a-e732bee4a303/d4679311-9dba-4031-bf5e-19ce78597ab1/calendar.png] We also meet in person at least twice a year, once as a department and once as a company. You also have a small budget to meet up with folks in your city/region. INCREASE LEVERAGE, NOT TEAM SIZE We built Ashby with the quality, breadth, and depth that many customers would expect from much larger teams over larger time scales. We’ve done this through investment in: - Great developer tooling. Our CI/CD takes ~10m, and we deploy at least 15x a day. A debugger that works out of the box. Everyone on the team has contributed to our developer experience \uD83D\uDCAA\uD83C\uDFFE. - Building blocks to create powerful and customizable products fast. At the core of Ashby is a set of common components (analytics modeling and query language, policy engine, workflow engine, design system) that we constantly improve. Each improvement to a common component cascades throughout our app (short video below). - AI-powered tooling. We think of AI as a way to automate the mundane parts of building and maintaining high-quality software. We use a combination of third-party and internally built tools that, for instance, auto-triage customer issues, suggest fixes, prototype ideas, generate production-ready code, and conduct code reviews. Engineers have an unlimited token budget (but are not measured on it). We write in detail about our philosophy, current use of AI, and future plans for AI in Engineering here https://www.ashbyhq.com/blog/engineering/ai-ashby-engineering-and-the-future. Here’s an impromptu quote from Arjun in our company Slack of what it’s like to build a feature at Ashby: [https://app.ashbyhq.com/api/images/user-content/4ea5f68e-c33e-4ac9-831a-e732bee4a303/8d94727a-46d8-42a2-9627-ddcd7f822f95/arjun.png] And a demo of one of these building blocks: PUT EFFORT INTO DIVERSITY Diverse teams drive innovation and better outcomes. Having seen my mother and partner build their careers as minority women in non-diverse fields, I want to make sure Ashby creates opportunities for the next generation of engineers from underrepresented groups. Today, 25% of engineers and 50% of our engineering leaders at Ashby are from underrepresented groups. We are taking conscious steps to improve, like sourcing diverse candidates, providing generous paid family leave, no leetcode interviews, and more. INTERVIEW PROCESS At Ashby, our team and interview process want to help you show your best self. We’ll dive into past projects and simulate working together through pair programming, designing, writing design system specs collaboratively, and discussing decisions. There are no leetcode or whiteboard exercises. Our interview process is five rounds: - If we shortlist your application, we’ll ask for a video walkthrough of a product or feature you’ve designed. - Introduction call with a recruiter (30m, live). Be prepared to screen-share examples of your work. - A quick dive into some of your past work with me (30m, live). Be prepared to screen-share examples of your work. - A design take-home followed by a discussion of your decisions and reasoning (~4h async, 30m live) - Three interviews, a deep dive into a past design system or design project, a design system interview, and a pair-programming interview. (2h 45m, live) I will be your main point of contact and prep you for interviews. Each round will have written guidance so you know what to expect. You’ll meet 3-4 people in Design Engineering (with 5-15 minutes in each interview to ask them questions). If we don’t give an offer, we’ll provide feedback! YOUR FIRST THREE MONTHS AT ASHBY We want an exceptional onboarding experience for every new hire. At Ashby, your dev environment is set up with a single script, you push your first product change on day one, and you spend the rest of your time shipping product changes that give you a tour of our codebase and best practices. The product changes increase in scope and ambiguity from simple copy changes to the delivery of a prominent, impactful feature. Your manager will do a 30, 60, and 90-day review to give feedback and calibrate on how we work together. It’s a team effort to get you successfully onboarded; you’ll have a peer paired with you to answer questions, pair program, and check in often to see if you need help. The rest of the team will run training sessions on our culture, product, engineering process, and technical architecture. TECHNOLOGY STACK Our tech stack is TypeScript (frontend & backend), React, GraphQL API, Node.js, Postgres, and Redis. Depending on the level you’re applying for and your past experience, we expect, at a minimum, good proficiency with TypeScript, React, and CSS. Proficiency with backend technologies is a plus, as it allows you to work without coordinating with Product Engineers. BENEFITS - Competitive salary and equity. - 10-year exercise window for stock options. You shouldn’t feel pressure to purchase stock options if you leave Ashby —do it when you feel financially comfortable. - Unlimited PTO, and we will encourage you to take it. - A minimum of 12 weeks of fully paid parental leave, covered by Ashby. For folks outside the US, it may be longer to be in line with regional requirements. - Generous equipment, software, and office furniture budget. Get what you need to be happy and productive! - $100/month education budget with more expensive items (like conferences) covered with manager approval. - If you’re in the US, we offer top-tier health insurance for you and your dependents, with 100% of premiums covered by Ashby. In other countries, we provide high-quality supplemental health insurance for you and your dependents, also fully covered by us. Ashby’s success hinges on hiring great people and creating an environment where we can be happy, feel challenged, and do our best work. We’re being deliberate about building that environment from the ground up. I hope that excites you enough to apply. Ashby provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, sex, national origin, age, disability, genetics, sexual orientation, gender identity, or gender expression. We are committed to a diverse and inclusive workforce and welcome people from all backgrounds, experiences, perspectives, and abilities. Ashby is committed to a fair and transparent hiring process. We confirm that this advertisement is for an active, existing vacancy within our organization. Please be advised that we may use artificial intelligence-driven tools to assist our recruitment team in screening, assessing, and selecting candidates for this position.", "summaryDescription" : "Junior Design Engineer at Ashby", "createdAt" : "2026-06-16T00:29:25.941", "lastUpdated" : "2026-06-16T10:49:57.611", "ingestTimestamp" : "2026-06-16T00:29:25.941", "mongoId" : "6a306e7ef292fd229cfdfa4c", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 98000, "salaryAnnualMax" : 165000, "salaryBand" : "75k-100k", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Junior", "dataQualityScore" : 0.7777778, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "SaaS", "llmIndustryConfidence" : 0.98 }, { "id" : "6a3064faf292fd229cfa4486", "title" : "Electrical Design Engineer", "company" : "Matic", "industry" : "Hardware", "salary" : { "min" : 120000.0, "max" : 200000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Menlo Park, CA", "locations" : [ "Menlo Park, CA" ], "timestamp" : "2026-06-16T10:27:31.392", "fingerprint" : "2ab10cf98fa91c62bec83203d6e0297fb914c60497d8b3311e448e8ca5e79d7d", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/Maticrobots/535fbc23-57ee-41f7-a949-190572402889/application", "externalId" : "535fbc23-57ee-41f7-a949-190572402889", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Menlo Park", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.4519671,-122.1779920" } ], "locationText" : "Menlo Park, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 2, "experienceMaxYears" : 4, "technicalSkills" : "I2C, SPI, USB, MIPI", "professionalSkills" : [ "Electromechanical integration", "Signal characterization", "Functional verification", "Hardware bug tracking", "Prototype bring-up", "Component selection", "Schematic capture", "Board layout", "Test plan development", "Product validation", "Supply chain management", "Contract manufacturing" ], "hardSkillsList" : [ "Electrical design", "PCB design", "System design" ], "hardSkills" : [ { "name" : "Electrical design", "level" : "intermediate" }, { "name" : "PCB design", "level" : "intermediate" }, { "name" : "System design", "level" : "intermediate" } ], "majorSkills" : "PCBAs, Schematic capture, Board layout", "majorSkillsList" : [ "PCBAs", "Schematic capture", "Board layout" ], "coreResponsibilities" : "Work on end-to-end design, Work on manufacturing of critical PCBAs, Rapid prototyping, Component selection, Schematic capture, Prototype bring-up, Debugging, Hardware bug tracking, Functional verification, Signal characterization, Board layout of PCB assemblies, Electromechanical integration, Develop specifications, Develop accelerated test plans, Validate product for lifetime, Work with CMs, Ensure proper production of PCBAs, Ensure proper production of subassemblies", "teamCollaboration" : "Mechanical engineers; Firmware engineers", "domainKnowledge" : "Home robotics; Spatial AI; RGB cameras; Neural networks; On-device processing; Consumer electronics", "domainList" : [ "home-robotics", "spatial-ai", "rgb-cameras", "neural-networks", "on-device-processing", "consumer-electronics" ], "domainSpecificKnowledge" : [ "Home robotics", "Spatial AI", "RGB cameras", "Neural networks", "On-device processing", "Consumer electronics" ], "toolProficiency" : [ "Altium Designer", "Cadence" ], "problemSolvingSkills" : "Diagnosing complex technical issues", "qualificationsBasic" : "Technical degree in Electrical Engineering or equivalent, 2-4 years of professional electrical design experience, Previous ECAD experience, Experience with common digital protocols, Experience with component selection, Experience with schematic capture, Experience with PCB layout, Experience verifying functional requirements, Experience validating functional requirements", "qualificationsPreferred" : "Consumer product experience, Altium Designer experience, Cadence experience, MIPI experience, Exposure to regulatory certification processes, Supply chain management experience, PCBA contract manufacturing experience", "workSiteFlexibility" : "Onsite", "rawDescription" : "COMPANY OVERVIEW Each year, 2.5 trillion hours are spent on household chores. At Matic, we’re on a mission to recapture that lost time, and we’re doing it by revolutionizing home robotics. Our first product, also called Matic, is a Wall-E-esque floor cleaning robot. We've built what amounts to \"full self-driving in the home” with real-time 3D mapping, adaptive path-tracking, and a precise semantic understanding of the home. Our breakthroughs in spatial AI allow Matic to work reliably in real homes, using only RGB cameras and neural networks running on-device. PRIVACY FIRST What happens in the home, stays in the home. Our robots are private by design, with all data processing performed by the robot itself, not in the cloud. OUR APPROACH Before the iPhone, consumers adopted several distinct devices; cell phones, PDAs, and portable music players each served a particular need. We believe in a similar progression for home robotics, starting with single-purpose robots and building iteratively toward more complex capabilities over time. OUR CULTURE Matic is a tight-knit and collaborative team, singularly focused on building products our customers will cherish. We're ultra-hardworking people committed to solving tough problems that save precious time and energy. ABOUT THE ROLE At Matic, our goal is to save people time and energy through automation. Individuals spend, on average, 10+ hours weekly doing mundane tasks in their homes. We are using Level 5 Autonomy and Mobility to reimagine home devices in order to give people this time back. We build and ship great products that solve real problems for real people. Our mission-driven team values learning and curiosity in a high-ownership culture. We're looking for a Electrical Design Engineer to join us on the ground floor, with runway for huge and immediate impact. What you'll do - Work on end-to-end design and manufacturing of critical PCBAs in the system - Rapid prototyping, component selection, schematic capture, prototype bring-up and debugging, hardware bug tracking, functional verification, and signal characterization - Board layout of PCB assemblies including SoCs, microcontrollers, rugged connectors, sensors, power devices, etc. - Electromechanical integration through collaboration with mechanical and firmware engineers - Develop specifications and accelerated test plans to validate the product for its lifetime - Work with CMs to ensure proper production of PCBAs and subassemblies, perhaps also flying out to be on the line as well What we look for - Technical degree in Electrical Engineering or equivalent - 2-4 years of professional electrical design experience on a product (preferably a consumer product) that has shipped in high volume - Previous ECAD experience with tools such as Altium Designer, Cadence, or equivalent - Experience with common digital protocols including I2C, SPI, USB, MIPI - Experience with component selection, schematic capture, and PCB layout - Experience with verifying and validating functional requirements of the electrical systems - Exposure to regulatory certification processes - Supply chain management and PCBA contract manufacturing experience - Comfort with fast-paced, startup atmosphere -- you don’t shy away from the hard work - High level of maturity, ownership, and pride in your work We'd love to hear from you if... - You are genuinely motivated to help those around you - You are passionate about learning outside of your normal comfort zones - You love diagnosing complex technical issues - You are excited to do great work Compensation: Base: $120,000 - $200,000 per annum. Actual Compensation will depend on skills, experience and qualifications. Base Salary is one part of the total compensation package. The role is also eligible for equity through the company’s discretionary equity program, along with a comprehensive benefits package that includes medical, dental and vision coverage access to a 401(k) plan.", "summaryDescription" : "Electrical Design Engineer at Matic. Skills: PCBAs, Schematic capture, Board layout. Work on end-to-end design. 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At Matic, we’re on a mission to recapture that lost time, and we’re doing it by revolutionizing home robotics. Our first product, also called Matic, is a Wall-E-esque floor cleaning robot. We've built what amounts to \"full self-driving in the home” with real-time 3D mapping, adaptive path-tracking, and a precise semantic understanding of the home. Our breakthroughs in spatial AI allow Matic to work reliably in real homes, using only RGB cameras and neural networks running on-device. PRIVACY FIRST What happens in the home, stays in the home. Our robots are private by design, with all data processing performed by the robot itself, not in the cloud. OUR APPROACH Before the iPhone, consumers adopted several distinct devices; cell phones, PDAs, and portable music players each served a particular need. We believe in a similar progression for home robotics, starting with single-purpose robots and building iteratively toward more complex capabilities over time. OUR CULTURE Matic is a tight-knit and collaborative team, singularly focused on building products our customers will cherish. We're ultra-hardworking people committed to solving tough problems that save precious time and energy. ABOUT THE ROLE At Matic, our goal is to save people time and energy through automation. Individuals spend, on average, 10+ hours weekly doing mundane tasks in their homes. We are using Level 5 Autonomy and Mobility to reimagine home devices in order to give people this time back. We build and ship great products that solve real problems for real people. Our mission-driven team values learning and curiosity in a high-ownership culture. We're looking for a Electrical Design Engineer to join us on the ground floor, with runway for huge and immediate impact. What you'll do - Work on end-to-end design and manufacturing of critical PCBAs in the system - Rapid prototyping, component selection, schematic capture, prototype bring-up and debugging, hardware bug tracking, functional verification, and signal characterization - Board layout of PCB assemblies including SoCs, microcontrollers, rugged connectors, sensors, power devices, etc. - Electromechanical integration through collaboration with mechanical and firmware engineers - Develop specifications and accelerated test plans to validate the product for its lifetime - Work with CMs to ensure proper production of PCBAs and subassemblies, perhaps also flying out to be on the line as well What we look for - Technical degree in Electrical Engineering or equivalent - 2-4 years of professional electrical design experience on a product (preferably a consumer product) that has shipped in high volume - Previous ECAD experience with tools such as Altium Designer, Cadence, or equivalent - Experience with common digital protocols including I2C, SPI, USB, MIPI - Experience with component selection, schematic capture, and PCB layout - Experience with verifying and validating functional requirements of the electrical systems - Exposure to regulatory certification processes - Supply chain management and PCBA contract manufacturing experience - Comfort with fast-paced, startup atmosphere -- you don’t shy away from the hard work - High level of maturity, ownership, and pride in your work We'd love to hear from you if... - You are genuinely motivated to help those around you - You are passionate about learning outside of your normal comfort zones - You love diagnosing complex technical issues - You are excited to do great work Compensation: Base: $120,000 - $200,000 per annum. Actual Compensation will depend on skills, experience and qualifications. Base Salary is one part of the total compensation package. The role is also eligible for equity through the company’s discretionary equity program, along with a comprehensive benefits package that includes medical, dental and vision coverage access to a 401(k) plan.", "summaryDescription" : "Electrical Design Engineer at Matic. Skills: PCBAs, Schematic capture, Board layout. Work on end-to-end design. Work on manufacturing of critical PCBAs", "createdAt" : "2026-06-16T00:27:53.811", "lastUpdated" : "2026-06-16T09:47:55.789", "ingestTimestamp" : "2026-06-16T00:27:53.811", "mongoId" : "6a305ed7f292fd229cf74dc4", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 120000, "salaryAnnualMax" : 200000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Electrical design", "PCB design", "System design", "PCBAs", "Schematic capture", "Board layout", "Electromechanical integration", "Signal characterization", "Functional verification", "Hardware bug tracking", "Prototype bring-up", "Component selection", "Test plan development", "Product validation", "Supply chain management", "Contract manufacturing", "Home robotics", "Spatial AI", "RGB cameras", "Neural networks", "On-device processing", "Level 5 Autonomy", "Mobility", "Altium Designer", "Cadence" ], "skillCount" : 25, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Junior", "dataQualityScore" : 0.7777778, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a305646f292fd229cf26ae3", "title" : "Junior Design Engineer", "company" : "Ashby", "industry" : "Engineering", "salary" : { "min" : 98000.0, "max" : 138000.0, "currency" : "CAD", "frequency" : "Yearly" }, "location" : "Remote - Canada", "locations" : [ "Remote - Canada", "Vancouver", "Toronto", "Montreal" ], "timestamp" : "2026-06-16T09:25:11.475", "fingerprint" : "a72e8c45f8ff5220add4b6ff11075afa30b4f33d09cbbccfb672962e35bde3d9", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/ashby/fe121451-d328-43c9-a1ac-89e19b973a95/application", "externalId" : "fe121451-d328-43c9-a1ac-89e19b973a95", "industryFunction" : { }, "structuredLocations" : [ { "country" : "Canada", "continent" : "na", "workMode" : "remote" } ], "locationText" : "Canada", "employmentType" : "FULL_TIME", "experienceMinYears" : 0, "experienceMaxYears" : 2, "experienceLevel" : "Junior", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "Hi \uD83D\uDC4B\uD83C\uDFFE I’m Abhik https://www.linkedin.com/in/abhikpramanik/, Ashby's Co-Founder and VP of Engineering. This role is close to my heart because, as someone who can both design and code, it’s where I’ve always done my best work, but also where I was seen as a rebel and an outsider. I want folks like me to feel at home at Ashby, and so I made Design Engineering a formal role and department that works closely with me. Our first hire was over five years ago, and we’re doubling the team from five to over ten in the next year. This role truly expects you to design and code. Design Engineer at Ashby isn’t just a Frontend Engineer with new branding, nor is it a Designer vibe coding prototypes. Combining excellence in both is where magic happens. I found that when I put my best effort into both the design and technical implementation of a feature, I had a nimbleness and creativity that was hard to achieve when I did only one or the other. For instance, the UX and UI I envisioned often influenced the data model's design and flexibility, while the understanding of technology's capabilities often simplified or improved the design. This role embraces that. You’ll work on our most challenging design problems, help others improve their designs by expanding and enhancing our in-house design system, and consult on bespoke design work needed by Product Engineers. To ground it with examples, Design Engineers at Ashby have: - Redesigned our mobile web app by talking with customers who use it often, wireframing new flows, implementing its design system, and using that system to turn the wireframes into a polished UI. - Built a set of flexible, composable components in our design system that allow other engineers to build beautiful, consistent setup wizards across our product easily. - Helped a Product Engineer improve the information hierarchy and scannability of their design for viewing a candidate’s assessments. Recruiters can quickly parse information and pick out anomalies. The Design Engineer role is more common today than five years ago, but I believe Ashby offers a unique opportunity that few can match: - You work on a product at scale, not at an early-stage startup struggling to find users and get feedback on what you’ve designed and built. At Ashby, your work will touch over 100,000 weekly active users, millions of candidates per week, and notable customers like Notion, Linear, Shopify, and Snowflake. You’ll get to test out ideas with our own recruiting team and hiring managers who use Ashby every day (like me), and often hear customer feedback as early as the day you release. - This role has always had the commitment of both Benji (CEO & Co-Founder) and me: I’ve held the role, steadfastly championed it since we started hiring in 2020, and haven’t diluted its responsibilities as we’ve grown (in fact, we’ve doubled down). - You get to shape the UI and UX of a powerful and complex product. Our users need software that helps them move quickly while adapting to their unique workflows and preferences. As a result, our UI isn’t a simple chatbox, but it can’t rely on a sea of knobs and dials either. It needs to feel approachable to someone using it for the first time while offering increasingly powerful ways to customize and automate their work. WHY YOU SHOULDN’T APPLY Design Engineers come in many flavors, not all of which fit our model. Here are some reasons you might not enjoy the role: - You only want to work on design systems. While improving our design system is one of many responsibilities, you won’t be able to work on it exclusively. - You like to do extensive research and user testing before implementation. The beauty of being part-Engineer is that you can build conviction by shipping to a subset of users (including our own team) and gathering feedback! - You want everything to be perfect before it gets into a user’s hands. One of the drivers of our success is that we ship fast. While we appreciate the strive for perfection, we also realize it doesn’t need to be achieved all at once; instead, we iterate over time, often letting user feedback and business needs drive prioritization. - You don’t have excellent taste and execution in visual design. Design Engineers set the bar for visual design in our app and continually improve it, pushing its boundaries with each new feature or redesign. - You need company-driven process and structure to get your projects across the finish line. Sprint planning and well-defined project management processes are things you need or look to others to lead. You’d rather focus on the design and technical details. - You only want to do exciting work. We’re building a team of kind, collaborative folks. Customer issues and investigations are distributed across the team, including our high-level ICs. WHAT SENIORITY/LEVEL TO APPLY FOR We’ve posted levels from Junior to Staff. The higher the level, the more experience and alignment with the role we expect when reviewing your application and while interviewing. Please apply to the one that sets the right expectations. - Junior Design Engineer (This Posting) - You should have no more than 2 years of industry experience as a designer or engineer. We want to see projects (personal or professional) with at least a couple of users that showcase great visual taste and burgeoning talent in both UI/UX and Engineering. - Design Engineer - This posting covers both Mid and Senior levels. You have 2+ years of continuous experience (e.g., internships don’t count) as an Engineer or a Designer. You have good proficiency in both Design and Engineering, with exceptional proficiency in the discipline you practice full-time. Regardless of which discipline you’re coming from, we expect experience designing products and shipping code to hundreds of users (even if through side projects). - Staff Design Engineer - We’re looking for folks who’ve practiced our flavor of Design Engineering professionally. It may not be through a formal title, but you’ve made major contributions to a design system and designed and implemented features for hundreds of users and iterated on them through user feedback. Internally, we do not use these titles, but Engineers are leveled (which you can read about here https://www.ashbyhq.com/blog/engineering/leveling-and-compensation). WHAT WE’RE BUILDING As engineers, we are used to tooling that makes us better at what we do. When we started Ashby, we saw the opposite with Talent Acquisition software. Recruiting teams were leveling up how they did their work, but instead of software meeting this new standard, it held them back. Scheduling a final round is an excellent example. Recruiting teams wanted to schedule candidates faster, track interviewer preparation and quality, and do it with half the headcount. A recruiter needed to manually collect availability from the candidate, identify qualified interviewers, perform “Calendar Tetris” to find who is available to interview the candidate, schedule on the earliest date possible, and make any last-minute adjustments as availability changed. They must do this while considering the interview load on each individual and whether interviewers need to be trained and shadowing others. \uD83E\uDD75 TA software didn’t help. As hiring managers, we know TA is a critical function, and as engineers, we know software can do better. So, we built and continue to build Ashby to give TA teams the highest standard of tooling. Software that’s intelligent and powerful. Software that provides insights into where they’re failing and automates or simplifies many of the tasks they’re underwater with. We want other functions and departments to be jealous of what TA teams can do with Ashby, and today they often are! ENGINEERING CULTURE Our engineering culture is motivated by Benji’s (my Co-founder and CEO) and my belief that a small, talented team, given the right environment, can build high-quality software fast (and work regular hours!). We do it through: - Minimal process with ownership over decisions normally made by product and design - Natural collaboration and deliberate communication - Investing in tools and abstractions that give us leverage - Putting effort into building a diverse team MINIMAL PROCESS & LOTS OF OWNERSHIP The best engineers we’ve worked with delivered reliably magical outcomes. They took customer problems and relentlessly drove them to solutions that were not only successful but often brilliant and creative. While they did this with minimal oversight, stakeholders were never in the dark as to what was going on, and no setback was a surprise. Traditional product-development processes aren’t meant for the best engineers. Their purpose is to create consistent outcomes regardless of the engineer’s skill. But, consistency comes at the expense of an engineer’s time and freedom—both ingredients necessary to generate those magical outcomes. As a result, process stifles the best engineers and doesn’t give others the opportunity to practice the behaviors that made the best engineers the “best.” At Ashby, we want to build an environment that encourages every engineer to be their best. So, at Ashby, every Engineer runs their project. Product Managers (and Designers) build strategy, do customer research, and hand off problem briefs to Engineers. Engineers take on the rest: they research the problem, write product specs, build wireframes, and implement their solution end-to-end. We rely on engineers, not process, to push information outward to the relevant folks (e.g., Product Managers) and pull folks in to help (e.g., Designers, Infra). It’s a new level of ownership for many engineers, but we’d rather an engineer fail a bit and coach up their skills than use process as a crutch. Not everyone succeeds in our culture, but those who do thrive. COLLABORATION IS NATURAL & COMMUNICATION IS DELIBERATE Our engineering team consists of lifelong learners who are talented but also humble and kind (meet them here https://www.ashbyhq.com/team!). These attributes create an environment where collaboration happens naturally. We combine this with research, prototyping, and written proposals to see around corners and get feedback from the team across time zones. Focus time is something that we hold sacred, and, with thoughtful and deliberate communication, engineers are in <2h meetings per week (I wrote about it here https://www.ashbyhq.com/blog/company/thoughtful-communication). To drive it home, here's a recent calendar of an engineer who has been with us for over 4 years. ~34 hours of focus time, 2.5h of interviews, and 3.5 hours of meetings: [https://app.ashbyhq.com/api/images/user-content/4ea5f68e-c33e-4ac9-831a-e732bee4a303/d4679311-9dba-4031-bf5e-19ce78597ab1/calendar.png] We also meet in person at least twice a year, once as a department and once as a company. You also have a small budget to meet up with folks in your city/region. INCREASE LEVERAGE, NOT TEAM SIZE We built Ashby with the quality, breadth, and depth that many customers would expect from much larger teams over larger time scales. We’ve done this through investment in: - Great developer tooling. Our CI/CD takes ~10m, and we deploy at least 15x a day. A debugger that works out of the box. Everyone on the team has contributed to our developer experience \uD83D\uDCAA\uD83C\uDFFE. - Building blocks to create powerful and customizable products fast. At the core of Ashby is a set of common components (analytics modeling and query language, policy engine, workflow engine, design system) that we constantly improve. Each improvement to a common component cascades throughout our app (short video below). - AI-powered tooling. We think of AI as a way to automate the mundane parts of building and maintaining high-quality software. We use a combination of third-party and internally built tools that, for instance, auto-triage customer issues, suggest fixes, prototype ideas, generate production-ready code, and conduct code reviews. Engineers have an unlimited token budget (but are not measured on it). We write in detail about our philosophy, current use of AI, and future plans for AI in Engineering here https://www.ashbyhq.com/blog/engineering/ai-ashby-engineering-and-the-future. Here’s an impromptu quote from Arjun in our company Slack of what it’s like to build a feature at Ashby: [https://app.ashbyhq.com/api/images/user-content/4ea5f68e-c33e-4ac9-831a-e732bee4a303/8d94727a-46d8-42a2-9627-ddcd7f822f95/arjun.png] And a demo of one of these building blocks: PUT EFFORT INTO DIVERSITY Diverse teams drive innovation and better outcomes. Having seen my mother and partner build their careers as minority women in non-diverse fields, I want to make sure Ashby creates opportunities for the next generation of engineers from underrepresented groups. Today, 25% of engineers and 50% of our engineering leaders at Ashby are from underrepresented groups. We are taking conscious steps to improve, like sourcing diverse candidates, providing generous paid family leave, no leetcode interviews, and more. INTERVIEW PROCESS At Ashby, our team and interview process want to help you show your best self. We’ll dive into past projects and simulate working together through pair programming, designing, writing design system specs collaboratively, and discussing decisions. There are no leetcode or whiteboard exercises. Our interview process is five rounds: - If we shortlist your application, we’ll ask for a video walkthrough of a product or feature you’ve designed. - Introduction call with a recruiter (30m, live). Be prepared to screen-share examples of your work. - A quick dive into some of your past work with me (30m, live). Be prepared to screen-share examples of your work. - A design take-home followed by a discussion of your decisions and reasoning (~4h async, 30m live) - Three interviews, a deep dive into a past design system or design project, a design system interview, and a pair-programming interview. (2h 45m, live) I will be your main point of contact and prep you for interviews. Each round will have written guidance so you know what to expect. You’ll meet 3-4 people in Design Engineering (with 5-15 minutes in each interview to ask them questions). If we don’t give an offer, we’ll provide feedback! YOUR FIRST THREE MONTHS AT ASHBY We want an exceptional onboarding experience for every new hire. At Ashby, your dev environment is set up with a single script, you push your first product change on day one, and you spend the rest of your time shipping product changes that give you a tour of our codebase and best practices. The product changes increase in scope and ambiguity from simple copy changes to the delivery of a prominent, impactful feature. Your manager will do a 30, 60, and 90-day review to give feedback and calibrate on how we work together. It’s a team effort to get you successfully onboarded; you’ll have a peer paired with you to answer questions, pair program, and check in often to see if you need help. The rest of the team will run training sessions on our culture, product, engineering process, and technical architecture. TECHNOLOGY STACK Our tech stack is TypeScript (frontend & backend), React, GraphQL API, Node.js, Postgres, and Redis. Depending on the level you’re applying for and your past experience, we expect, at a minimum, good proficiency with TypeScript, React, and CSS. Proficiency with backend technologies is a plus, as it allows you to work without coordinating with Product Engineers. BENEFITS - Competitive salary and equity. - 10-year exercise window for stock options. You shouldn’t feel pressure to purchase stock options if you leave Ashby —do it when you feel financially comfortable. - Unlimited PTO, and we will encourage you to take it. - A minimum of 12 weeks of fully paid parental leave, covered by Ashby. For folks outside the US, it may be longer to be in line with regional requirements. - Generous equipment, software, and office furniture budget. Get what you need to be happy and productive! - $100/month education budget with more expensive items (like conferences) covered with manager approval. - If you’re in the US, we offer top-tier health insurance for you and your dependents, with 100% of premiums covered by Ashby. In other countries, we provide high-quality supplemental health insurance for you and your dependents, also fully covered by us. Ashby’s success hinges on hiring great people and creating an environment where we can be happy, feel challenged, and do our best work. We’re being deliberate about building that environment from the ground up. I hope that excites you enough to apply. Ashby provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, sex, national origin, age, disability, genetics, sexual orientation, gender identity, or gender expression. We are committed to a diverse and inclusive workforce and welcome people from all backgrounds, experiences, perspectives, and abilities. Ashby is committed to a fair and transparent hiring process. We confirm that this advertisement is for an active, existing vacancy within our organization. Please be advised that we may use artificial intelligence-driven tools to assist our recruitment team in screening, assessing, and selecting candidates for this position.", "summaryDescription" : "Junior Design Engineer at Ashby", "createdAt" : "2026-06-16T00:27:48.351", "lastUpdated" : "2026-06-16T09:25:11.475", "ingestTimestamp" : "2026-06-16T00:27:48.351", "mongoId" : "6a305646f292fd229cf26ae3", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "75k-100k", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Junior", "dataQualityScore" : 0.7777778, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a305646f292fd229cf26ae4", "title" : "Junior Design Engineer", "company" : "Ashby", "industry" : "Engineering", "salary" : { "min" : 98000.0, "max" : 165000.0, "currency" : "USD", "frequency" : "Yearly" }, "location" : "Remote - US", "locations" : [ "Remote - US", "New York", "San Francisco", "Austin", "Portland", "Los Angeles", "Seattle", "Boston", "Chicago", "Denver" ], "timestamp" : "2026-06-16T14:04:57.707", "fingerprint" : "0f8818b97f007c3e9b00b5ecf7ebc1d6719eddaaa1f0c503a6cbfd0185f7b3d1", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/ashby/0f538da6-1e06-43f0-86cb-de8007814284/application", "externalId" : "0f538da6-1e06-43f0-86cb-de8007814284", "industryFunction" : { }, "structuredLocations" : [ { "country" : "United States", "continent" : "na", "workMode" : "remote" } ], "locationText" : "United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 0, "experienceMaxYears" : 2, "experienceLevel" : "Entry", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "Hi \uD83D\uDC4B\uD83C\uDFFE I’m Abhik https://www.linkedin.com/in/abhikpramanik/, Ashby's Co-Founder and VP of Engineering. This role is close to my heart because, as someone who can both design and code, it’s where I’ve always done my best work, but also where I was seen as a rebel and an outsider. I want folks like me to feel at home at Ashby, and so I made Design Engineering a formal role and department that works closely with me. Our first hire was over five years ago, and we’re doubling the team from five to over ten in the next year. This role truly expects you to design and code. Design Engineer at Ashby isn’t just a Frontend Engineer with new branding, nor is it a Designer vibe coding prototypes. Combining excellence in both is where magic happens. I found that when I put my best effort into both the design and technical implementation of a feature, I had a nimbleness and creativity that was hard to achieve when I did only one or the other. For instance, the UX and UI I envisioned often influenced the data model's design and flexibility, while the understanding of technology's capabilities often simplified or improved the design. This role embraces that. You’ll work on our most challenging design problems, help others improve their designs by expanding and enhancing our in-house design system, and consult on bespoke design work needed by Product Engineers. To ground it with examples, Design Engineers at Ashby have: - Redesigned our mobile web app by talking with customers who use it often, wireframing new flows, implementing its design system, and using that system to turn the wireframes into a polished UI. - Built a set of flexible, composable components in our design system that allow other engineers to build beautiful, consistent setup wizards across our product easily. - Helped a Product Engineer improve the information hierarchy and scannability of their design for viewing a candidate’s assessments. Recruiters can quickly parse information and pick out anomalies. The Design Engineer role is more common today than five years ago, but I believe Ashby offers a unique opportunity that few can match: - You work on a product at scale, not at an early-stage startup struggling to find users and get feedback on what you’ve designed and built. At Ashby, your work will touch over 100,000 weekly active users, millions of candidates per week, and notable customers like Notion, Linear, Shopify, and Snowflake. You’ll get to test out ideas with our own recruiting team and hiring managers who use Ashby every day (like me), and often hear customer feedback as early as the day you release. - This role has always had the commitment of both Benji (CEO & Co-Founder) and me: I’ve held the role, steadfastly championed it since we started hiring in 2020, and haven’t diluted its responsibilities as we’ve grown (in fact, we’ve doubled down). - You get to shape the UI and UX of a powerful and complex product. Our users need software that helps them move quickly while adapting to their unique workflows and preferences. As a result, our UI isn’t a simple chatbox, but it can’t rely on a sea of knobs and dials either. It needs to feel approachable to someone using it for the first time while offering increasingly powerful ways to customize and automate their work. WHY YOU SHOULDN’T APPLY Design Engineers come in many flavors, not all of which fit our model. Here are some reasons you might not enjoy the role: - You only want to work on design systems. While improving our design system is one of many responsibilities, you won’t be able to work on it exclusively. - You like to do extensive research and user testing before implementation. The beauty of being part-Engineer is that you can build conviction by shipping to a subset of users (including our own team) and gathering feedback! - You want everything to be perfect before it gets into a user’s hands. One of the drivers of our success is that we ship fast. That often means we don’t agonize over every detail and instead iterate over time, often letting user feedback and business needs drive prioritization. - You don’t have excellent taste and execution in visual design. Design Engineers set the bar for visual design in our app and continually improve it, pushing its boundaries with each new feature or redesign. - You need company-driven process and structure to get your projects across the finish line. Sprint planning and well-defined project management processes are things you need or look to others to lead. You’d rather focus on the design and technical details. - You only want to do exciting work. We’re building a team of kind, collaborative folks. Customer issues and investigations are distributed across the team, including our high-level ICs. WHAT SENIORITY/LEVEL TO APPLY FOR We’ve posted levels from Junior to Staff. The higher the level, the more experience and alignment with the role we expect when reviewing your application and while interviewing. Please apply to the one that sets the right expectations. - Junior Design Engineer (This Posting) - You should have no more than 2 years of industry experience as a designer or engineer. We want to see projects (personal or professional) with at least a couple of users that showcase great visual taste and burgeoning talent in both UI/UX and Engineering. - Design Engineer - This posting covers both Mid and Senior levels. You have 2+ years of continuous experience (e.g., internships don’t count) as an Engineer or a Designer. You have good proficiency in both Design and Engineering, with exceptional proficiency in the discipline you practice full-time. Regardless of which discipline you’re coming from, we expect experience designing products and shipping code to hundreds of users (even if through side projects). - Staff Design Engineer - We’re looking for folks who’ve practiced our flavor of Design Engineering professionally. It may not be through a formal title, but you’ve made major contributions to a design system and designed and implemented features for hundreds of users and iterated on them through user feedback. Internally, we do not use these titles, but Engineers are leveled based on proficiency (which you can read about here https://www.ashbyhq.com/blog/engineering/leveling-and-compensation). WHAT WE’RE BUILDING As engineers, we are used to tooling that makes us better at what we do. When we started Ashby, we saw the opposite with Talent Acquisition software. Recruiting teams were leveling up how they did their work, but instead of software meeting this new standard, it held them back. Scheduling a final round is an excellent example. Recruiting teams wanted to schedule candidates faster, track interviewer preparation and quality, and do it with half the headcount. A recruiter needed to manually collect availability from the candidate, identify qualified interviewers, perform “Calendar Tetris” to find who is available to interview the candidate, schedule on the earliest date possible, and make any last-minute adjustments as availability changed. They must do this while considering the interview load on each individual and whether interviewers need to be trained and shadowing others. \uD83E\uDD75 TA software didn’t help. As hiring managers, we know TA is a critical function, and as engineers, we know software can do better. So, we built and continue to build Ashby to give TA teams the highest standard of tooling. Software that’s intelligent and powerful. Software that provides insights into where they’re failing and automates or simplifies many of the tasks they’re underwater with. We want other functions and departments to be jealous of what TA teams can do with Ashby, and today they often are! ENGINEERING CULTURE Our engineering culture is motivated by Benji’s (my Co-founder and CEO) and my belief that a small, talented team, given the right environment, can build high-quality software fast (and work regular hours!). We do it through: - Minimal process with ownership over decisions normally made by product and design - Natural collaboration and deliberate communication - Investing in tools and abstractions that give us leverage - Putting effort into building a diverse team MINIMAL PROCESS & LOTS OF OWNERSHIP The best engineers we’ve worked with delivered reliably magical outcomes. They took customer problems and relentlessly drove them to solutions that were not only successful but often brilliant and creative. While they did this with minimal oversight, stakeholders were never in the dark as to what was going on, and no setback was a surprise. Traditional product-development processes aren’t meant for the best engineers. Their purpose is to create consistent outcomes regardless of the engineer’s skill. But, consistency comes at the expense of an engineer’s time and freedom—both ingredients necessary to generate those magical outcomes. As a result, process stifles the best engineers and doesn’t give others the opportunity to practice the behaviors that made the best engineers the “best.” At Ashby, we want to build an environment that encourages every engineer to be their best. So, at Ashby, every Engineer runs their project. Product Managers (and Designers) build strategy, do customer research, and hand off problem briefs to Engineers. Engineers take on the rest: they research the problem, write product specs, build wireframes, and implement their solution end-to-end. We rely on engineers, not process, to push information outward to the relevant folks (e.g., Product Managers) and pull folks in to help (e.g., Designers, Infra). It’s a new level of ownership for many engineers, but we’d rather an engineer fail a bit and coach up their skills than use process as a crutch. Not everyone succeeds in our culture, but those who do thrive. COLLABORATION IS NATURAL & COMMUNICATION IS DELIBERATE Our engineering team consists of lifelong learners who are talented but also humble and kind (meet them here https://www.ashbyhq.com/team!). These attributes create an environment where collaboration happens naturally. We combine this with research, prototyping, and written proposals to see around corners and get feedback from the team across time zones. Focus time is something that we hold sacred, and, with thoughtful and deliberate communication, engineers are in <2h meetings per week (I wrote about it here https://www.ashbyhq.com/blog/company/thoughtful-communication). Today, 25% of engineers and 50% of our engineering leaders at Ashby are from underrepresented groups. We are taking conscious steps to improve, like sourcing diverse candidates, providing generous paid family leave, no leetcode interviews, and more. [https://app.ashbyhq.com/api/images/user-content/4ea5f68e-c33e-4ac9-831a-e732bee4a303/d4679311-9dba-4031-bf5e-19ce78597ab1/calendar.png] We also meet in person at least twice a year, once as a department and once as a company. You also have a small budget to meet up with folks in your city/region. INCREASE LEVERAGE, NOT TEAM SIZE We built Ashby with the quality, breadth, and depth that many customers would expect from much larger teams over larger time scales. We’ve done this through investment in: - Great developer tooling. Our CI/CD takes ~10m, and we deploy at least 15x a day. A debugger that works out of the box. Everyone on the team has contributed to our developer experience \uD83D\uDCAA\uD83C\uDFFE. - Building blocks to create powerful and customizable products fast. At the core of Ashby is a set of common components (analytics modeling and query language, policy engine, workflow engine, design system) that we constantly improve. Each improvement to a common component cascades throughout our app (short video below). - AI-powered tooling. We think of AI as a way to automate the mundane parts of building and maintaining high-quality software. We use a combination of third-party and internally built tools that, for instance, auto-triage customer issues, suggest fixes, prototype ideas, generate production-ready code, and conduct code reviews. Engineers have an unlimited token budget (but are not measured on it). We write in detail about our philosophy, current use of AI, and future plans for AI in Engineering here https://www.ashbyhq.com/blog/engineering/ai-ashby-engineering-and-the-future. Here’s an impromptu quote from Arjun in our company Slack of what it’s like to build a feature at Ashby: [https://app.ashbyhq.com/api/images/user-content/4ea5f68e-c33e-4ac9-831a-e732bee4a303/8d94727a-46d8-42a2-9627-ddcd7f822f95/arjun.png] And a demo of one of these building blocks: PUT EFFORT INTO DIVERSITY Diverse teams drive innovation and better outcomes. Having seen my mother and partner build their careers as minority women in non-diverse fields, I want to make sure Ashby creates opportunities for the next generation of engineers from underrepresented groups. Today, 25% of engineers and 50% of our engineering leaders at Ashby are from underrepresented groups. We are taking conscious steps to improve, like sourcing diverse candidates, providing generous paid family leave, no leetcode interviews, and more. INTERVIEW PROCESS At Ashby, our team and interview process want to help you show your best self. We’ll dive into past projects and simulate working together through pair programming, designing, writing design system specs collaboratively, and discussing decisions. There are no leetcode or whiteboard exercises. Our interview process is five rounds: - If we shortlist your application, we’ll ask for a video walkthrough of a product or feature you’ve designed. - Introduction call with a recruiter (30m, live). Be prepared to screen-share examples of your work. - A quick dive into some of your past work with me (30m, live). Be prepared to screen-share examples of your work. - A design take-home followed by a discussion of your decisions and reasoning (~4h async, 30m live) - Three interviews, a deep dive into a past design system or design project, a design system interview, and a pair-programming interview. (2h 45m, live) I will be your main point of contact and prep you for interviews. Each round will have written guidance so you know what to expect. You’ll meet 3-4 people in Design Engineering (with 5-15 minutes in each interview to ask them questions). If we don’t give an offer, we’ll provide feedback! YOUR FIRST THREE MONTHS AT ASHBY We want an exceptional onboarding experience for every new hire. At Ashby, your dev environment is set up with a single script, you push your first product change on day one, and you spend the rest of your time shipping product changes that give you a tour of our codebase and best practices. The product changes increase in scope and ambiguity from simple copy changes to the delivery of a prominent, impactful feature. Your manager will do a 30, 60, and 90-day review to give feedback and calibrate on how we work together. It’s a team effort to get you successfully onboarded; you’ll have a peer paired with you to answer questions, pair program, and check in often to see if you need help. The rest of the team will run training sessions on our culture, product, engineering process, and technical architecture. TECHNOLOGY STACK Our tech stack is TypeScript (frontend & backend), React, GraphQL API, Node.js, Postgres, and Redis. Depending on the level you’re applying for and your past experience, we expect, at a minimum, good proficiency with TypeScript, React, and CSS. Proficiency with backend technologies is a plus, as it allows you to work without coordinating with Product Engineers. BENEFITS - Competitive salary and equity. - 10-year exercise window for stock options. You shouldn’t feel pressure to purchase stock options if you leave Ashby —do it when you feel financially comfortable. - Unlimited PTO, and we will encourage you to take it. - A minimum of 12 weeks of fully paid parental leave, covered by Ashby. For folks outside the US, it may be longer to be in line with regional requirements. - Generous equipment, software, and office furniture budget. Get what you need to be happy and productive! - $100/month education budget with more expensive items (like conferences) covered with manager approval. - If you’re in the US, we offer top-tier health insurance for you and your dependents, with 100% of premiums covered by Ashby. In other countries, we provide high-quality supplemental health insurance for you and your dependents, also fully covered by us. Ashby’s success hinges on hiring great people and creating an environment where we can be happy, feel challenged, and do our best work. We’re being deliberate about building that environment from the ground up. I hope that excites you enough to apply. Ashby provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, sex, national origin, age, disability, genetics, sexual orientation, gender identity, or gender expression. We are committed to a diverse and inclusive workforce and welcome people from all backgrounds, experiences, perspectives, and abilities. Ashby is committed to a fair and transparent hiring process. We confirm that this advertisement is for an active, existing vacancy within our organization. Please be advised that we may use artificial intelligence-driven tools to assist our recruitment team in screening, assessing, and selecting candidates for this position.", "summaryDescription" : "Junior Design Engineer at Ashby", "createdAt" : "2026-06-16T00:27:34.328", "lastUpdated" : "2026-06-16T14:04:57.707", "ingestTimestamp" : "2026-06-16T00:27:34.328", "mongoId" : "6a305646f292fd229cf26ae4", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 98000, "salaryAnnualMax" : 165000, "salaryBand" : "75k-100k", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Junior", "dataQualityScore" : 0.7777778, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "SaaS", "llmIndustryConfidence" : 0.98 }, { "id" : "6a305c63f292fd229cf619d5", "title" : "Furnace Design Engineer", "company" : "O-I", "industry" : "Packaging And Containers", "salary" : { "min" : 125000.0, "max" : 175000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior Furnace Design Engineer in Perrysburg, United States, adjusted for industry and company size." }, "location" : "Perrysburg, OH, United States", "locations" : [ "Perrysburg", "OH", "United States" ], "timestamp" : "2026-06-16T07:37:24.695", "fingerprint" : "bacc3f2450c4ced190029b8eea18ade1ede4d4f72b98d1635a8a2fe83a0c6e51", "source" : "smartrecruiters", "language" : "en", "applyUrl" : "https://jobs.smartrecruiters.com/O-I/744000132276489-furnace-design-engineer", "externalId" : "744000132276489", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Perrysburg", "state" : "Ohio", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "41.5571178,-83.6279321" } ], "locationText" : "Perrysburg, Ohio, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 2, "experienceMaxYears" : 5, "experienceLevel" : "mid", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "Remember the last time you opened a bottle of bourbon, a cold beer after a hard day’s work or a bottle of sparkling mineral water to quench your thirst? Well, it was probably made by us, we are O-I Glass and we love that we make more glass containers than anyone in the world. O-I has more than a century of experience crafting pure, sustainable, brand-building glass packaging for many of the world’s best-known food and beverage brands. We are proud to provide high quality glass packaging for beer, wine, spirits, food, non-alcoholic beverages, cosmetics, and pharmaceuticals. With 19,000 + employees and an unparalleled footprint spanning 64 plants in 18 countries, O-I is a truly global maker of glass packaging. From engineering and manufacturing to brand development, design and innovation, we are dedicated to providing unique solutions to exceed our customers’ expectations and fuel consumers’ desire for glass. Furnace and refractory design and operations engineer for glass melting furnaces for container glass manufacturing facilities in a global environment. Provide furnace audits and campaign life assessments with required reporting defining necessary actions, maintenance requirements, and risk identification for assigned furnaces. Provide technical support and project management for projects including scoping, estimation, design, construction and commissioning. Provide operating and maintenance support for the applicable systems to the facilities. Responsible for complex and significant projects using considerable engineering expertise in furnace and refractory design and hot repair techniques to complete projects with minimal technical oversight. SCOPE AND IMPACT * Responsible for the evaluation of furnace condition according to O-I Global Manufacturing fundamentals and O-I Global furnace team standards. * Responsible for scoping, supervision and follow-up of design and repair project development through execution * Responsible for realizing the appropriate maintenance actions for assigned furnaces to ensure asset stability & reliability on time, and on budget * Required to support ongoing development and proper use of furnace and refractory standards. * Expected to provide input into decisions with potentially significant financial impacts to the business. Responsibilities: * Perform and report on furnace audits and campaign life assessments for assigned furnaces. Follow-up with necessary hot repair documentation, solutions to issues, and supervision of repairs. * Exceptional maintenance budget definition and execution for assigned furnaces * Scoping, estimating, design, selection, inspection, and construction supervision of furnace refractories with minimal oversight. Supervision of internal and external engineering staff for the aforementioned areas. * Develop detailed and clear scopes of work for engineering projects eliminating all ambiguity. * Guide engineers during the production of drawings. * Review drawings and Bills of Materials for accuracy and completeness. * Mentor engineers and designers in design and audit practices and techniques. * Collaborate with Mechanical, Structural, Electrical and Process Control engineering as required. * Provide feedback to Global Furnace Team and other disciplines for improvement of design, construction practices, material standards, etc. * Perform remote and field plant technical assistance activities, identifying improvement opportunities and implementing action plans * Support on-site activities as required, participating in project meetings, reporting on project status and issues, elaborating action plans and maintaining communication with contractors as required to effectively execute project tasks * Plan, schedule and track project activities including cost control * Elaborate technical reports, asset audits/assessments and trip reports as required, including documentation management according to company policy * Assure compliance with all Health & Safety and environmental requirements, aligned with plant & country group EH&S. * Provide direction as required to aide in decision making related to the scope, schedule, cost and risk assessment for projects as part of business case development and validation. * Strong communication skills required. Will be expected to present to furnace team, project teams, and plant teams. ## Qualifications * Bachelor’s Degree in Ceramic Engineering preferred. Chemical or Mechanical Engineering or equivalent knowledge will be considered. * 5+ years of experience in glass furnace and refractory design, construction, audits and hot repairs. * Working knowledge of refractory expansion & interface with binding steel * Working knowledge of refractory selections and suppliers in design and hot repair * Working knowledge of industrial manufacturing systems, buildings, infrastructure, and process related systems, understanding the interaction of these systems with refractory and binding steel. * Strong knowledge and awareness of safety and PPE requirements before, during and after projects * Ability to work within multinational environments * MS Office knowledge * AutoCAD knowledge * SAP Knowledge * English skills: Oral – Advanced, Written/Reading – Advanced TRAVEL REQUIREMENTS 25 – 40% international and domestic travel required. * Construction supervision on site periods up to 4 weeks period ## Additional Information Salary Range: The salary range for this position will be between $120,000 - $140,000 with a 10% STI. Actual pay will be adjusted based upon candidate experience and other job-related factors permitted by law. O-I offers a very generous benefit package – some of the highlights are: * 10 paid holidays each year * Health, Dental, Prescription and Vision care coverage * Perform Well-Being Program – earn employer contributions in your HSA or HRA plan * Wellness Incentive – earn additional funds for your HSA or HRA plan * Group Life Insurance * Accidental Death & Dismemberment Insurance * Voluntary Employee and Dependent Life Insurance * Weekly Disability Insurance * 401(k) Retirement Saving Plans * Employee Assistance Program This is an opportunity to help build something from the ground up by creating new experiences and fostering a team culture where you can shine. O-I is committed to fostering an inclusive environment that attracts and embraces the brightest minds and creates a culture that welcomes a diversity of ideas and perspectives while encouraging growth and rewarding performance. All your information will be kept confidential according to EEO guidelines. O-I is an Equal Opportunity Employer and does not discriminate against any employee or applicant for employment because of race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, and basis of disability or any other federal, state or local protected class. If, because of a medical condition or disability, you need a reasonable accommodation for any part of the application process, or in order to perform the essential functions of a position, please contact O-I at [hr.recruiters@o-i.com](mailto:hr.recruiters@o-i.com) and let us know the nature of your request and your contact information.", "summaryDescription" : "Furnace Design Engineer at O-I", "postedDate" : "2026-06-15T19:55:39.000", "createdAt" : "2026-06-15T23:54:17.129", "lastUpdated" : "2026-06-16T07:37:24.695", "ingestTimestamp" : "2026-06-15T23:54:17.129", "mongoId" : "6a305c63f292fd229cf619d5", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 125000, "salaryAnnualMax" : 175000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.8888889, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Manufacturing", "llmIndustryConfidence" : 0.95 }, { "id" : "6a306a26f292fd229cfcb53b", "title" : "Furnace Design Engineer", "company" : "O-I", "industry" : "Packaging And Containers", "salary" : { "min" : 115000.0, "max" : 165000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior Furnace Design Engineer in Perrysburg, United States, adjusted for industry and company size." }, "location" : "Perrysburg, OH, United States", "locations" : [ "Perrysburg", "OH", "United States" ], "timestamp" : "2026-06-16T12:43:41.966", "fingerprint" : "75f9bd83172499a54b2e7cc2f31e7350a8b393d84254240eaae7f5411c9fab4e", "source" : "smartrecruiters", "language" : "en", "applyUrl" : "https://jobs.smartrecruiters.com/O-I/744000132276489-furnace-design-engineer", "externalId" : "744000132276489", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Perrysburg", "state" : "Ohio", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "41.5571178,-83.6279321" } ], "locationText" : "Perrysburg, Ohio, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 2, "experienceMaxYears" : 5, "experienceLevel" : "mid", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "Remember the last time you opened a bottle of bourbon, a cold beer after a hard day’s work or a bottle of sparkling mineral water to quench your thirst? Well, it was probably made by us, we are O-I Glass and we love that we make more glass containers than anyone in the world. O-I has more than a century of experience crafting pure, sustainable, brand-building glass packaging for many of the world’s best-known food and beverage brands. We are proud to provide high quality glass packaging for beer, wine, spirits, food, non-alcoholic beverages, cosmetics, and pharmaceuticals. With 19,000 + employees and an unparalleled footprint spanning 64 plants in 18 countries, O-I is a truly global maker of glass packaging. From engineering and manufacturing to brand development, design and innovation, we are dedicated to providing unique solutions to exceed our customers’ expectations and fuel consumers’ desire for glass. Furnace and refractory design and operations engineer for glass melting furnaces for container glass manufacturing facilities in a global environment. Provide furnace audits and campaign life assessments with required reporting defining necessary actions, maintenance requirements, and risk identification for assigned furnaces. Provide technical support and project management for projects including scoping, estimation, design, construction and commissioning. Provide operating and maintenance support for the applicable systems to the facilities. Responsible for complex and significant projects using considerable engineering expertise in furnace and refractory design and hot repair techniques to complete projects with minimal technical oversight. SCOPE AND IMPACT * Responsible for the evaluation of furnace condition according to O-I Global Manufacturing fundamentals and O-I Global furnace team standards. * Responsible for scoping, supervision and follow-up of design and repair project development through execution * Responsible for realizing the appropriate maintenance actions for assigned furnaces to ensure asset stability & reliability on time, and on budget * Required to support ongoing development and proper use of furnace and refractory standards. * Expected to provide input into decisions with potentially significant financial impacts to the business. Responsibilities: * Perform and report on furnace audits and campaign life assessments for assigned furnaces. Follow-up with necessary hot repair documentation, solutions to issues, and supervision of repairs. * Exceptional maintenance budget definition and execution for assigned furnaces * Scoping, estimating, design, selection, inspection, and construction supervision of furnace refractories with minimal oversight. Supervision of internal and external engineering staff for the aforementioned areas. * Develop detailed and clear scopes of work for engineering projects eliminating all ambiguity. * Guide engineers during the production of drawings. * Review drawings and Bills of Materials for accuracy and completeness. * Mentor engineers and designers in design and audit practices and techniques. * Collaborate with Mechanical, Structural, Electrical and Process Control engineering as required. * Provide feedback to Global Furnace Team and other disciplines for improvement of design, construction practices, material standards, etc. * Perform remote and field plant technical assistance activities, identifying improvement opportunities and implementing action plans * Support on-site activities as required, participating in project meetings, reporting on project status and issues, elaborating action plans and maintaining communication with contractors as required to effectively execute project tasks * Plan, schedule and track project activities including cost control * Elaborate technical reports, asset audits/assessments and trip reports as required, including documentation management according to company policy * Assure compliance with all Health & Safety and environmental requirements, aligned with plant & country group EH&S. * Provide direction as required to aide in decision making related to the scope, schedule, cost and risk assessment for projects as part of business case development and validation. * Strong communication skills required. Will be expected to present to furnace team, project teams, and plant teams. ## Qualifications * Bachelor’s Degree in Ceramic Engineering preferred. Chemical or Mechanical Engineering or equivalent knowledge will be considered. * 5+ years of experience in glass furnace and refractory design, construction, audits and hot repairs. * Working knowledge of refractory expansion & interface with binding steel * Working knowledge of refractory selections and suppliers in design and hot repair * Working knowledge of industrial manufacturing systems, buildings, infrastructure, and process related systems, understanding the interaction of these systems with refractory and binding steel. * Strong knowledge and awareness of safety and PPE requirements before, during and after projects * Ability to work within multinational environments * MS Office knowledge * AutoCAD knowledge * SAP Knowledge * English skills: Oral – Advanced, Written/Reading – Advanced TRAVEL REQUIREMENTS 25 – 40% international and domestic travel required. * Construction supervision on site periods up to 4 weeks period ## Additional Information Salary Range: The salary range for this position will be between $120,000 - $140,000 with a 10% STI. Actual pay will be adjusted based upon candidate experience and other job-related factors permitted by law. O-I offers a very generous benefit package – some of the highlights are: * 10 paid holidays each year * Health, Dental, Prescription and Vision care coverage * Perform Well-Being Program – earn employer contributions in your HSA or HRA plan * Wellness Incentive – earn additional funds for your HSA or HRA plan * Group Life Insurance * Accidental Death & Dismemberment Insurance * Voluntary Employee and Dependent Life Insurance * Weekly Disability Insurance * 401(k) Retirement Saving Plans * Employee Assistance Program This is an opportunity to help build something from the ground up by creating new experiences and fostering a team culture where you can shine. O-I is committed to fostering an inclusive environment that attracts and embraces the brightest minds and creates a culture that welcomes a diversity of ideas and perspectives while encouraging growth and rewarding performance. All your information will be kept confidential according to EEO guidelines. O-I is an Equal Opportunity Employer and does not discriminate against any employee or applicant for employment because of race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, and basis of disability or any other federal, state or local protected class. If, because of a medical condition or disability, you need a reasonable accommodation for any part of the application process, or in order to perform the essential functions of a position, please contact O-I at [hr.recruiters@o-i.com](mailto:hr.recruiters@o-i.com) and let us know the nature of your request and your contact information.", "summaryDescription" : "Furnace Design Engineer at O-I", "postedDate" : "2026-06-15T19:55:39.000", "createdAt" : "2026-06-15T23:50:14.110", "lastUpdated" : "2026-06-16T12:43:41.966", "ingestTimestamp" : "2026-06-15T23:50:14.110", "mongoId" : "6a306a26f292fd229cfcb53b", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 115000, "salaryAnnualMax" : 165000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.8888889, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Manufacturing", "llmIndustryConfidence" : 0.95 }, { "id" : "69d5e4952beec4dd3d9317cb", "title" : "Senior UCIe PHY Expert", "company" : "Annapurna Labs", "industry" : "Software Development, Cloud Hardware Development, Cloud Computing", "salary" : { "min" : 159000.0, "max" : 215300.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Austin, Texas, USA", "locations" : [ "Austin, Texas, USA" ], "timestamp" : "2026-06-15T03:34:48.001", "fingerprint" : "b303ca7974900aeb02e5f7af4fe861c7a18c40610eb992192667eb2e707ef57d", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/10385469/apply", "externalId" : "a9f863f8-366d-40fe-9e3e-938283b405bd", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Austin", "state" : "Texas", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "30.2711286,-97.7436995" } ], "locationText" : "Austin, Texas, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "UCIe, SERDES, High speed analog, SoC, IO, Subsystems, ASICs, PHY, Controller, Lua, Bash, Python", "professionalSkills" : [ "Silicon development", "Hardware/software co-design", "IP integration", "Silicon bring up", "Characterization", "Validation", "System-level debug", "Root-cause analysis" ], "hardSkillsList" : [ "Electrical Engineering", "Computer Engineering", "Systems Engineering", "Physical design", "UCIe timings", "UCIe features", "Post-silicon bring-up" ], "softSkillsList" : [ "Leadership" ], "hardSkills" : [ { "name" : "Electrical Engineering", "level" : "intermediate" }, { "name" : "Computer Engineering", "level" : "intermediate" }, { "name" : "Systems Engineering", "level" : "intermediate" }, { "name" : "Physical design", "level" : "intermediate" }, { "name" : "UCIe timings", "level" : "intermediate" }, { "name" : "UCIe features", "level" : "intermediate" }, { "name" : "Post-silicon bring-up", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Leadership" } ], "majorSkills" : "UCIe PHY, Machine learning silicon, High speed analog", "majorSkillsList" : [ "UCIe PHY", "Machine learning silicon", "High speed analog" ], "coreResponsibilities" : "Collaborate with architects, design teams, and software engineers, Support on-going debug and operations of previous ML, Dive deep into IP integration, packaging, silicon bring, Independently develop scripts, Execute scripts, Collaborate with software engineers, Identify problems, Prototype solutions, Lead data collection, Review dashboards for emergent issues, Partner with other teams to drive complex debugs, Improve reliability and performance of products, Participate in design discussions, Participate in team planning, Participate in code reviews, Participate in tickets/metric reviews, Participate in data center capacity initiatives, Mentor others on the team, Participate in the hiring process", "teamCollaboration" : "Mixed group of hardware and software engineers; Work with vendors; Internal design teams; Cross-functional triage effort; Partnering with other teams", "domainKnowledge" : "Machine learning silicon; Machine learning servers; AWS data centers; High speed analog technologies; Advanced server hardware; Embedded environments", "domainList" : [ "machine-learning-silicon", "machine-learning-servers", "aws-data-centers", "high-speed-analog-technologies", "advanced-server-hardware", "embedded-environments" ], "domainSpecificKnowledge" : [ "Machine learning silicon", "Machine learning servers", "AWS data centers", "High speed analog technologies", "Advanced server hardware", "Embedded environments" ], "communicationSkills" : "Good communication skills", "innovationCreativity" : "Innovate the next generation of machine learning chips", "problemSolvingSkills" : "Constructively identifying problems; Prototyping solutions; Complex technical debug efforts; System-level debug; Root-cause analysis", "outcomesObjectives" : "Create the most stable machine learning platforms; Improve the reliability and performance of our products", "qualificationsBasic" : "Bachelor's degree in Electrical Engineering, Computer Engineering, Systems Engineering, or related fields, 7+ years of experience in Silicon development, 3+ years in SOC/IO/Subsystems, Experience working closely with physical design teams, Good understanding of UCIe at the PHY and controller level, Good knowledge of UCIe training, timing parameters and/or controller features, Support the physical design team with IP integration, 2.5D packaging, clocking and timing constraints, Ability to create scripts (lua, bash, python, etc.), Drive cross-functional triage effort on functional and performance issues, Take the leadership role in post-silicon bring-up of UCIe-Advanced or Standard, Perform system-level debug and root-cause analysis", "qualificationsPreferred" : "MS degree in computer science, electrical engineering, or related field, Firmware development skills within embedded environments, Good leadership skills, Ability to multi-task and thrive in a dynamic environment, Knowledge of UCIe phy and controller related protocols, Good communication skills, Interpersonal skills", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Annapurna Labs (our organization within AWS UC) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. In Annapurna Labs we are at the forefront of hardware/software co-design not just in Amazon Web Services (AWS) but across the industry. Our Machine Learning Accelerator (MLA) Technology is seeking a UCIe PHY expert who is interested in diving deep into the definition, design, validation, and data center operation of AWS’s next generation machine learning silicon and servers. As a senior member of our technology team, you will have opportunities to participate in the design and execution of UCIe, SERDES, and general high speed analog technologies, with the goal of creating the most stable machine learning platforms within AWS’s data centers. A senior UCIE engineer on our team needs to be able to work with vendors and internal design teams, understand UCIe timings and features, write/modify tests at scale, debug fleet wide issues, and collect data from manufacturing and the data center. Our broader team has end to end ownership of some of the most complicated IPs on the most advanced server hardware in the world. We drive complex technical debug efforts involving our IPs and leverage the massive scale of EC2 to monitor, optimize, and improve our machine learning hardware reliability on behalf of our customers. Key job responsibilities As a senior member of the team, you will join a mixed group of hardware and software engineers working to design, integrate, and innovate the next generation of machine learning chips into Trainium servers. In this position it is expected that you will: * Collaborate with architects, design teams, and software engineers on our next generation ML chips * Support on-going debug and operations of previous ML chips within manufacturing and the data center * Dive deep into IP integration, packaging, silicon bring up, characterization, and validation of our UCIe subsystems * Independently develop the scripts you need to execute and collaborate with software engineers as your needs scale A day in the life A day in the life of a CHDE focused on UCIe on the MLA Technology team focuses on operational excellence, constructively identifying problems, prototyping solutions, and leading data collection at scale to improve our products. We start each day looking at our fleet, reviewing dashboards for emergent issues impacting our customers, partnering with other teams to drive complex debugs as it pertains to UCIe and associated SoC subsystems. We then look forward to the future technologies being developed and how we can best focus our efforts to help improve them and ensure a high quality product on behalf of our customers. Our team members touch everything from electrical simulations, to hardware qualification on test benches, to software driven data center metrics, with a broad range of tasks across multiple skillsets where you can help improve the reliability and performance of our products. You help the team evolve by actively participating in design discussions, team planning, code reviews, tickets/metric reviews, and data center capacity initiatives. CHDEs on the MLA Technology Team are expected to help mentor others on the team in their area of expertise to help develop the team’s baseline skillsets and to participate in the hiring process for the team. Basic Qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, Systems Engineering, or related fields - 7+ years of experience in Silicon development - 3+ years in SOC/IO/Subsystems Experience working closely with physical design teams to develop highly optimized ASICs with excellent power, performance and area - Good understanding of UCIe at the PHY and controller level - Good knowledge of UCIe training, timing parameters and/or controller features - Support the physical design team with IP integration, 2.5D packaging, clocking and timing constraints - Ability to create scripts (lua, bash, python, etc.) to accomplish functional day to day tasks. - Drive cross-functional triage effort on functional and performance issues - Take the leadership role in post-silicon bring-up of UCIe-Advanced or Standard - Perform system-level debug and root-cause analysis through bring-up, characterization, validation and production phases Preferred Qualifications: - MS degree in computer science, electrical engineering, or related field - Strong Firmware development skills within embedded environments - Good leadership skills and ability to multi-task and thrive in a dynamic environment - Knowledge of UCIe phy and controller related protocols - Good communication skills and interpersonal skills Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits . USA, TX, Austin - 159,200.00 - 215,300.00 USD annually", "summaryDescription" : "Senior UCIe PHY Expert at Annapurna Labs. Skills: UCIe PHY, Machine learning silicon, High speed analog. Collaborate with architects, design teams, and software engineers. Support on-going debug and operations of previous ML", "postedDate" : "2026-06-13T01:20:14.213", "createdAt" : "2026-06-13T01:20:14.213", "lastUpdated" : "2026-06-15T03:34:48.001", "ingestTimestamp" : "2026-06-13T01:20:14.213", "mongoId" : "69d5e4952beec4dd3d9317cb", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/10385469/apply", "salaryAnnualMin" : 159000, "salaryAnnualMax" : 215300, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "Electrical Engineering", "Computer Engineering", "Systems Engineering", "Physical design", "UCIe timings", "UCIe features", "Post-silicon bring-up", "Leadership", "UCIe PHY", "Machine learning silicon", "High speed analog", "Silicon development", "Hardware/software co-design", "IP integration", "Silicon bring up", "Characterization", "Validation", "System-level debug", "Root-cause analysis", "Machine learning servers", "AWS data centers", "High speed analog technologies", "Advanced server hardware", "Embedded environments" ], "skillCount" : 24, "jobCategory" : "engineering", "dataQualityScore" : 1.0, "daysOld" : 2, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology" }, { "id" : "6a2ca13b74d8ee00a09a4ceb", "title" : "Design Engineer", "company" : "Build AI for the Built World", "industry" : "Product", "salary" : { "min" : 120000.0, "max" : 240000.0, "currency" : "USD", "frequency" : "Yearly" }, "location" : "New York City", "locations" : [ "New York City", "London" ], "timestamp" : "2026-06-15T10:11:02.843", "fingerprint" : "411f530679ead83059bb89b66fff986abb7d6dd5d6afc76c0ee103df6bf67fa6", "source" : "ashby", "applyUrl" : "https://jobs.ashbyhq.com/build/27cf186a-254d-42dd-a38e-70e7ac11a105/application", "externalId" : "27cf186a-254d-42dd-a38e-70e7ac11a105", "industryFunction" : { }, "structuredLocations" : [ { "city" : "New York", "state" : "New York", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite" } ], "locationText" : "New York, New York, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 3, "experienceMaxYears" : 6, "experienceLevel" : "Mid", "technicalSkills" : "AI, frontend", "professionalSkills" : [ "AI, software, the future of the built world, institutional real estate, digital infrastructure, energy, industrial projects." ], "hardSkillsList" : [ "frontend craft" ], "softSkillsList" : [ "ownership, accountability" ], "hardSkills" : [ { "name" : "frontend craft", "level" : "intermediate" } ], "softSkills" : [ { "name" : "ownership, accountability" } ], "majorSkills" : "design and build, frontend craft, customer experience, quality, AI", "majorSkillsList" : [ "design and build, frontend craft, customer experience, quality, AI" ], "coreResponsibilities" : "Design and build customer-facing surfaces end to end, including website, marketing pages, demos, portals, workflow interfaces, and dashboards. Maintain a high design standard across all touchpoints to ensure a cohesive brand experience. Translate complex AI capabilities into clear and trustworthy interfaces for institutional clients. Ship critical user-facing elements such as the first-time user experience, core decision paths, and flagship demos. Develop standalone microsites and pages. Collaborate with product and engineering teams to prioritize development based on user leverage and customer impact. Engage with customers to understand their decision-making processes. Pay close attention to small details like exports, emails, empty states, and loading screens. Uphold uncompromising quality standards, ensuring nothing confusing or trust-weakening is shipped.", "teamCollaboration" : "Partner with product and engineering to decide what gets built and in what order. Work closely with James SE. Work with elite teammates who think clearly, execute relentlessly, and take full ownership.", "communicationSkills" : "clear interfaces", "continuousLearning" : "Growth here is not just it reshapes how you operate and in return how Build operates.", "innovationCreativity" : "Inventing a better way to build through a collaboration between human experts and agentic AI. Push the frontier of what's possible.", "problemSolvingSkills" : "system design", "outcomesObjectives" : "Accelerate the world's most important built projects - digital infrastructure, energy, industrial - from concept to completion. Automate complex development and acquisitions workflows 90% faster than humans. Deliver a magnitude more deals. Enable people to make decisions, build relationships and create.", "qualificationsBasic" : "Ability to both design and build with frontend craft and taste. Track record of shipping high-quality customer-facing surfaces, products, or websites. Unreasonable about quality, allergic to anything average, confusing, or unfinished. Moves fast without compromising high standards. Owns outcomes end to end and cares about details. Energized by ambiguity and setting design standards at an AI-native company. Cares about AI, software, and the future of the built world.", "qualificationsPreferred" : "Experience designing for complex or technical products, especially AI or data-heavy interfaces. Experience building marketing sites or microsites that performed on their own merit. Experience as a founder, early designer, or early engineer at a high-growth startup. An eye for brand, not just product UX.", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "ABOUT BUILD AI for the Built World: Build has created the agentic AI stack for institutional real estate, automating complex development and acquisitions workflows 90% faster than humans to accelerate the world's most important built projects - digital infrastructure, energy, industrial - from concept to completion. Our mission is to accelerate and amplify the world's most important built projects - inventing a better way to build through a collaboration between human experts and agentic AI. We envision a future where the world's buildings are driven from concept to completion, autonomously. Without delays, cost, and complexity. Enabling people to deliver a magnitude more deals. To make decisions, build relationships and create. To start, we're partnering with the world's biggest built world institutions from $T alternative assets investors, prolific developers and even governments to push the frontier of what's possible. We're backed by c-suite from Blackstone and OpenAI alongside the world's best venture capital firms. Join us in shaping the future of the Built World and exponentially accelerate your career in the process. We welcome you to do your life's work here. THE ROLE We want you to be extraordinary at raising the standard of everything a customer touches. At Build, product means anything that reaches a customer: website, marketing pages, sales collateral, demos, customer portals, workflow interfaces, dashboards, reports, exports, emails and the smallest details inside our delivered work. This role exists to make all of it excellent. You should be unreasonable about quality. Allergic to anything average, confusing or unfinished, while still moving fast and shipping. You should be able to design and build, with strong frontend craft, real taste and ownership across the full customer experience. You'll own customer-facing surfaces end to end, work closely with James SE, and help define what great design and craft look like at an AI-native company in the built world. WHAT YOU'LL DO - Design and build customer-facing surfaces end to end: website, marketing pages, demos, portals, workflow interfaces, dashboards and the details inside delivered work - Hold a single, high design standard across everything so Build looks, feels and works like one company - Turn complex AI capability into clear, credible interfaces that institutions can understand, evaluate and trust - Ship the most important surfaces personally: first-time user experience, core decision paths and flagship demos - Build microsites and pages strong enough to travel on their own merit - Partner with product and engineering to decide what gets built and in what order, based on user leverage and customer impact - Spend time with customers to understand how decisions get made, approved and defended in real projects - Treat the small details as part of the product: an export, an email, an empty state, a loading screen - Be uncompromising on quality. If it confuses customers or weakens trust, it does not ship EXAMPLE PROJECTS - Ideating and shipping a flagship page end to end: the homepage, a demo page or a microsite strong enough to travel on its own merit - Designing and building the first-time user experience: the surfaces that decide whether an institution understands and trusts the product - Turning a complex agentic workflow into a clear interface a customer can operate and defend internally - Raising the bar on delivered work: redesigning the reports, exports and emails customers actually see - Setting the design standard across product and brand so everything looks and feels like one company WHO WE'RE LOOKING FOR We're looking for someone who can both design and build, with strong frontend craft, real taste and an instinct for what excellent looks like. Someone who treats the smallest details (an empty state, an email, an export) as part of the product. You should be unreasonable about quality: not precious, not slow, but allergic to anything average, confusing or unfinished. You move fast, ship, and own the full customer experience rather than handing it off. YOU MIGHT BE A FIT IF - You can both design and build, with strong frontend craft and the taste to back it - You have a track record of shipping high-quality customer-facing surfaces, product or web - You're unreasonable about quality and allergic to anything average, confusing or unfinished - You move fast and ship; high standards do not make you slow - You own outcomes end to end and care about the details others skip - You're energised by ambiguity and want to set the design bar at an AI-native company - You care about AI, software and the future of the built world THIS PROBABLY ISN'T YOU IF - You can design but cannot build, or build but have no taste - You need tightly scoped specs and cannot operate across the full customer experience - You treat polish as optional or the small details as someone else's job BONUS POINTS - Experience designing for complex or technical products, especially AI or data-heavy interfaces - Experience building marketing sites or microsites that performed on their own merit - Experience as a founder, early designer or early engineer at a high-growth startup - An eye for brand, not just product UX WHAT WE OFFER - Radical autonomy, real ownership. High standards. Minimal bureaucracy. You own problems end-to-end, choose how the work gets done, and are accountable for exceptional outcomes. Ownership is matched with meaningful, generous equity. - An accelerated founder's track. Build is for builders. If you want to learn what it actually takes to create a generational company – product judgment, execution speed, and accountability – there is no faster path than building from zero when everything is for grabs. - Elite teammates, uncompromising bar. You work with people who think clearly, execute relentlessly, and take full ownership. The team you build becomes the company you build. Growth here is not just professional; it reshapes how you operate and in return how Build operates. - Perpetual adventure. We attract the strongest of the strange. Extraordinary experiences are part of the culture - from the food we eat together to the space we occupy. Intensity is intentional. - Shape the built world. We are rebuilding how the physical world gets made. Our software doesn't live in the abstract - it turns into real projects breaking ground because we exist. We work with the largest institutions, push the frontier of AI, and watch our decisions translate directly into the world around us.", "summaryDescription" : "Design Engineer at Build AI for the Built World. Skills: design and build, frontend craft, customer experience, quality, AI. Design and build customer-facing surfaces end to end, including website, marketing pages, demos, portals, workflow interfaces, and dashboards. Maintain a high design standard across all touchpoints to ensure a cohesive brand experience. Translate complex AI capabilities into clear and trustworthy interfaces for institutional clients. Ship critical user-facing elements such", "createdAt" : "2026-06-14T21:41:46.710", "lastUpdated" : "2026-06-15T10:11:02.843", "ingestTimestamp" : "2026-06-14T21:41:46.710", "mongoId" : "6a2ca13b74d8ee00a09a4ceb", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 120000, "salaryAnnualMax" : 240000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "frontend craft", "ownership, accountability", "design and build, frontend craft, customer experience, quality, AI", "AI, software, the future of the built world, institutional real estate, digital infrastructure, energy, industrial projects." ], "skillCount" : 4, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Mid", "dataQualityScore" : 0.8888889, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a305653f292fd229cf27d1e", "title" : "Process/Design Engineer", "company" : "Amazon UK Services Ltd.", "industry" : "Project/Program/Product Management--Non-Tech, Ops Engineering, Logistics", "salary" : { "min" : 75000.0, "max" : 110000.0, "currency" : "GBP", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior Process/Design Engineer in London, UK, adjusted for the logistics industry and large company size." }, "location" : "London, England, GBR", "locations" : [ "London, England, GBR" ], "timestamp" : "2026-06-16T06:51:23.225", "fingerprint" : "3589f7ea15d5ac4a18d76918c50fbeba488fe57a37e70bfb7870318390b424ba", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.jobs/jobs/10443777/apply", "externalId" : "42aa2a97-147e-4c6f-9c27-69b05eda1474", "industryFunction" : { }, "structuredLocations" : [ { "city" : "London", "country" : "United Kingdom", "continent" : "eu", "source" : "llm", "workMode" : "onsite", "geo" : "51.5074456,-0.1277653" } ], "locationText" : "London, United Kingdom", "employmentType" : "FULL_TIME", "remoteFriendly" : false, "workSiteFlexibility" : "onsite", "rawDescription" : "Amazon opened its virtual doors in 1995 and strives to be the world’s most customer-centric company, where customers can find and discover anything they might want to buy online. The goal of Amazon Logistics is to build a world class last mile operation. Amazon Logistics aims to exceed the expectations of our customers by ensuring that their orders, no matter how large or small, are delivered as quickly, accurately, and cost effectively as possible. The European Amazon Logistics team is seeking an experienced, innovative, hands on and customer obsessed Process Engineer to drive standardization, integrating the latest technologies in our Delivery Stations and proposing new innovation initiatives. As a member of the EU Amazon Logistics Engineering team you will be responsible for designing the new Delivery Stations, whilst also supporting process optimization and new technologies integration in the legacy sites, improving safety, customer experience, quality and cost. You will act as a key point of contact for your area of responsibility in the country you support; frequently partnering with local Operations teams as well as other operational support functions. This position requires deep customer focus, strong self-motivation and exceptional project management skills. It will involve regular communication with customers and project sponsors at both the European and country level, and requires you to be detail-oriented and comfortable partnering across functional business and technical teams. To be successful in this role, you need to pair strong analytical skills and a data-driven outlook with strong design and innovation operations intuition. This role will involve frequent domestic travel and you will report into the Manager of the Design Engineering team of the country that you will be supporting. This job is located in the UK with up to 25% of time traveling domestically. Key job responsibilities • Drive new site designs and legacy site upgrade designs from planning to execution, including automation integration. • Lead and drive technology integration and standardization in EU-wide programs and products, owning all layout integrations and optimizations in the assigned Delivery Stations. • Contribute to network standardization via best practice sharing with EU counterparts. • Provide process expertise on engineering design defining material flow, conveyor positioning, equipment requirements and real estate implications from process requirements • Lead strategic initiatives and identify project opportunities to improve the processes and stations designs, engaging and influencing their key stakeholders. A day in the life Successful candidate will lead end to end design for new delivery stations and work to improve existing delivery station processes. You will work with multiple internal and external stakeholders, some of the internal stakeholder include operations, design and construction, launch and expansion, and safety. You will produce best in class layouts for new launches, optimize the existing stations and present to leadership for approval. You will work on automation program to integrate new technologies into legacy stations. You will lead projects to create mechanisms to improve the stations and come up with innovative solutions to the complex design issues. About the team What do we do? Our team partners closely with AMZL Operations and support functions to identify, design and develop best-in-class process infrastructure and process layouts, and deliver them as EU AMZL network standards. Mentorship & Career Growth: We have a broad mix of experience levels and Amazon tenures, and we celebrate knowledge sharing and mentorship. We also care about your career growth, so we assign projects based on what will help each team member to continue the development. Basic Qualifications: - Bachelor's degree - Experience in planning, scheduling and auditing maintenance activities - Experience working with CMMS software - Experience in manufacturing, process, or industrial engineering - Knowledge of project management tools - Experience with Six Sigma, lean manufacturing Preferred Qualifications: - Knowledge of AutoCAD, VBA, and SQL at the intermediate level - Experience working with and managing third party vendors - MBA, or Master's degree in supply chain management, operations, engineering, analytics or related field - Experience with data analysis (including advanced Excel and database analysis) - Experience using one or more of the following CAD technologies: AutoCAD, Rhino, Revit, SolidWorks, CREO, BIM360, SketchUp or KeyShot Amazon is an equal opportunities employer. We believe passionately that employing a diverse workforce is central to our success. We make recruiting decisions based on your experience and skills. We value your passion to discover, invent, simplify and build. Protecting your privacy and the security of your data is a longstanding top priority for Amazon. Please consult our Privacy Notice ( https://www.amazon.jobs/en/privacy_page ) to know more about how we collect, use and transfer the personal data of our candidates. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "Process/Design Engineer at Amazon UK Services Ltd.", "postedDate" : "2026-06-15T22:00:55.304", "createdAt" : "2026-06-15T22:00:55.304", "lastUpdated" : "2026-06-16T06:51:23.225", "ingestTimestamp" : "2026-06-15T22:00:55.304", "mongoId" : "6a305653f292fd229cf27d1e", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.jobs/jobs/10443777/apply", "salaryBand" : "75k-100k", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "operations", "jobSubcategory" : "general", "seniorityLevel" : "Senior", "dataQualityScore" : 0.7777778, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Logistics", "llmIndustryConfidence" : 0.95 }, { "id" : "6a2ca39274d8ee00a09ac5e0", "title" : "Senior RF Design Engineer I/II", "company" : "Rocket Lab Corporation", "industry" : "Manufacturing", "salary" : { "min" : 135000.0, "max" : 195000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market data for Senior RF Design Engineer I/II in Long Beach, United States, adjusted for seniority and industry." }, "location" : "Long Beach, California, United States", "locations" : [ "Long Beach", "California", "United States" ], "timestamp" : "2026-06-15T10:44:06.381", "fingerprint" : "5ac9a5344a3b4875ae06e669461a42e89bd7639d696dcb21c69fd6b915e980d4", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/rocketlab/jobs/7768537003", "externalId" : "7768537003", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Long Beach", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "33.7690164,-118.1916040" } ], "locationText" : "Long Beach, California, United States", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "RF engineering, System design, Board design, Circuit design, RF communications, Navigation systems", "professionalSkills" : [ "Product Development", "System design", "Component selection", "PCB layout", "GSE development", "Automation support", "Product documentation", "Customer support", "Program support", "Engineering reviews", "Technical support", "Anomaly troubleshooting" ], "hardSkillsList" : [ "Cascaded device analysis", "Link budget analysis", "HFSS" ], "hardSkills" : [ { "name" : "Cascaded device analysis", "level" : "intermediate" }, { "name" : "Link budget analysis", "level" : "intermediate" }, { "name" : "HFSS", "level" : "intermediate" } ], "majorSkills" : "RF Design, Product Development, System Design", "majorSkillsList" : [ "RF Design", "Product Development", "System Design" ], "coreResponsibilities" : "Define requirements specifications, Maintain requirements specifications, Support development process, Align design decisions, Design RF product, Prototype RF product, Select components, Perform PCB layout, Fabricate PCB, Package PCB, Support test plans, Support test procedures, Support GSE development, Support automation development, Develop product documentation, Create ICDs, Create User Manuals, Liaise with Test Engineers, Liaise with Manufacturing Engineers, Drive New Product Introduction, Review proposals, Review requirements specifications, Assess compliance, Scope development activities, Drive development activities, Support engineering reviews, Provide technical support, Troubleshoot anomalies, Maintain awareness of schedules, Satisfy customer needs", "teamCollaboration" : "Radio development team", "domainKnowledge" : "RF communications; Space Systems; Launch services; Satellite components; Space missions; Launch vehicles; Spacecraft design; Payloads; Subsystems; Solar panels; Flight software; Star trackers; Optical systems; Separation systems; Radios; Interplanetary exploration; In-space manufacturing; National security; Defense initiatives; Space Development Agency; U. S. Space Force; High-performance spacecraft; Constellation deployment; Frontier-Lite Radio", "domainList" : [ "rf-communications", "space-systems", "launch-services", "satellite-components", "space-missions", "launch-vehicles", "spacecraft-design", "payloads", "subsystems", "solar-panels", "flight-software", "star-trackers", "optical-systems", "separation-systems", "radios", "interplanetary-exploration", "in-space-manufacturing", "national-security", "defense-initiatives", "space-development-agency", "u-s-space-force", "high-performance-spacecraft", "constellation-deployment", "frontier-lite-radio" ], "domainSpecificKnowledge" : [ "RF communications", "Space Systems", "Launch services", "Satellite components", "Space missions", "Launch vehicles", "Spacecraft design", "Payloads", "Subsystems", "Solar panels", "Flight software", "Star trackers", "Optical systems", "Separation systems", "Radios", "Interplanetary exploration", "In-space manufacturing", "National security", "Defense initiatives", "Space Development Agency", "U. S. Space Force", "High-performance spacecraft", "Constellation deployment", "Frontier-Lite Radio" ], "toolProficiency" : [ "HFSS" ], "documentationSkills" : "ICDs; User Manuals", "problemSolvingSkills" : "Anomaly troubleshooting", "specialRequirements" : "U. S. Citizenship, TS/SCI clearance", "qualificationsBasic" : "Bachelors degree in electrical engineering, 5+ years of relevant experience, Fundamental RF knowledge, Experience in developing RF product, Solid theoretical and practical understanding, U. S. Citizenship is required, Ability to obtain a TS/SCI clearance, Bachelors degree in electrical engineering, 8+ years of relevant experience", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "ABOUT ROCKET LAB Rocket Lab is an end-to-end space company delivering responsive launch services, complete spacecraft design and manufacturing, payloads, satellite components, and more – all with the goal of opening access to space. The rockets and satellites we build and launch enable some of the most ambitious and vital space missions globally, supporting scientific exploration, Earth observation and missions to combat climate change, national security, and exciting new technology demonstrations. Our Electron rocket has become the second most frequently launched U. S. rocket annually and has delivered more than 230 satellites to orbit, all while we work to develop Neutron, our upcoming medium-lift, reusable launch vehicle for larger constellation deployment. Our Space Systems business designs and builds our extensive line of satellites, payloads, and their components, including spacecraft that have been selected to support NASA missions to the Moon and Mars and components used on the James Webb Space Telescope. SPACE SYSTEMS At Rocket Lab, we’re not just launching rockets — we're building the future of space. Our Space Systems team builds everything from complete spacecraft, precision payloads to the components and subsystems that allow them to thrive in space, like solar panels, flight software, star trackers, optical systems, separation systems, radios, and more. Our Space Systems team has enabled more than 1,700 missions, ranging from interplanetary exploration, in-space manufacturing to national security and defense initiatives. The team has built spacecraft, payloads, and components for missions to the Moon and Mars, working with partners including NASA, the Space Development Agency, and the U. S. Space Force. Whether it’s a single high-performance spacecraft, constellation, or the vertically integrated components that help them get to space — our world class Space Systems team is empowering some of the boldest and most ambitious space missions. SENIOR RF DESIGN ENGINEER I/II We are currently seeking a Senior RF Design Engineer I/II based onsite at Rocket Lab's global headquarters in Long Beach, CA. The Senior RF Design Engineer will be responsible for supporting the development of new RF products including Rocket Lab’s radio product line alongside the radio development team. The Senior RF Design Engineer will design and simulate RF products including the Frontier-Lite Radio. The successful candidate will have a strong combination of RF engineering, system design, and board/circuit design skills and will thrive in a fast-paced, dynamic environment. WHAT YOU'LL GET TO DO: Product Development Define and maintain requirements specifications Support the development process, ensuring key design decisions and developments are in alignment with the required product capabilities Design and prototype the RF product including component selection and PCB layout / fabrication / packaging Support the development of test plans and procedures Support the design and development of GSE and production automation Support the development of product documentation including ICDs and User Manuals Liaise with Test Engineers and Manufacturing Engineers to drive New Product Introduction Customer/Program Support Review proposals and requirements specifications to assess compliance based on existing unit capabilities vs development needs Scope and drive development activities for new requirements Support engineering reviews such as PDRs, CDRs and TRRs Provide technical support to internal/external customers including general questions and anomaly troubleshooting Maintain broad awareness of product development and production schedules to ensure the needs of customers and programs are satisfied This position can be filled at a Senior RF Design Engineer I or a Senior RF Design Engineer II level. YOU'LL BRING THESE QUALIFICATIONS FOR A SENIOR RF DESIGN ENGINEER I: Bachelors degree in electrical engineering, RF communications (or other engineering degree) and 5+ years of relevant experience Fundamental RF knowledge including cascaded device analysis, link budget analysis, and HFSS Experience in developing and delivering a RF product including assessing requirements, prototyping engineering models, and producing space worthy products. A solid theoretical and practical understanding of RF communications and navigation systems and components U. S. Citizenship is required due to program requirements Ability to obtain a TS/SCI clearance YOU'LL BRING THESE QUALIFICATIONS FOR A SENIOR RF DESIGN ENGINEER II: Bachelors degree in electrical engineering, RF communications (or other engineering degree) and 8+ years of relevant experience Fundamental RF knowledge including cascaded device analysis, link budget analysis, and HFSS Experience in developing and delivering a RF product including assessing requirements, prototyping engineering models, and producing space worthy products. A solid theoretical and practical understanding of RF communications and navigation systems and components U. S. citizenship is required due to program requirements Ability to obtain a TS/SCI clearance THESE QUALIFICATIONS WOULD BE NICE TO HAVE: Extensive experience in space grade board design including parts selection and performance simulation Extensive experience in circuit analyses including worst case, reliability, FMECA, thermal, and derating analyses Extensive experience supporting and leading complex engineering programs and developing associated documentation Experience designing, integrating, and testing RF communications systems for launch vehicles or satellites Demonstrated expertise in people management. Experience leading incident management and investigations. Experience in conflict resolution and dealing with difficult people. The ability to work under pressure and to tight deadlines Effective communication skills and the ability to build strong working relationships Project management experience ADDITIONAL REQUIREMENTS: Specific vision abilities required by this job include close vision, distance vision, peripheral vision, depth perception, and the ability to focus. Regularly required to sit, use hands and fingers, operate computer keyboard and controls, and communicate verbally and in writing. Must be physically able to commute to buildings Occasional exposure to dust, fumes and moderate levels of noise. Willing to work extra hours and weekends as needed to meet critical business needs Level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience. Base salary is just one component of our total rewards package at Rocket Lab. Employees may also receive company equity and access to a robust benefits package including: top tier medical HMO, PPO & a 100% company-sponsored medical HSA plan option, dental and vision coverage, 3 weeks paid vacation and 5 days sick leave per year, 11 paid holidays per year, flexible spending and dependent care savings accounts, paid parental leave, disability insurance, life insurance, and access to a 401(k) retirement plan with company match. Other perks include: Discounted employee stock purchase program, subsidized EV charging stations, onsite gym, food and drinks, and other discounts. Eligibility for benefits may vary based on employment status, please check with your recruiter for a comprehensive list of the benefits available for this role. Benefit programs are subject to change at the company’s discretion. Base Pay Range (CA Only) $130,000—$190,000 USD WHAT TO EXPECT We’re on a mission to unlock the potential of space to improve life on Earth, but that’s not an easy task. It takes hard work, determination, relentless innovation, teamwork, grit, and an unwavering commitment to achieving what others often deem impossible. Our people out-think, out-work, and out-pace. We pride ourselves on having each other’s backs, checking our egos at the door, and rolling up our sleeves on all tasks big and small. We thrive under pressure, work to tight deadlines, and our focus is always on how we can deliver, rather than dwelling on the challenges that stand in the way. Important information: FOR CANDIDATES SEEKING TO WORK IN US OFFICES ONLY: To conform to U. S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR), Rocket Lab Employees must be a U. S. citizen, lawful U. S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U. S. as a refugee or granted asylum, or be eligible to obtain the required authorizations from the U. S. Department of State and/or the U. S. Department of Commerce, as applicable. Learn more about ITAR here. Rocket Lab provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race, color, religion, age, sex, national origin, disability status, genetics, protected veteran status, sexual orientation, gender identity or expression, or any other characteristic protected by federal, state, or local laws. This policy applies to all terms and conditions of employment at Rocket Lab, including recruiting, hiring, placement, promotion, termination, layoff, recall, transfer, leaves of absence, compensation, and training. Applicants requiring a reasonable accommodation for the application/interview process for a job in the United States should contact Giulia Johnson at g.biow@rocketlabusa.com.This dedicated resource is intended solely to assist job seekers with disabilities whose disability prevents them from being able to apply/interview. Only messages left for this purpose will be considered. A response to your request may take up to two business days. FOR CANDIDATES SEEKING TO WORK IN NEW ZEALAND OFFICES ONLY: For security reasons, background checks will be undertaken prior to any employment offers being made to an applicant. These checks will include nationality checks as it is a requirement of this position that you be eligible to access equipment and data regulated by the United States' International Traffic in Arms Regulations. Under these Regulations, you may be ineligible for this role if you do not hold citizenship of Australia, Japan, New Zealand, Switzerland, the European Union, or a country that is part of NATO, or if you hold ineligible dual citizenship or nationality. For more information on these Regulations, click here ITAR Regulations.", "summaryDescription" : "Senior RF Design Engineer I/II at Rocket Lab Corporation. Skills: RF Design, Product Development, System Design. Define requirements specifications. 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Working with assembly partners; Partnering with ASIC teams; Partnering with platform teams; Partnering with supercomputing teams", "projectManagementSkills" : [ "Roadmap planning" ], "domainKnowledge" : "Silicon photonics; Optical I/O; Co-packaged optics; Near-packaged optics; High-speed optical signaling; PIC design; Optical packaging; Advanced packaging; 2.5D packaging; 3D packaging; SerDes; DSP; PAM4; Coherent optics; Chiplet integration", "domainList" : [ "silicon-photonics", "optical-i-o", "co-packaged-optics", "near-packaged-optics", "high-speed-optical-signaling", "pic-design", "optical-packaging", "advanced-packaging", "2-5d-packaging", "3d-packaging", "serdes", "dsp", "pam4", "coherent-optics", "chiplet-integration" ], "domainSpecificKnowledge" : [ "Silicon photonics", "Optical I/O", "Co-packaged optics", "Near-packaged optics", "High-speed optical signaling", "PIC design", "Optical packaging", "Advanced packaging", "2.5D packaging", "3D packaging", "SerDes", "DSP", "PAM4", "Coherent optics", "Chiplet integration" ], "communicationSkills" : "Represent work externally", "problemSolvingSkills" : "Making architectural decisions; Trading off bandwidth; Trading off power; Trading off reach; Trading off cost; Trading off manufacturability", "qualificationsBasic" : "8+ years of experience in silicon photonics, 8+ years of experience in optical I/O, 8+ years of experience in co-packaged optics, 8+ years of experience in near-packaged optics, 8+ years of experience in high-speed optical signaling, Silicon photonics device and PIC design expertise, Optical packaging and assembly expertise, High-speed optical signaling and DSP expertise, Demonstrated experience shipping optical I/O product, Demonstrated experience bringing up optical I/O product, Experience shipping transceiver product, Experience bringing up transceiver product, Understanding of electrical-optical boundary", "qualificationsPreferred" : "Direct experience with NPO, Direct experience with CPO, Direct experience with optical chiplet integration, Background in silicon photonics organization, Background in optical transceiver organization, Background in optical I/O organization, Hands-on packaging and process integration experience, Experience with 2.5D/3D advanced packaging, Experience with CoWoS or equivalent", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "ABOUT ETCHED Etched is building the world’s first AI inference system purpose-built for transformers — delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. JOB SUMMARY Etched is building dedicated optical I/O expertise to support the next generation of our inference systems. We are hiring a Founding Optical I/O Engineer to be our first dedicated optics hire and to own optical interconnect from architecture through bring-up. This is a hands-on senior IC role with a clear path to growing a team behind you. The right candidate combines deep technical credibility in silicon photonics, optical packaging, or high-speed optical signaling with the judgment to drive a complex technology from concept to working silicon. KEY RESPONSIBILITIES • Define and own Etched’s optical I/O architecture from photonic engine design through system integration • Specify optical interconnect requirements (bandwidth density, reach, latency, power, packaging) derived from system-level constraints • Design and bring up the photonic integrated circuits, light sources, and optical packaging that make up Etched’s optical I/O, working with foundry and assembly partners as needed • Drive co-design between optical I/O and the rest of the chip and system: SerDes, package, substrate, and thermal • Own the engineering relationships with optical assembly partners • Recruit and grow the team that will execute against the roadmap • Partner closely with ASIC, platform, and supercomputing teams to ensure optical I/O integrates cleanly with system architecture • Represent Etched’s optical I/O work externally MUST-HAVE SKILLS AND EXPERIENCE • 8+ years of experience in silicon photonics, optical I/O, co-packaged or near-packaged optics, or high-speed optical signaling • Deep expertise in at least one of the following clusters: ◦ Silicon photonics device and PIC design (modulators, photodetectors, waveguides, packaging-aware design) ◦ Optical packaging and assembly (fiber attach, laser integration, thermal management, hermetic and non-hermetic approaches) ◦ High-speed optical signaling and DSP (PAM4, coherent, SerDes-to-optical integration, link budget analysis) • Demonstrated experience shipping or bringing up a real optical I/O or transceiver product, ideally at 100G/lane or higher • Strong understanding of the electrical-optical boundary: how SerDes, driver, TIA, and PIC interact at the system level • Comfortable making architectural decisions under uncertainty - trading off bandwidth, power, reach, cost, and manufacturability, and sequencing a roadmap accordingly NICE TO HAVE • Direct experience with NPO, CPO, or optical chiplet integration Background in one or more of: silicon photonics, optical transceiver, or optical I/O organization • Hands-on packaging and process integration experience with 2.5D/3D advanced packaging (CoWoS or equivalent) • Publication track record at OFC, ECOC, ISSCC, or Hot Chips BENEFITS • Medical, dental, and vision packages with generous premium coverage • $500 per month credit for waiving medical benefits • Housing subsidy of $2k per month for those living within walking distance of the office • Relocation support for those moving to San Jose (Santana Row) • Various wellness benefits covering fitness, mental health, and more • Daily lunch + dinner in our office • Unlimited compute budget subject to ROI justification HOW WE’RE DIFFERENT Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.", "summaryDescription" : "Founding Optical I/O Engineer at Etched. Skills: Silicon photonics, Optical I/O, Optical packaging, High-speed signaling. Define optical I/O architecture. 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experiences, Meet Amazon's quality and performance bar, Build customer oriented Solutions, Understand advertiser's brand objectives, Understand campaign KPIs, Translate objectives into front-end design, Translate objectives into interaction decisions, Propose creative alternatives, Optimize for performance, Use campaign performance data to inform design choices, Translate complex technical constraints into clear language, Make informed creative decisions, Implement rich page animations, Implement micro-interactions, Bring brand stories to life, Translate Figma designs into pixel-perfect code, Leverage AI-powered pair-coding tools, Accelerate development velocity, Rapidly ship pages at scale, Build and iterate on Custom Landing Pages (CLPs), Build Custom Coded Brand Stores, Build other BIL advertising formats, Collaborate with internal partners to ideate, Collaborate with internal partners to iterate, Collaborate with internal partners to deliver branded customer, Maintain shared component libraries, Contribute to shared component libraries, Maintain design-to-code workflows, Contribute to design-to-code workflows, Improve team velocity, Improve project consistency, Identify UX issues, Resolve UX issues, Identify front-end issues, Resolve front-end issues, Advocate for the customer in design reviews, Advocate for the customer in technical discussions, Document page builds, Document reusable components, Document implementation patterns, Scale team efficiently", "teamCollaboration" : "Collaborate with UX designers; Collaborate with Solutions Managers; Collaborate with engineers; Collaborate with product managers; Cross-functional teams; Internal partners", "projectManagementSkills" : [ "Agile" ], "domainKnowledge" : "Brand advertising; Digital advertising; Custom landing pages; Branded digital experiences; Web performance optimization; Accessibility standards; Advertising technology", "domainList" : [ "brand-advertising", "digital-advertising", "custom-landing-pages", "branded-digital-experiences", "web-performance-optimization", "accessibility-standards", "advertising-technology" ], "domainSpecificKnowledge" : [ "Brand advertising", "Digital advertising", "Custom landing pages", "Branded digital experiences", "Web performance optimization", "Accessibility standards", "Advertising technology" ], "toolProficiency" : [ "Figma", "GSAP", "Framer Motion", "Lottie", "Amazon Q Developer", "GitHub Copilot", "Cursor", "Webpack", "Vite", "npm", "yarn", "Webflow", "Styled Components", "Emotion", "Tailwind CSS" ], "communicationSkills" : "Technical documentation; Client communication", "documentationSkills" : "Document page builds; Document reusable components; Document implementation patterns", "innovationCreativity" : "Creative alternatives; Creative decisions", "problemSolvingSkills" : "Problem solving; Troubleshooting; Root cause analysis", "outcomesObjectives" : "Deliver measurable impact", "qualificationsBasic" : "Bachelor's degree in Computer Science, Design, HCI, or equivalent practical experience, 3+ years of hands-on experience building interactive, production-quality web pages using React. js, HTML5, CSS3, and JavaScript (ES6+), Demonstrable experience implementing page animations and transitions using GSAP, Framer Motion, or similar animation libraries, working knowledge of Figma, Experience with responsive web design, cross-browser compatibility, and mobile-first development, Familiarity with front-end build tools and workflows (Webpack, Vite, npm/yarn), developer and design portfolio showcasing shipped interactive web apps, landing pages, or branded digital experiences (link required with application), 1+ years of front-end technologist, engineer, or UX prototyper experience, 2+ years of web development for digital marketing, advertising, product management or equivalent experience, Knowledge of technologies such as JavaScript/NodeJS, HTML/CSS, Responsive/Adaptive Design, Have coding samples in front end programming languages, Have an available online portfolio", "qualificationsPreferred" : "Experience with Webflow for rapid page building, CMS-driven content, or client-facing prototypes, Familiarity with AI-assisted coding workflows (Amazon Q Developer, GitHub Copilot, Cursor, or similar) and a habit of using AI tools to accelerate development, Experience with CSS-in-JS solutions (Styled Components, Emotion) or utility-first CSS frameworks (Tailwind CSS), Exposure to advertising technology, custom landing page development, or branded digital experiences at scale, Experience building scroll-driven storytelling experiences — parallax, reveal animations, sticky sections, interactive carousels, Knowledge of web performance optimization — Lighthouse scores, lazy loading, code splitting, image optimization, Familiarity with accessibility standards (WCAG) and semantic HTML best practices, Exposure to A testing, analytics (CTR, RoAS, dwell time, scroll depth), or data-informed design iteration, Ability to help non-technical partners (Solutions Managers, brand teams) understand platform capabilities and constraints, Knowledge of API frameworks, Experience using AWS in production environments", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "We are looking for a Design Technologist I to join BIL India. You will design and build production-quality, interactive landing pages and custom brand store experiences that go live on Amazon.in for millions of customers. This is not a prototyping role — you will own the end-to-end development of polished, high-performance branded web experiences from Figma design handoff through to live deployment. You are equal parts developer and designer: you write clean, production-ready front-end code, craft fluid page animations, and obsess over every interaction detail. You collaborate with UX designers, Solutions Managers, engineers, and product managers to conceive, build, and ship bespoke advertising experiences for top brands on Amazon.in. Key job responsibilities Build and ship interactive landing pages and custom brand store experiences end-to-end — from Figma design specs to production-ready code deployed on Amazon properties Develop responsive, performant web experiences using React.js, HTML5, and CSS3 (including CSS animations, Flexbox, Grid) that meet Amazon's quality and performance bar Build customer oriented Solutions - Start every build by understanding the advertiser's brand objectives and campaign KPIs, translate those into concrete front-end design and interaction decisions while proactively proposing creative alternatives. Optimise for performance - Use campaign performance data (scroll depth, engagement heatmaps, CTR by module) to inform design choices on subsequent builds, and translate complex technical constraints into clear, actionable language for non-technical stakeholders so they can make informed creative decisions. Implement rich page animations and micro-interactions using frameworks such as GSAP, Framer Motion, Lottie, or equivalent — bringing brand stories to life through scroll-driven animations, parallax effects, and interactive transitions Translate Figma designs into pixel-perfect code with a deep understanding of design systems, component libraries, spacing, typography tokens, and responsive breakpoints Leverage AI-powered pair-coding tools (e.g., Amazon Q Developer, GitHub Copilot, Cursor) to accelerate development velocity and rapidly ship pages at scale Build and iterate on Custom Landing Pages (CLPs), Custom Coded Brand Stores, and other BIL advertising formats for India's top advertisers Collaborate with internal partners — UX designers, Solutions Managers, engineers, and product managers — to ideate, iterate, and deliver best-in-class branded customer experiences Maintain and contribute to shared component libraries and design-to-code workflows that improve team velocity and consistency across projects Identify and resolve UX and front-end issues proactively; advocate for the customer in design reviews and technical discussions Document page builds, reusable components, and implementation patterns so the team can scale efficiently Basic Qualifications Bachelor's degree in Computer Science, Design, HCI, or equivalent practical experience 3+ years of hands-on experience building interactive, production-quality web pages using React.js, HTML5, CSS3, and JavaScript (ES6+) Demonstrable experience implementing page animations and transitions using GSAP, Framer Motion, or similar animation libraries Strong working knowledge of Figma — ability to inspect designs, extract tokens, and faithfully translate design systems into front-end code Experience with responsive web design, cross-browser compatibility, and mobile-first development Familiarity with front-end build tools and workflows (Webpack, Vite, npm/yarn) Strong developer and design portfolio showcasing shipped interactive web apps, landing pages, or branded digital experiences (link required with application) Preferred Qualifications Experience with Webflow for rapid page building, CMS-driven content, or client-facing prototypes Familiarity with AI-assisted coding workflows (Amazon Q Developer, GitHub Copilot, Cursor, or similar) and a habit of using AI tools to accelerate development Experience with CSS-in-JS solutions (Styled Components, Emotion) or utility-first CSS frameworks (Tailwind CSS) Exposure to advertising technology, custom landing page development, or branded digital experiences at scale Experience building scroll-driven storytelling experiences — parallax, reveal animations, sticky sections, interactive carousels Knowledge of web performance optimization — Lighthouse scores, lazy loading, code splitting, image optimization Familiarity with accessibility standards (WCAG) and semantic HTML best practices Exposure to A/B testing, analytics (CTR, RoAS, dwell time, scroll depth), or data-informed design iteration Ability to help non-technical partners (Solutions Managers, brand teams) understand platform capabilities and constraints What a Great Candidate Looks Like You ship — your portfolio is full of live pages, not just mockups You blur the line between designer and developer — you care about easing curves as much as code architecture You reach for GSAP or Framer Motion instinctively when a design calls for motion You use AI coding tools daily and see them as a multiplier, not a crutch About the team About BIL India Brand Innovation Lab (BIL) is Amazon Advertising's bespoke creative studio for brands investing in Amazon Ads. BIL India designs and builds custom advertising experiences — Custom Landing Pages (CLPs), Custom Coded Brand Stores, Digital Out-of-Home (DOOH), Video, and emerging formats — that deliver measurable impact across the customer journey on Amazon.in. Basic Qualifications: - 1+ years of front-end technologist, engineer, or UX prototyper experience - 2+ years of web development for digital marketing, advertising, product management or equivalent experience - Knowledge of technologies such as JavaScript/NodeJS, HTML/CSS, Responsive/Adaptive Design - Have coding samples in front end programming languages - Have an available online portfolio - Experience in testing and QA environments Preferred Qualifications: - Knowledge of API frameworks - Experience using AWS in production environments Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "Design Technologist I at ASSPL. Skills: Front-end development, Web animation, Interactive experiences. Build and ship interactive landing pages. Build custom brand store experiences end-to-end", "postedDate" : "2026-06-13T07:12:55.092", "createdAt" : "2026-06-13T07:12:55.092", "lastUpdated" : "2026-06-15T03:44:34.605", "ingestTimestamp" : "2026-06-13T07:12:55.092", "mongoId" : "6a2a660974d8ee00a062ba10", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.jobs/jobs/10443288/apply", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Front-end development", "Web animation", "Responsive design", "Cross-browser compatibility", "Mobile-first development", "Build tools", "Workflow automation", "Page performance", "Code splitting", "Image optimization", "Accessibility standards", "Semantic HTML", "A/B testing", "Data analysis", "Critical thinking", "Interactive experiences", "Design systems", "Component libraries", "UX design", "Brand objectives", "Campaign KPIs", "Front-end design", "Interaction decisions", "Creative alternatives", "Campaign performance data", "Technical constraints", "Actionable language", "Creative decisions", "Brand stories", "Scroll-driven animations", "Parallax effects", "Interactive transitions", "Pixel-perfect code", "Typography tokens", "Responsive breakpoints", "Development velocity", "Design-to-code workflows", "Team velocity", "Project consistency", "UX issues", "Front-end issues", "Design reviews", "Technical discussions", "Page builds", "Reusable components", "Implementation patterns", "Team scaling", "Digital marketing", "Advertising technology", "Product management", "Web development", "Performance optimization", "A testing", "Data-informed design", "Platform capabilities", "Agile", "Brand advertising", "Digital advertising", "Custom landing pages", "Branded digital experiences", "Web performance optimization", "Figma", "GSAP", "Framer Motion", "Lottie", "Amazon Q Developer", "GitHub Copilot", "Cursor", "Webpack", "Vite", "npm", "yarn", "Webflow", "Styled Components", "Emotion", "Tailwind CSS" ], "skillCount" : 76, "jobCategory" : "design", "dataQualityScore" : 0.8888889, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true }, { "id" : "6a2a4ffb74d8ee00a05f1907", "title" : "Founding Optical I/O Engineer", "company" : "Etched", "industry" : "Architecture", "salary" : { "min" : 200000.0, "max" : 300000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior Founding Optical I/O Engineer in San Jose, United States, adjusted for industry and company size." }, "location" : "San Jose", "locations" : [ "San Jose" ], "timestamp" : "2026-06-13T19:24:04.064", "fingerprint" : "0dd893165e5274d410e4d1b143342d9678a3e0c97154445b3d4738b13ad6ae2b", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/etched/2eff3af0-ef7d-4dea-9e56-02227fb75edf/application", "externalId" : "2eff3af0-ef7d-4dea-9e56-02227fb75edf", "industryFunction" : { }, "structuredLocations" : [ { "city" : "San Jose", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.3361663,-121.8905910" } ], "locationText" : "San Jose, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 8, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Silicon photonics, Optical I/O, Co-packaged optics, Near-packaged optics, High-speed optical signaling, PIC design, Fiber attach, Laser integration, Thermal management, PAM4, Coherent, SerDes, Link budget analysis, ASIC", "professionalSkills" : [ "Optical interconnect requirements", "System integration", "Foundry engagement", "Assembly partner engagement", "Roadmap sequencing", "Architectural decisions" ], "hardSkillsList" : [ "Photonic engine design", "PIC design", "Light source design", "Optical packaging design", "Assembly design", "SerDes integration", "Package integration", "Substrate integration", "Thermal management", "Link budget analysis", "DSP" ], "hardSkills" : [ { "name" : "Photonic engine design", "level" : "intermediate" }, { "name" : "PIC design", "level" : "intermediate" }, { "name" : "Light source design", "level" : "intermediate" }, { "name" : "Optical packaging design", "level" : "intermediate" }, { "name" : "Assembly design", "level" : "intermediate" }, { "name" : "SerDes integration", "level" : "intermediate" }, { "name" : "Package integration", "level" : "intermediate" }, { "name" : "Substrate integration", "level" : "intermediate" }, { "name" : "Thermal management", "level" : "intermediate" }, { "name" : "Link budget analysis", "level" : "intermediate" }, { "name" : "DSP", "level" : "intermediate" } ], "majorSkills" : "Silicon photonics, Optical I/O, Optical packaging, High-speed signaling", "majorSkillsList" : [ "Silicon photonics", "Optical I/O", "Optical packaging", "High-speed signaling" ], "coreResponsibilities" : "Define optical I/O architecture, Own optical I/O architecture, Specify optical interconnect requirements, Design photonic integrated circuits, Design light sources, Design optical packaging, Drive co-design, Own engineering relationships, Recruit team, Grow team, Partner with ASIC teams, Partner with platform teams, Partner with supercomputing teams, Ensure optical I/O integrates cleanly", "teamCollaboration" : "ASIC teams; Platform teams; Supercomputing teams", "projectManagementSkills" : [ "Roadmap planning" ], "domainKnowledge" : "Transformers; AI inference systems; Silicon photonics; Optical packaging; High-speed optical signaling; Co-packaged optics; Near-packaged optics; SerDes; DSP; PAM4; Coherent optics; 2.5D/3D advanced packaging", "domainList" : [ "transformers", "ai-inference-systems", "silicon-photonics", "optical-packaging", "high-speed-optical-signaling", "co-packaged-optics", "near-packaged-optics", "serdes", "dsp", "pam4", "coherent-optics", "2-5d-3d-advanced-packaging" ], "domainSpecificKnowledge" : [ "Transformers", "AI inference systems", "Silicon photonics", "Optical packaging", "High-speed optical signaling", "Co-packaged optics", "Near-packaged optics", "SerDes", "DSP", "PAM4", "Coherent optics", "2.5D/3D advanced packaging" ], "communicationSkills" : "Represent work externally", "problemSolvingSkills" : "Troubleshooting", "qualificationsBasic" : "8+ years of experience in silicon photonics, 8+ years of experience in optical I/O, 8+ years of experience in co-packaged optics, 8+ years of experience in near-packaged optics, 8+ years of experience in high-speed optical signaling, Silicon photonics device and PIC design expertise, Optical packaging and assembly expertise, High-speed optical signaling and DSP expertise, Demonstrated experience shipping optical I/O product, Demonstrated experience bringing up optical I/O product, Experience shipping transceiver product, Experience bringing up transceiver product, Understanding of electrical-optical boundary", "qualificationsPreferred" : "Direct experience with NPO, Direct experience with CPO, Direct experience with optical chiplet integration, Background in silicon photonics organization, Background in optical transceiver organization, Background in optical I/O organization, Hands-on packaging and process integration experience, Experience with 2.5D/3D advanced packaging, Experience with CoWoS or equivalent", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "ABOUT ETCHED Etched is building the world’s first AI inference system purpose-built for transformers — delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history. JOB SUMMARY Etched is building dedicated optical I/O expertise to support the next generation of our inference systems. We are hiring a Founding Optical I/O Engineer to be our first dedicated optics hire and to own optical interconnect from architecture through bring-up. This is a hands-on senior IC role with a clear path to growing a team behind you. The right candidate combines deep technical credibility in silicon photonics, optical packaging, or high-speed optical signaling with the judgment to drive a complex technology from concept to working silicon. KEY RESPONSIBILITIES • Define and own Etched’s optical I/O architecture from photonic engine design through system integration • Specify optical interconnect requirements (bandwidth density, reach, latency, power, packaging) derived from system-level constraints • Design and bring up the photonic integrated circuits, light sources, and optical packaging that make up Etched’s optical I/O, working with foundry and assembly partners as needed • Drive co-design between optical I/O and the rest of the chip and system: SerDes, package, substrate, and thermal • Own the engineering relationships with optical assembly partners • Recruit and grow the team that will execute against the roadmap • Partner closely with ASIC, platform, and supercomputing teams to ensure optical I/O integrates cleanly with system architecture • Represent Etched’s optical I/O work externally MUST-HAVE SKILLS AND EXPERIENCE • 8+ years of experience in silicon photonics, optical I/O, co-packaged or near-packaged optics, or high-speed optical signaling • Deep expertise in at least one of the following clusters: ◦ Silicon photonics device and PIC design (modulators, photodetectors, waveguides, packaging-aware design) ◦ Optical packaging and assembly (fiber attach, laser integration, thermal management, hermetic and non-hermetic approaches) ◦ High-speed optical signaling and DSP (PAM4, coherent, SerDes-to-optical integration, link budget analysis) • Demonstrated experience shipping or bringing up a real optical I/O or transceiver product, ideally at 100G/lane or higher • Strong understanding of the electrical-optical boundary: how SerDes, driver, TIA, and PIC interact at the system level • Comfortable making architectural decisions under uncertainty - trading off bandwidth, power, reach, cost, and manufacturability, and sequencing a roadmap accordingly NICE TO HAVE • Direct experience with NPO, CPO, or optical chiplet integration Background in one or more of: silicon photonics, optical transceiver, or optical I/O organization • Hands-on packaging and process integration experience with 2.5D/3D advanced packaging (CoWoS or equivalent) • Publication track record at OFC, ECOC, ISSCC, or Hot Chips BENEFITS • Medical, dental, and vision packages with generous premium coverage • $500 per month credit for waiving medical benefits • Housing subsidy of $2k per month for those living within walking distance of the office • Relocation support for those moving to San Jose (Santana Row) • Various wellness benefits covering fitness, mental health, and more • Daily lunch + dinner in our office • Unlimited compute budget subject to ROI justification HOW WE’RE DIFFERENT Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs. We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.", "summaryDescription" : "Founding Optical I/O Engineer at Etched. Skills: Silicon photonics, Optical I/O, Optical packaging, High-speed signaling. Define optical I/O architecture. Own optical I/O architecture", "postedDate" : "2026-06-11T17:13:49.767", "createdAt" : "2026-06-11T17:13:49.767", "lastUpdated" : "2026-06-13T19:24:04.064", "ingestTimestamp" : "2026-06-11T17:13:49.767", "mongoId" : "6a2a4ffb74d8ee00a05f1907", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 200000, "salaryAnnualMax" : 300000, "salaryBand" : "200k+", "hasSalary" : true, "allSkills" : [ "Photonic engine design", "PIC design", "Light source design", "Optical packaging design", "Assembly design", "SerDes integration", "Package integration", "Substrate integration", "Thermal management", "Link budget analysis", "DSP", "Silicon photonics", "Optical I/O", "Optical packaging", "High-speed signaling", "Optical interconnect requirements", "System integration", "Foundry engagement", "Assembly partner engagement", "Roadmap sequencing", "Architectural decisions", "Roadmap planning", "Transformers", "AI inference systems", "High-speed optical signaling", "Co-packaged optics", "Near-packaged optics", "SerDes", "PAM4", "Coherent optics", "2.5D/3D advanced packaging" ], "skillCount" : 31, "jobCategory" : "other", "jobSubcategory" : "architecture", "dataQualityScore" : 1.0, "daysOld" : 2, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology" }, { "id" : "69fd35614c40e2acd1b31f12", "title" : "Mixed Abilities-Elem - Mixed Abilities (2026-2027 School Year)", "industry" : "Education", "salary" : { "min" : 55000.0, "max" : 85000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-seniority Elementary School Teacher in Samuel E Spaght Science and Communications Magnet Elementary School, United States, with adjustments for industry and location." }, "location" : "Samuel E Spaght Science and Communications Magnet Elementary School", "locations" : [ "Samuel E Spaght Science and Communications Magnet Elementary School", "2316 E. 10th", "67214" ], "certifications" : [ "Licensed in Kansas to teach", "Functional Special Education/Low Incidence Level - K-6 level", "Valid Kansas Driver's License" ], "timestamp" : "2026-06-16T04:15:35.008", "fingerprint" : "30537e5a1cffe590f2fe9db0728b90ab8a51ea07d3cc162284cca1a852d79161", "source" : "taleo", "language" : "en", "applyUrl" : "https://aa308.taleo.net/careersection/ex/jobdetail.ftl?job=97694", "externalId" : "97694", "industryFunction" : { }, "structuredLocations" : [ { "country" : "United States", "continent" : "na", "workMode" : "onsite" } ], "locationText" : "United States", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor's", "professionalSkills" : [ "Student evaluation", "Curriculum instruction", "Behavioral strategies", "Data collection", "Progress reporting" ], "hardSkillsList" : [ "IEP development", "Differentiated instruction", "Behavior management", "Classroom structure", "Record keeping" ], "hardSkills" : [ { "name" : "IEP development", "level" : "intermediate" }, { "name" : "Differentiated instruction", "level" : "intermediate" }, { "name" : "Behavior management", "level" : "intermediate" }, { "name" : "Classroom structure", "level" : "intermediate" }, { "name" : "Record keeping", "level" : "intermediate" } ], "majorSkills" : "Student instruction, IEP development, Behavior management", "majorSkillsList" : [ "Student instruction", "IEP development", "Behavior management" ], "coreResponsibilities" : "Plan instruction for student learning, Follow student Individual Education Program (IEP), Provide curriculum-based instruction, Participate on pre-assessment teams, Initiate, schedule, and attend IEP meetings, Diagnose student needs with multi-disciplinary team, Structure and implement IEP for each student, Define, structure, and communicate daily expectations, Communicate with parents and staff, Report student data, Negotiate schedules, Provide differentiated instruction, Control classroom behavior, Adapt course content, Discern learning styles, Assist students in achieving objectives, Present learning opportunities, Prepare and display events, Evaluate according to state standards and IEPs, Plan assessments, Design subject-based reinforcement, Design a grading system, Collect and enter student data, Provide a positive role model, Develop, teach, and review classroom structure, Design classroom rules for student interaction, Design systems for handling behavior, Prepare physical condition of classroom, Maintain a clean and organized classroom, Keep daily records on student attendance, Supervise paraprofessionals, Manage job duties with mobility and agility, Participate in teacher committee work, Attend teacher daily lunch activities, Prepare and escort students to special classes, Supervise bus loading and unloading, Attend programs and events", "teamCollaboration" : "Multi-disciplinary team; Regular education staff; Special education staff; Other stakeholders; Teacher committee work", "domainKnowledge" : "Special Education; Individual Education Program (IEP); Least restrictive environment; State standards", "domainList" : [ "special-education", "individual-education-program-iep", "least-restrictive-environment", "state-standards" ], "domainSpecificKnowledge" : [ "Special Education", "Individual Education Program (IEP)", "Least restrictive environment", "State standards" ], "toolProficiency" : [ "SMART boards", "IPads", "Computers", "Copiers", "Scanners", "Fax machine" ], "communicationSkills" : "Communicate with parents; Communicate with staff; Communicate with students; Communicate with administration", "documentationSkills" : "Keep daily records; Report student data", "problemSolvingSkills" : "Diagnose student needs; Adapt course content; Handle behavior situations", "specialRequirements" : "Lift students, Dress students, Position students, Work outdoors, Mobility, Agility, Dexterity, Focused observation, Supervise bus loading/unloading", "outcomesObjectives" : "Ensure appropriate curriculum-based instruction; Achieve academic objectives; Achieve daily living objectives; Achieve social skills objectives", "qualificationsBasic" : "Bachelor of Arts or Science in Education, Special Education emphasis, Licensed in Kansas to teach, Functional Special Education/Low Incidence Level - K-6 level, Valid Kansas Driver's License", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Job Title: Mixed Abilities-Elementary Position Function: The person filling this position plans, leads, facilitates, and provides instruction for maximum student learning in his/her least restrictive learning environment. This position follows each student's standards-based Individual Education Program (IEP) to ensure appropriate curriculum-based instruction. Essential Performance Responsibilities: Plans according to state standards and student IEPS Participates, as appropriate, on pre-assessment teams to determine necessity for comprehensive student evaluation, initiates, schedules, and attends IEP meetings; works with multi-disciplinary team to diagnose need; structures/implements IEP for each student identified Defines, structures, and communicates daily expectations according to state standards and IEP including but not limited to, course goals, objectives, learning methods, and activities Communicates with parents, regular education staff members, special education staff members, and other appropriate stakeholders on course instructional strategies and objectives, students' grasp of material, outcomes and perspectives for applications of materials learned Receives and reports student progress; in-puts student data via computer; negotiates schedules and communicates with all pertinent participants (administration, parents, staff, students, etc.) Provides differentiated instruction based on the student's individual level of functioning and preferred/necessary learning modalities Controls classroom and teaches individual behavior through classroom structure, routine, communication opportunities, and individualized behavior methods; adapts and adjusts course content and reading levels to specify skills to be taught; discerns learning styles and means of building memory and study skills; assists individual students in achieving academic, daily living, and social skills learning objectives by working with them individually and in small groups Presents various learning opportunities appropriate to each student's IEP including, but not limited to, classroom structure, multi-media, assistive technology, alternative communication opportunities, support of regular classroom teachers, and other presentations and/or opportunities inside or outside Prepares and displays events and reinforcement activities which encourage participation Evaluates according to state standards and student IEPs Plans assessments for evaluation to include, but not limited to, various diagnostic techniques; standardized survey and criterion-referenced test; teacher-developed oral and written tests; student personal indices (effort, potential, interests, memory) Designs subject-based reinforcement to follow assessments and student's learning objectives (computer lab activities, working independently or on group projects, field/community reinforcement) Designs a grading system which encourages motivation and participation; collects and enters student data in computer from charts and observations; reports progress on a regular basis as required Provides a positive role model of appropriate and respectful interactions with students and staff Develops, teaches, and reviews clear and concise classroom structure, rules, routines, procedures, and expectations individualized to student need. Designs classroom rules for student interaction (courtesy and respect for belongings, space, and ideas), self-control, working independently, and appropriately gaining the floor; designs systems for handling all the behavior (from simple infractions to severe behavior) Prepares physical condition of classroom to reflect subject matter to facilitate student learning and maintains a clean and organized classroom Keeps daily records on, but not limited to, student attendance, learning and social needs, assignments, assessments and discipline; supervises paraprofessionals. Manages all job duties with the mobility, agility, dexterity, and focused observation necessary to adequately perform the essential duties as described above Participates in teacher committee work and attends teacher meetings; daily lunch activities as assigned; prepares and/or escorts students to travel to special classes as required; supervises bus loading and unloading as required; attends programs and events related to school Additional Duties: Additional duties as assigned by supervisor Equipment: This position requires the ability to use SMART boards and iPads in addition to basic office equipment such as computers, copiers, scanners, and fax machine Travel: Limited travel may be required Physical and Mental Demands: Good physical health and ability to implement behavioral strategies as well as to lift, dress, and position students as needed for self-care and safety Works in standard office and school building environments Ability to work outdoors during outdoor student activities Additional demands upon request of Principal, Superintendent Must be able to respond rapidly in emergency situations Knowledge, Skills, and Abilities: Ability to communicate both verbally and written in order to communicate with others inside and outside of the organization for the purpose of giving and obtaining information Ability to communicate effectively with a Supervisor when their discretion is needed Ability to perform as an effective team player Ability to plan, organize, make decisions and prioritize work to meet the daily demands of the building Exhibit a professional manner and a positive attitude Use good judgment to make decisions on recurring assignments Display a significant degree of professionalism and confidentiality Ability to conform to proper standards of professional dress and appearance Knowledge of company's mission, purpose, goals and the role of every employee in achieving each of them Interrelations: Contact with personnel within the district and with customers and vendors Will be working under the direct supervision of the department supervisor in order to complete day to day tasks Will be working with a diverse population requiring the ability to handle all situations with tact and diplomacy Must understand and respond appropriately to customer needs and maintain a positive attitude with all customers and colleagues Expected to interact with all internal and external customers in a friendly, professional manner and provide quick, responsive customer service Employee Punctuality and Appearance: In order for schools to operate effectively, employees are expected to perform all assigned duties and work all scheduled hours during each designated workday, unless the employee has received approved leave Any deviation from assigned hours must have prior approval from the employee's supervisor or building administrator All employees are required to report to work dressed in a manner that reflects a positive image of USD 259 and is appropriate for their position Qualification Profile: Bachelor of Arts or Science in Education with an emphasis on Special Education Licensed in the State of Kansas to teach at the Functional Special Education/Low Incidence Level - K-6 level required Valid Kansas Driver's License required FLSA Status: Exempt", "summaryDescription" : "Mixed Abilities-Elem - Mixed Abilities (2026-2027 School Year). Skills: Student instruction, IEP development, Behavior management. Plan instruction for student learning. Follow student Individual Education Program (IEP)", "createdAt" : "2026-06-14T18:51:26.006", "lastUpdated" : "2026-06-16T04:15:35.008", "ingestTimestamp" : "2026-06-14T18:51:26.006", "mongoId" : "69fd35614c40e2acd1b31f12", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 55000, "salaryAnnualMax" : 85000, "salaryBand" : "50k-75k", "hasSalary" : true, "allSkills" : [ "IEP development", "Differentiated instruction", "Behavior management", "Classroom structure", "Record keeping", "Student instruction", "Student evaluation", "Curriculum instruction", "Behavioral strategies", "Data collection", "Progress reporting", "Special Education", "Individual Education Program (IEP)", "Least restrictive environment", "State standards", "Licensed in Kansas to teach", "Functional Special Education/Low Incidence Level - K-6 level", "Valid Kansas Driver's License", "SMART boards", "IPads", "Computers", "Copiers", "Scanners", "Fax machine" ], "skillCount" : 24, "jobCategory" : "education", "jobSubcategory" : "support", "seniorityLevel" : "Mid", "dataQualityScore" : 0.6666667, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Education", "llmIndustryConfidence" : 0.98 }, { "id" : "6a2c9ffa74d8ee00a09a0fca", "title" : "Design Engineer", "company" : "Eagle", "industry" : "Engineering", "salary" : { "min" : 150000.0, "max" : 300000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "New York City", "locations" : [ "New York City" ], "timestamp" : "2026-06-16T04:07:36.690", "fingerprint" : "d7d19068bff58c7cb7c16fa773295ab89a837b7682ef93665c3b0d9a79bbc5f0", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/eagle/b5dd7b60-24d5-4053-a753-463cf7140822/application", "externalId" : "b5dd7b60-24d5-4053-a753-463cf7140822", "industryFunction" : { }, "structuredLocations" : [ { "city" : "New York", "state" : "New York", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "40.7127281,-74.0060152" } ], "locationText" : "New York, New York, United States", "employmentType" : "FULL_TIME", "technicalSkills" : "React, TypeScript", "professionalSkills" : [ "Interaction design", "Visual design", "Design systems" ], "hardSkillsList" : [ "UX design", "Interface design", "AI product design" ], "hardSkills" : [ { "name" : "UX design", "level" : "intermediate" }, { "name" : "Interface design", "level" : "intermediate" }, { "name" : "AI product design", "level" : "intermediate" } ], "majorSkills" : "UX design, Interface design, Design systems, AI product design", "majorSkillsList" : [ "UX design", "Interface design", "Design systems", "AI product design" ], "coreResponsibilities" : "Embed with staff at engineering firms, Design and build against what you saw, Own the product surface end-to-end, Design interaction design, Prototype, Ship the production front-end yourself, Establish and own our design system, Define the interaction patterns for an AI-native platform, Collaborate directly with the CTO on product direction, Collaborate on culture, Collaborate on what we'll build next", "teamCollaboration" : "Cross-functional teams; Work with CTO", "domainKnowledge" : "AI-native platform; Agentic systems; Human-in-the-loop review; Provenance and citations; Machine output trust", "domainList" : [ "ai-native-platform", "agentic-systems", "human-in-the-loop-review", "provenance-and-citations", "machine-output-trust" ], "domainSpecificKnowledge" : [ "AI-native platform", "Agentic systems", "Human-in-the-loop review", "Provenance and citations", "Machine output trust" ], "communicationSkills" : "Earn trust with people", "innovationCreativity" : "Design systems; AI-native platform", "problemSolvingSkills" : "Distill feedback into opinion", "specialRequirements" : "Willing to travel", "qualificationsBasic" : "Design taste and engineering chops to ship it yourself in production (React/TypeScript or equivalent), Built and maintained a design system that more than one product or team depended on, Real reps designing UX for AI-native products, Comfortable with problems that don't exist in traditional software: non-determinism, streaming output, uncertainty, agentic flows, and earning user trust in machine output, Deep curiosity for how things work, Isn't afraid to expose their ignorance and is constantly asking why, Poise and communication skills to earn trust with people who've never worked with a tech company before, Can sit with noisy, conflicting feedback from users and distill it into a clear opinion about what to build, Willing to get on a plane", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "About Eagle We’re on a mission to radically transform the way we design and construct our built environment. Backed by Lightspeed Venture Partners, Eagle acquires and transforms civil, structural, and MEP engineering firms with applied AI. We’re an AI laboratory dedicated to providing engineers with the tools they need to solve the world’s hardest infrastructure, energy, and climate problems. By arming designers with frontier technology, our ambition is to build the most valuable, talent-dense engineering firm in the United States. The opportunity Our core thesis: 85% of what engineers do today is theoretically automatable, yet less than 5% has actually been touched by AI. That gap is the largest of any profession. Our plan is to close it by acquiring engineering firms, building purpose-built tools for their staff, and compounding that proprietary intelligence across acquisitions. As a Design Engineer, you'll work directly with the CTO to own how that intelligence becomes something engineers actually trust and use. The hard part isn't only modeling the data—it's making non-deterministic, agentic systems legible to people who have never worked with a software company before. You own the surface where that trust is won or lost. You get a front-row seat to building a company from zero—engaging with product strategy, firm acquisitions, and architecture decisions—on a problem domain that's barely been touched by AI. What you'll do - Embed with staff at engineering firms alongside the founders; watch how they actually work, then come back and design and build against what you saw - Own the product surface end-to-end—from interaction design and prototyping through shipping the production front-end yourself - Establish and own our design system: the components, patterns, and primitives that have to stay coherent as we compound products across acquisitions - Define the interaction patterns for an AI-native platform—streaming and latency, human-in-the-loop review, provenance and citations, and making agent behavior transparent enough to trust - Collaborate directly with the CTO on product direction, culture, and what we'll build next What we look for - Strong design taste and the engineering chops to ship it yourself in production (React/TypeScript or equivalent)—you don't hand off to someone else to build - Has built and maintained a design system that more than one product or team depended on - Has real reps designing UX for AI-native products and is comfortable with the problems that don't exist in traditional software: non-determinism, streaming output, uncertainty, agentic flows, and earning user trust in machine output - Has a deep curiosity for how things work (an organization, a workflow, a market) - Isn't afraid to expose their ignorance and is constantly asking why - Has the poise and communication skills to earn trust with people who've never worked with a tech company before - Can sit with noisy, conflicting feedback from users and distill it into a clear opinion about what to build - Is willing to get on a plane with us - Is not above any task: up to draw the icon set, write the component, sit beside a user and watch them click, or wire up an off-the-shelf tool to test an idea fast Compensation - Competitive cash compensation ($150K–$300K depending on experience) - Founding equity, scaled to scope - Full healthcare benefits - In-person office in NYC", "summaryDescription" : "Design Engineer at Eagle. Skills: UX design, Interface design, Design systems, AI product design. Embed with staff at engineering firms. Design and build against what you saw", "createdAt" : "2026-06-14T20:12:10.520", "lastUpdated" : "2026-06-16T04:07:36.690", "ingestTimestamp" : "2026-06-14T20:12:10.520", "mongoId" : "6a2c9ffa74d8ee00a09a0fca", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 150000, "salaryAnnualMax" : 300000, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "UX design", "Interface design", "AI product design", "Design systems", "Interaction design", "Visual design", "AI-native platform", "Agentic systems", "Human-in-the-loop review", "Provenance and citations", "Machine output trust" ], "skillCount" : 11, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Senior", "dataQualityScore" : 0.7777778, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6949b14570f0b99d588271bd", "title" : "Mixed Abilities Teacher", "company" : "Allison Traditional Magnet Middle School", "industry" : "Education", "salary" : { "min" : 55000.0, "max" : 85000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level Mixed Abilities Teacher in Allison Traditional Magnet Middle School, United States, adjusted for industry and seniority." }, "location" : "Allison Traditional Magnet Middle School", "locations" : [ "Allison Traditional Magnet Middle School", "221 S. Seneca", "67213" ], "certifications" : [ "Kansas teaching license" ], "timestamp" : "2026-06-15T08:26:30.944", "fingerprint" : "846f205b765395d8e45feb6ec236078c9a114466eda7d7ffff2ff324b5b94a15", "source" : "taleo", "language" : "en", "applyUrl" : "https://aa308.taleo.net/careersection/ex/jobdetail.ftl?job=42513", "externalId" : "42513", "industryFunction" : { }, "structuredLocations" : [ { "country" : "United States", "continent" : "na", "workMode" : "onsite" } ], "locationText" : "United States", "employmentType" : "FULL_TIME", "minimumEducation" : "Master's", "professionalSkills" : [ "Curriculum development", "Instructional design", "Behavior management" ], "hardSkillsList" : [ "IEP development", "Differentiated instruction", "Behavioral strategies" ], "hardSkills" : [ { "name" : "IEP development", "level" : "intermediate" }, { "name" : "Differentiated instruction", "level" : "intermediate" }, { "name" : "Behavioral strategies", "level" : "intermediate" } ], "majorSkills" : "Special education, IEP implementation, Student instruction", "majorSkillsList" : [ "Special education", "IEP implementation", "Student instruction" ], "coreResponsibilities" : "Plan student instruction, Lead student instruction, Facilitate student instruction, Provide student instruction, Follow student IEPs, Ensure curriculum instruction, Participate on pre-assessment teams, Diagnose student needs, Structure IEPs, Implement IEPs, Diagnose student learning, Structure daily expectations, Communicate instructional strategies, Report student data, Negotiate schedules, Communicate with stakeholders, Provide differentiated instruction, Control classroom behavior, Teach individual behavior, Adapt course content, Adjust reading levels, Discern learning styles, Build memory skills, Build study skills, Assist students academically, Assist students daily living, Assist students social skills, Present learning opportunities, Support regular teachers, Prepare events, Display reinforcement activities, Evaluate student progress, Plan assessments, Design subject-based reinforcement, Design grading system, Collect student data, Enter student data, Report student progress, Provide positive role model, Develop classroom structure, Teach classroom rules, Review classroom routines, Design classroom rules, Design systems for behavior, Prepare classroom physical condition, Maintain clean classroom, Maintain organized classroom, Keep daily records, Supervise paraprofessionals, Manage job duties", "teamCollaboration" : "Multi-disciplinary team; Regular education staff; Special education staff; Diverse population", "domainKnowledge" : "Special Education; Individual Education Program (IEP); Standards-based instruction", "domainList" : [ "special-education", "individual-education-program-iep", "standards-based-instruction" ], "domainSpecificKnowledge" : [ "Special Education", "Individual Education Program (IEP)", "Standards-based instruction" ], "toolProficiency" : [ "SMART boards", "IPads", "Computers", "Copiers", "Scanners", "Fax machine" ], "communicationSkills" : "Verbal communication; Written communication", "documentationSkills" : "Daily records", "specialRequirements" : "Limited travel, Lift students, Dress students, Position students", "qualificationsBasic" : "Valid Kansas teaching license, Master's Degree in Special Education, Special Education Waiver obtained", "qualificationsPreferred" : "Prior teaching experience", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Job Title: Mixed Abilities Teacher Position Function: The person filling this position plans, leads, facilitates, and provides instruction for maximum student learning in his/her least restrictive learning environment. This position follows each student’s standards-based Individual Education Program (IEP) to ensure appropriate curriculum-based instruction. Essential Performance Responsibilities: Participates, as appropriate, on pre-assessment teams to determine necessity for comprehensive student evaluation; initiates, schedules, and attends IEP meetings; works with multi-disciplinary team to diagnose need; structures/implements IEP for each student identified Defines, structures, and communicates daily expectations according to state standards and IEP including, but not limited to, course goals, objectives, learning methods, and activities Communicates with parents, regular education staff members, special education staff members, and other appropriate stakeholders on course instructional strategies and objectives, students’ grasp of material, outcomes and perspectives for applications of materials learned Receives and reports student progress; in-puts student data via computer; negotiates schedules and communicates with all pertinent participants (administration, parents, staff, students, etc.) Provides differentiated instruction based on the student’s individual level of functioning and preferred/necessary learning modalities Controls classroom and teaches individual behavior through classroom structure, routine, communication opportunities, and individualized behavior methods; adapts and adjusts course content and reading levels to specify skills to be taught; discerns learning styles and means of building memory and study skills; assists individual students in achieving academic, daily living, and social skills learning objectives by working with them individually and in small groups Presents various learning opportunities appropriate to each student’s IEP including, but not limited to, classroom structure, multi-media, assistive technology, alternative communication opportunities, support of regular classroom teachers, and other presentations and/or opportunities inside or outside Prepares and displays events and reinforcement activities which encourage participation Evaluates according to state standards and student IEPs Plans assessments for evaluation to include, but not limited to, various diagnostic techniques; standardized survey and criterion-referenced test; teacher-developed oral and written tests; student personal indices (effort, potential, interests, memory) Designs subject-based reinforcement to follow assessments and student’s learning objectives (computer, lab activities, working independently or on group projects, field/community reinforcement) Designs a grading system which encourages motivation and participation; collects and enters student data in computer from charts and observations; reports progress on a regular basis as required Provides a positive role model of appropriate and respectful interactions with students and staff Develops, teaches, and reviews clear and concise classroom structure, rules, routines, procedures, and expectations individualized to student need Designs classroom rules for student interaction (courtesy and respect for belongings, space, and ideas), self-control, working independently, and appropriately gaining the floor; designs systems for handling all the behavior (from simple infractions to severe behavior) Prepares physical condition of classroom to reflect subject matter to facilitate student learning and maintains a clean and organized classroom Keeps daily records on, but not limited to, student attendance, learning and social needs, assignments, assessments and discipline; supervises paraprofessionals Manages all job duties with the mobility, agility, dexterity, and focused observation necessary to adequately perform the essential duties as described above Additional Duties: Assists with additional duties as assigned by supervisor. Equipment: This position may require the ability to use SMART boards and iPads in addition to basic office equipment such as computers, copiers, scanners, and fax machine. Must always comply with USD 259’s guidelines for equipment use. Travel: Limited travel between schools and central offices may be required. Physical and Mental Demands: Good physical health and ability to implement behavioral strategies as well as to lift, dress, and position students as needed for self-care and safety. Knowledge, Skills, and Abilities: Ability to communicate both verbally and written in order to communicate with others inside and outside of the organization for the purpose of giving and obtaining information Ability to communicate effectively with a Supervisor when their discretion is needed Ability to perform as an effective team player Ability to plan, organize, make decisions and prioritize work to meet the daily demands of the building Exhibits a professional manner and a positive attitude Uses good judgment to make decisions on recurring assignments Displays a significant degree of professionalism and confidentiality Ability to conform to proper standards of professional dress and appearance Knowledge of company’s mission, purpose, goals and the role of every employee in achieving each of them Interrelations: Contact with personnel within the district and with customers and vendors Will be working under the direct supervision of the department supervisor in order to complete day to day tasks Will be working with a diverse population requiring the ability to handle all situations with tact and diplomacy Must understand and respond appropriately to customer needs and maintain a positive attitude with all customers and colleagues Expected to interact with all internal and external customers in a friendly, professional manner and provide quick, responsive customer service Employee Punctuality and Appearance: In order for schools to operate effectively, employees are expected to perform all assigned duties and work all scheduled hours during each designated workday, unless the employee has received approved leave Any deviation from assigned hours must have prior approval from the employee’s supervisor or building administrator All employees are required to report to work dressed in a manner that reflects a positive image of USD 259 and is appropriate for their position Qualification Profile: Valid Kansas teaching license required Master’s Degree in Special Education or enrolled in a Special Education Degree Program with Plan of Study on file with District and Special Education Waiver obtained Prior teaching experience preferred FLSA Status: Exempt", "summaryDescription" : "Mixed Abilities Teacher at Allison Traditional Magnet Middle School. Skills: Special education, IEP implementation, Student instruction. Plan student instruction. Lead student instruction", "createdAt" : "2026-06-14T01:49:33.480", "lastUpdated" : "2026-06-15T08:26:30.944", "ingestTimestamp" : "2026-06-14T01:49:33.480", "mongoId" : "6949b14570f0b99d588271bd", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 55000, "salaryAnnualMax" : 85000, "salaryBand" : "50k-75k", "hasSalary" : true, "allSkills" : [ "IEP development", "Differentiated instruction", "Behavioral strategies", "Special education", "IEP implementation", "Student instruction", "Curriculum development", "Instructional design", "Behavior management", "Special Education", "Individual Education Program (IEP)", "Standards-based instruction", "Kansas teaching license", "SMART boards", "IPads", "Computers", "Copiers", "Scanners", "Fax machine" ], "skillCount" : 19, "jobCategory" : "education", "jobSubcategory" : "support", "seniorityLevel" : "Mid", "dataQualityScore" : 0.7777778, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Education", "llmIndustryConfidence" : 0.98 }, { "id" : "6a2ce7ba74d8ee00a0a68649", "title" : "Design Engineer", "company" : "Lumbra", "industry" : "Software Engineer", "salary" : { "min" : 95000.0, "max" : 135000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level Design Engineer in Arlington, United States, adjusted for the technology industry." }, "location" : "Arlington", "locations" : [ "Arlington", "New York City" ], "timestamp" : "2026-06-16T04:36:26.404", "fingerprint" : "6e321a86865f04620d9276149c0abfa9a12d357c5d26db885a5b3441ff1b5090", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/lumbra/1f811539-2d1b-42e5-aa1a-b0b095a96db4/application", "externalId" : "1f811539-2d1b-42e5-aa1a-b0b095a96db4", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Arlington", "state" : "Virginia", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "38.8769326,-77.0893094" } ], "locationText" : "Arlington, Virginia, United States", "employmentType" : "FULL_TIME", "technicalSkills" : "React, TypeScript", "professionalSkills" : [ "Visual expression", "Technical execution", "Information hierarchy" ], "hardSkillsList" : [ "Design systems", "Brand architecture", "Component primitives", "Interaction patterns", "Data visualization" ], "hardSkills" : [ { "name" : "Design systems", "level" : "intermediate" }, { "name" : "Brand architecture", "level" : "intermediate" }, { "name" : "Component primitives", "level" : "intermediate" }, { "name" : "Interaction patterns", "level" : "intermediate" }, { "name" : "Data visualization", "level" : "intermediate" } ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Create and steward design system, Manage brand architecture, Develop tokens and themes, Ensure light and dark parity, Build component primitives, Prototype novel AI interaction patterns, Ship novel AI interaction patterns, Translate product intent into production React, Translate product intent into production TypeScript, Partner with product engineers, Partner with research engineers, Partner with backend engineers, Carry sketch through to shipped feature, Steward information hierarchy in dense analytical surfaces, Hold accessibility as baseline, Hold inclusive design as baseline", "teamCollaboration" : "Product, research, backend engineers", "domainKnowledge" : "Agentic AI; High-consequence environments; AI interaction patterns; Knowledge graphs; Workflow visualizations", "domainList" : [ "agentic-ai", "high-consequence-environments", "ai-interaction-patterns", "knowledge-graphs", "workflow-visualizations" ], "domainSpecificKnowledge" : [ "Agentic AI", "High-consequence environments", "AI interaction patterns", "Knowledge graphs", "Workflow visualizations" ], "innovationCreativity" : "Prototype development", "specialRequirements" : "U. S. citizenship, Clearance-eligible, Based in National Capital Region, Based in New York City", "qualificationsBasic" : "Portfolio of shipped production work, Fluency across design-to-code spectrum, Track record of holding legibility in dense analytical environments", "qualificationsPreferred" : "Prior work on AI and LLM interfaces, Deep comfort with AI-assisted prototyping and engineering", "remoteFriendly" : true, "workSiteFlexibility" : "Onsite", "rawDescription" : "ABOUT LUMBRA Lumbra builds the vendor-neutral operating system for agentic AI in high-consequence environments. In our first ten months we won four U.S. Government prime contracts in open competition, every one deploying into classified spaces, and we are live on JWICS. We were selected from a field of more than 200 companies and won, beat two established defense primes head to head, and earned the follow-on now in execution. Lumbra is a team of engineers and operators from the intelligence community, special operations, and frontier AI research, with degrees from MIT, Carnegie Mellon, West Point, and U.S. Army Ranger School and careers built at Palantir, Anduril, Northrop Grumman, Onebrief, JSOC, NSA, and CIA. They have lived this problem from the inside. ABOUT THE ROLE Nebula is one product serving two very different audiences. For the non-technical operators and analysts, the surface has to stay calm: the answer, the confidence behind it, and the sources, with nothing to fight through. The technical builders need the reverse: full transparency into the agents, tools, traces, and tradeoffs underneath. Within each audience, sub-personas work at a different altitude of detail and tolerate a different information density. We want a Design Engineer who lives between design and code, can hold all of them at once, and owns the design language that serves both without dumbing either one down. WHAT YOU’LL OWN - Create and steward the design system and brand architecture that spans both audiences, from the low-density operator surface to the high-transparency builder surface: tokens, themes, light and dark parity, and the component primitives that make opposite surfaces feel like one platform. - Prototype and ship novel AI interaction patterns: streaming output, tool-call visualization, citation surfacing, confidence indicators, and agent-to-human handoffs. - Translate product intent into production React and TypeScript, partnering with product, research, and backend engineers to carry a sketch through to a shipped feature without losing fidelity in the handoff. - Steward information hierarchy in dense analytical surfaces such as knowledge graphs, evaluation dashboards, and workflow visualizations, where the wrong default hides the work and the right one reveals it. - Hold accessibility and inclusive design (WCAG) as a baseline of the system rather than a cleanup done later. YOU’LL WORK ALONGSIDE Intelligence officers, MIT engineers, Special Operations veterans, and applied AI engineers from frontier labs like Anthropic and Google. Your work affects national security directly, and you own part of the company early, when it matters. REQUIRED QUALIFICATIONS - A portfolio of shipped production work where you owned both the visual expression and the technical execution, in open source, personal projects, or professional products, weighed as craft over job titles - Fluency across the design-to-code spectrum, having personally managed tokens, themes, and shared component primitives in a production React and TypeScript codebase - A track record of holding legibility in dense analytical environments (intelligence, financial, scientific, or developer-facing) where complex data needs disciplined hierarchy PREFERRED QUALIFICATIONS - Prior work on AI and LLM interfaces: streaming display, tool-call visualization, confidence and citation surfacing - Deep comfort with AI-assisted prototyping and engineering to close the gap between high-fidelity design and shipped code MUST-HAVES U.S. citizenship. Clearance-eligible. Based in the National Capital Region or New York City. BENEFITS - Comprehensive medical, dental, and vision plans - Premiums 100% covered by Lumbra for all employees - Exceptionally low premiums for spouses and dependents - Basic life insurance and disability 100% covered for all employees by Lumbra - Option to purchase additional life insurance available - Take the time off that you need, when you need it' paid time off, not accrual based - Generous company holiday calendar including a holiday shutdown in December - Supportive leave of absence program including time off for military service, medical events, and parental leave - Full 401(k) retirement plan for all full-time eligible employees - Company-funded commuter benefits - Free access to on-site gym at office", "summaryDescription" : "Design Engineer at Lumbra. Skills: User experience, Interface design, Visual design, Design systems. Create and steward design system. Manage brand architecture", "createdAt" : "2026-06-14T18:43:05.551", "lastUpdated" : "2026-06-16T04:36:26.404", "ingestTimestamp" : "2026-06-14T18:43:05.551", "mongoId" : "6a2ce7ba74d8ee00a0a68649", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 95000, "salaryAnnualMax" : 135000, "salaryBand" : "75k-100k", "hasSalary" : true, "allSkills" : [ "Design systems", "Brand architecture", "Component primitives", "Interaction patterns", "Data visualization", "User experience", "Interface design", "Visual design", "Visual expression", "Technical execution", "Information hierarchy", "Agentic AI", "High-consequence environments", "AI interaction patterns", "Knowledge graphs", "Workflow visualizations" ], "skillCount" : 16, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Mid", "dataQualityScore" : 0.7777778, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a2c7f4e74d8ee00a0955131", "title" : "Electrical Engineer (RF/Signal Processing Engineer)", "company" : "Analytic Services Inc", "industry" : "Government", "salary" : { "min" : 145000.0, "max" : 205000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior Electrical Engineer in Reston, VA, adjusted for the government industry and company size." }, "location" : "Reston, Virginia, United States", "locations" : [ "Reston", "Virginia", "United States" ], "timestamp" : "2026-06-15T08:28:54.808", "fingerprint" : "8be341cadbc3dda1b2e59a2963bf3e52b71748fd30165922219a48598d48b1e0", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/analyticservicesinc/jobs/5255444008?gh_jid=5255444008", "externalId" : "5255444008", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Reston", "state" : "Virginia", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : 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"name" : "Computer engineering principles", "level" : "intermediate" }, { "name" : "Electronic engineering principles", "level" : "intermediate" }, { "name" : "Optical engineering principles", "level" : "intermediate" }, { "name" : "Power engineering principles", "level" : "intermediate" }, { "name" : "Technical analyses production", "level" : "intermediate" }, { "name" : "Engineering assessments production", "level" : "intermediate" }, { "name" : "Microelectronics analysis", "level" : "intermediate" }, { "name" : "Reverse engineering support", "level" : "intermediate" }, { "name" : "Technical exploitation support", "level" : "intermediate" }, { "name" : "System characterization support", "level" : "intermediate" }, { "name" : "RF systems knowledge", "level" : "intermediate" }, { "name" : "Electromagnetic technologies knowledge", "level" : "intermediate" }, { "name" : "Electro-optical systems knowledge", "level" : "intermediate" }, { "name" : "Infrared systems knowledge", "level" : "intermediate" }, { "name" : "Software development experience", "level" : "intermediate" } ], "majorSkills" : "RF systems, Signal processing, Electronic systems, Technical analysis", "majorSkillsList" : [ "RF systems", "Signal processing", "Electronic systems", "Technical analysis" ], "coreResponsibilities" : "Support defense analytical requirements, Conduct reverse engineering analyses, Evaluate system performance, Analyze electronic hardware, Perform assessments of electromagnetic systems, Perform assessments of electro-optical systems, Perform assessments of infrared systems, Develop technical reports, Develop briefings, Develop analytical products, Support facility assessments, Support vulnerability analyses, Apply electrical engineering principles, Collaborate with multidisciplinary teams, Contribute to development of analytical approaches, Contribute to development of analytical methodologies", "teamCollaboration" : "Multidisciplinary teams", "domainKnowledge" : "Foreign electronic systems; Emerging technologies; National security; Radio frequency systems; Signal processing; Microelectronics; Sensors; Guidance and control systems; Advanced electronic technologies; Electromagnetic systems; Electro-optical systems; Infrared systems; Threat environments; Computer engineering; Electronic engineering; Optical engineering; Power engineering", "domainList" : [ "foreign-electronic-systems", "emerging-technologies", "national-security", "radio-frequency-systems", "signal-processing", "microelectronics", "sensors", "guidance-and-control-systems", "advanced-electronic-technologies", "electromagnetic-systems", "electro-optical-systems", "infrared-systems", "threat-environments", "computer-engineering", "electronic-engineering", "optical-engineering", "power-engineering" ], "domainSpecificKnowledge" : [ "Foreign electronic systems", "Emerging technologies", "National security", "Radio frequency systems", "Signal processing", "Microelectronics", "Sensors", "Guidance and control systems", "Advanced electronic technologies", "Electromagnetic systems", "Electro-optical systems", "Infrared systems", "Threat environments", "Computer engineering", "Electronic engineering", "Optical engineering", "Power engineering" ], "communicationSkills" : "Technical reports; Briefings; Analytical products", "documentationSkills" : "Technical reports; Analytical products", "innovationCreativity" : "Innovative analytical approaches; Innovative analytical methodologies", "problemSolvingSkills" : "Complex technical challenges", "specialRequirements" : "Active TS/SCI clearance, CI Polygraph", "qualificationsBasic" : "Active TS/SCI clearance, CI Polygraph, Bachelor's degree in Electrical Engineering, 8 years of experience, Evaluating electronic systems, Knowledge of electrical engineering principles, Producing technical analyses", "qualificationsPreferred" : "Analyzing complex foreign electronic systems, Microelectronics and advanced electronic hardware, Supporting reverse engineering, Knowledge of RF systems, Experience with software development, Digital signal processing, Signal detection theory", "remoteFriendly" : true, "rawDescription" : "Company Overview: ANSER enhances national and homeland security by strengthening public institutions. We provide thought leadership for complex issues through independent analysis, and we deliver practical, useful solutions. ANSER values collaboration, integrity, and initiative and we are client focused in all that we do. Because we were established for the purpose of public service and not for profit, we measure our success in the impact of our service. Position Overview: ANSER is seeking an Electrical Engineer (RF/Signal Processing Engineer) to support advanced defense analysis efforts through scientific and engineering research, technical assessments, and system characterization activities. In this role, you will provide subject matter expertise on complex foreign electronic systems and emerging technologies, helping to assess capabilities, vulnerabilities, and operational impacts that inform national security decision-making. You will contribute to multidisciplinary analyses involving radio frequency (RF) systems, signal processing, microelectronics, sensors, guidance and control systems, and other advanced electronic technologies. Day-to-Day Responsibilities: Support defense analytical requirements through scientific and engineering research, technical assessments, and limitation analyses. Conduct reverse engineering analyses and technical characterizations of foreign electronic systems, subsystems, facilities, and equipment. Evaluate system performance, capabilities, vulnerabilities, and operational effectiveness of complex electronic technologies. Analyze electronic hardware, circuits, microelectronics, sensors, and associated subsystems to support intelligence and defense missions. Perform assessments of electromagnetic, electro-optical (EO), and infrared (IR) systems and their applications within current and emerging threat environments. Develop technical reports, briefings, and analytical products that communicate findings to government stakeholders and mission partners. Support facility assessments and vulnerability analyses related to foreign electronic systems and infrastructure. Apply electrical engineering principles across computer, electronic, optical, and power engineering disciplines to solve complex technical challenges. Collaborate with multidisciplinary teams to evaluate current and projected foreign technologies and their potential operational impacts. Contribute to the development of innovative analytical approaches and methodologies for assessing advanced electronic systems. Required Qualifications: Active TS/SCI clearance with Counterintelligence (CI) Polygraph. Bachelor's degree in Electrical Engineering or a related engineering discipline. Minimum of 8 years of experience performing electrical engineering analysis, research, design, testing, or assessment activities. Experience evaluating electronic systems, subsystems, or components in support of defense, intelligence, research, or engineering missions. Knowledge of electrical engineering principles and one or more related disciplines, including computer, electronic, optical, or power engineering. Experience producing technical analyses, reports, or engineering assessments for government, defense, or intelligence customers. Preferred Qualifications: Experience analyzing complex foreign electronic systems, subsystems, facilities, or equipment. Experience with microelectronics and advanced electronic hardware technologies. Experience supporting reverse engineering, technical exploitation, or system characterization efforts. Knowledge of radio frequency (RF) systems, electromagnetic technologies, electro-optical systems, or infrared systems. Experience with software development, digital signal processing, and signal detection theory. Ability to communicate complex technical concepts effectively to both technical and non-technical audiences. In compliance with the Americans with Disabilities Act (ADA), if you have a disability and would like to request an accommodation in order to apply for a position with ANSER, please call 703-416-2000 or e-mail Recruiting@anser.org ANSER is proud to be an Equal Opportunity Employer. We seek individuals from a broad variety of backgrounds with varying levels of experience who have a desire to do meaningful work. We recruit, employ, train, compensate, and promote regardless of race, color, gender, religion, national origin, ancestry, disability, age, veteran status, sexual orientation, or any other characteristic protected by law.", "summaryDescription" : "Electrical Engineer (RF/Signal Processing Engineer) at Analytic Services Inc. Skills: RF systems, Signal processing, Electronic systems, Technical analysis. Support defense analytical requirements. Conduct reverse engineering analyses", "postedDate" : "2026-06-14T04:34:21.684", "createdAt" : "2026-06-14T04:34:21.684", "lastUpdated" : "2026-06-15T08:28:54.808", "ingestTimestamp" : "2026-06-14T04:34:21.684", "mongoId" : "6a2c7f4e74d8ee00a0955131", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 145000, "salaryAnnualMax" : 205000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Electrical engineering analysis", "Research", "Design", "Testing", "Assessment activities", "Electronic systems evaluation", "Subsystem evaluation", "Component evaluation", "Electrical engineering principles", "Computer engineering principles", "Electronic engineering principles", "Optical engineering principles", "Power engineering principles", "Technical analyses production", "Engineering assessments production", "Microelectronics analysis", "Reverse engineering support", "Technical exploitation support", "System characterization support", "RF systems knowledge", "Electromagnetic technologies knowledge", "Electro-optical systems knowledge", "Infrared systems knowledge", "Software development experience", "RF systems", "Signal processing", "Electronic systems", "Technical analysis", "Scientific research", "Engineering research", "Technical assessments", "System characterization", "Reverse engineering", "Limitation analyses", "Vulnerability analyses", "Analytical approaches", "Analytical methodologies", "Foreign electronic systems", "Emerging technologies", "National security", "Radio frequency systems", "Microelectronics", "Sensors", "Guidance and control systems", "Advanced electronic technologies", "Electromagnetic systems", "Electro-optical systems", "Infrared systems", "Threat environments", "Computer engineering", "Electronic engineering", "Optical engineering", "Power engineering" ], "skillCount" : 53, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.7777778, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Government", "llmIndustryConfidence" : 0.98 }, { "id" : "6a2d098d74d8ee00a0ac7c27", "title" : "Design Engineer", "company" : "Ashby", "industry" : "Engineering", "salary" : { "min" : 58000.0, "max" : 133000.0, "currency" : "EUR", "frequency" : "Yearly" }, "location" : "Portugal", "locations" : [ "Portugal", "Spain", "Italy", "Croatia", "Sweden", "Ireland", "Estonia", "Romania", "Switzerland", "Berlin", "Barcelona", "Stockholm" ], "timestamp" : "2026-06-15T22:24:14.592", "fingerprint" : "4427798bb14ae2cbaf375a1ab9533f5b96674d4b8f7169078b6054ca23ce11b0", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/ashby/188cc71b-a625-4022-94dc-7c43fa1a8b06/application", "externalId" : "188cc71b-a625-4022-94dc-7c43fa1a8b06", "industryFunction" : { }, "structuredLocations" : [ { "country" : "Portugal", "continent" : "eu", "workMode" : "onsite" } ], "locationText" : "Portugal", "employmentType" : "FULL_TIME", "remoteFriendly" : true, "rawDescription" : "Hi \uD83D\uDC4B\uD83C\uDFFE I’m Abhik https://www.linkedin.com/in/abhikpramanik/, Ashby's Co-Founder and VP of Engineering. This role is close to my heart because, as someone who can both design and code, it’s where I’ve always done my best work, but also where I was seen as a rebel and an outsider. I want folks like me to feel at home at Ashby, and so I made Design Engineering a formal role and department that works closely with me. Our first hire was over five years ago, and we’re doubling the team from five to over ten in the next year. This role truly expects you to design and code. Design Engineer at Ashby isn’t just a Frontend Engineer with new branding, nor is it a Designer vibe coding prototypes. Combining excellence in both is where magic happens. I found that when I put my best effort into both the design and technical implementation of a feature, I had a nimbleness and creativity that was hard to achieve when I did only one or the other. For instance, the UX and UI I envisioned often influenced the data model's design and flexibility, while the understanding of technology's capabilities often simplified or improved the design. This role embraces that. The Design Engineer role is more common today than five years ago, but I believe Ashby offers a unique opportunity that few can match: - First, this role has always had the commitment of both Benji (CEO & Co-Founder) and me: I’ve held the role, steadfastly championed it since we started hiring in 2020, and haven’t diluted its responsibilities as we’ve grown (in fact, we’ve doubled down). - Second, you work on a product at scale, not at an early-stage startup struggling to find users and get feedback on what you’ve designed and built. At Ashby, your work will touch over 100,000 weekly active users, millions of candidates per week, and notable customers like Notion, Linear, Shopify, and Snowflake. You’ll get to test out ideas with our own recruiting team and hiring managers who use Ashby every day (like me), and often hear customer feedback as early as the day you release. In this role, you’ll work on our most challenging design problems, help others improve their designs by expanding and enhancing our in-house design system, and consult on bespoke design work needed by Product Engineers. To ground it with examples, Design Engineers at Ashby have: - Redesigned our mobile web app by talking with customers who use it often, wireframing new flows, implementing its design system, and using it to make the wireframes a reality. - Built a set of flexible, composable components in our design system that allow other engineers to easily build beautiful, consistent setup wizards across our product. - Helped a Product Engineer improve the information hierarchy and scannability of their design for viewing a candidate’s assessments. Recruiters can quickly parse information and pick out anomalies. WHY YOU SHOULDN’T APPLY Design Engineers come in many flavors, not all of which fit our model. Here are some reasons you might not enjoy the role: - You only want to work on design systems. While improving our design system is one of many responsibilities, you won’t be able to work on it exclusively. - You like to do extensive research and user testing before implementation. The beauty of being part-Engineer is that you can build conviction by shipping to a subset of users (including our own team) and gathering feedback! - You want everything to be perfect before it gets into a user’s hands. One of the drivers of our success is that we ship fast. That often means we don’t agonize over every detail and instead iterate over time, often letting user feedback and business needs drive prioritization. - You don’t have excellent taste and execution in visual design. Design Engineers set the bar for visual design in our app and continually improve it, pushing its boundaries with each new feature or redesign. - You need company-driven process and structure to get your projects across the finish line. Sprint planning and well-defined project management processes are things you need or look to others to lead. You’d rather focus on the design and technical details. - You only want to do exciting work. We’re building a team of kind, collaborative folks. Customer issues and investigations are distributed across the team, including our high-level ICs. WHAT SENIORITY/LEVEL TO APPLY FOR We’ve posted levels from Junior to Staff. The higher the level, the more experience and alignment with the role we expect when reviewing your application and while interviewing. Please apply to the one that sets the right expectations. - Junior Design Engineer - You should have no more than 2 years of industry experience as a designer or engineer. We want to see projects (personal or professional) with at least a couple of users that showcase great visual taste and burgeoning talent in both UI/UX and Engineering. - Design Engineer (This Posting) - This posting covers both Mid and Senior levels. You have 2+ years of continuous experience (e.g., internships don’t count) as an Engineer or a Designer. You have good proficiency in both Design and Engineering, with exceptional proficiency in the discipline you practice full-time. Regardless of which discipline you’re coming from, we expect experience designing products and shipping code to hundreds of users (even if through side projects). - Staff Design Engineer - We’re looking for folks who’ve practiced our flavor of Design Engineering professionally. It may not be through a formal title, but you’ve made major contributions to a design system and designed and implemented features for hundreds of users and iterated on them through user feedback. Internally, we do not use these titles, but Engineers are leveled based on proficiency (which you can read about here https://www.ashbyhq.com/blog/engineering/leveling-and-compensation). WHAT WE’RE BUILDING As engineers, we are used to tooling that makes us better at what we do. When we started Ashby, we saw the opposite with Talent Acquisition software. Recruiting teams were leveling up how they did their work, but instead of software meeting this new standard, it held them back. Scheduling a final round is an excellent example. Recruiting teams wanted to schedule candidates faster, track interviewer preparation and quality, and do it with half the headcount. A recruiter needed to manually collect availability from the candidate, identify qualified interviewers, perform “Calendar Tetris” to find who is available to interview the candidate, schedule on the earliest date possible, and make any last-minute adjustments as availability changed. They must do this while considering the interview load on each individual and whether interviewers need to be trained and shadowing others. \uD83E\uDD75 TA software didn’t help. As hiring managers, we know TA is a critical function, and as engineers, we know software can do better. So, we built and continue to build Ashby to give TA teams the highest standard of tooling. Software that’s intelligent and powerful. Software that provides insights into where they’re failing and automates or simplifies many of the tasks they’re underwater with. We want other functions and departments to be jealous of what TA teams can do with Ashby, and today they often are! ENGINEERING CULTURE Our engineering culture is motivated by Benji’s (my Co-founder and CEO) and my belief that a small, talented team, given the right environment, can build high-quality software fast (and work regular hours!). We do it through: - Minimal process with ownership over decisions normally made by product and design - Natural collaboration and deliberate communication - Investing in tools and abstractions that give us leverage - Putting effort into building a diverse team MINIMAL PROCESS & LOTS OF OWNERSHIP The best engineers we’ve worked with delivered reliably magical outcomes. They took customer problems and relentlessly drove them to solutions that were not only successful but often brilliant and creative. While they did this with minimal oversight, stakeholders were never in the dark as to what was going on, and no setback was a surprise. Traditional product-development processes aren’t meant for the best engineers. Their purpose is to create consistent outcomes regardless of the engineer’s skill. But, consistency comes at the expense of an engineer’s time and freedom—both ingredients necessary to generate those magical outcomes. As a result, process stifles the best engineers and doesn’t give others the opportunity to practice the behaviors that made the best engineers the “best.” At Ashby, we want to build an environment that encourages every engineer to be their best. So, at Ashby, every Engineer runs their project. Product Managers (and Designers) build strategy, do customer research, and hand off problem briefs to Engineers. Engineers take on the rest: they research the problem, write product specs, build wireframes, and implement their solution end-to-end. We rely on engineers, not process, to push information outward to the relevant folks (e.g., Product Managers) and pull folks in to help (e.g., Designers, Infra). It’s a new level of ownership for many engineers, but we’d rather an engineer fail a bit and coach up their skills than use process as a crutch. Not everyone succeeds in our culture, but those who do thrive. COLLABORATION IS NATURAL & COMMUNICATION IS DELIBERATE Our engineering team consists of lifelong learners who are talented but also humble and kind (meet them here https://www.ashbyhq.com/team!). These attributes create an environment where collaboration happens naturally. We combine this with research, prototyping, and written proposals to see around corners and get feedback from the team across time zones. Focus time is something that we hold sacred, and, with thoughtful and deliberate communication, engineers are in <2h meetings per week (I wrote about it here https://www.ashbyhq.com/blog/company/thoughtful-communication). To drive it home, here's a recent calendar of an engineer who has been with us for over 4 years. ~34 hours of focus time, 2.5h of interviews, and 3.5 hours of meetings: [https://app.ashbyhq.com/api/images/user-content/4ea5f68e-c33e-4ac9-831a-e732bee4a303/d4679311-9dba-4031-bf5e-19ce78597ab1/calendar.png] We also meet in person at least twice a year, once as a department and once as a company. You also have a small budget to meet up with folks in your city/region. INCREASE LEVERAGE, NOT TEAM SIZE We built Ashby with the quality, breadth, and depth that many customers would expect from much larger teams over larger time scales. We’ve done this through investment in: - Great developer tooling. Our CI/CD takes ~10m, and we deploy at least 15x a day. A debugger that works out of the box. Everyone on the team has contributed to our developer experience \uD83D\uDCAA\uD83C\uDFFE. - Building blocks to create powerful and customizable products fast. At the core of Ashby is a set of common components (analytics modeling and query language, policy engine, workflow engine, design system) that we constantly improve. Each improvement to a common component cascades throughout our app (short video below). - AI-powered tooling. We think of AI as a way to automate the mundane parts of building and maintaining high-quality software. We use a combination of third-party and internally built tools that, for instance, auto-triage customer issues, suggest fixes, prototype ideas, generate production-ready code, and conduct code reviews. Engineers have an unlimited token budget (but are not measured on it). We write in detail about our philosophy, current use of AI, and future plans for AI in Engineering here https://www.ashbyhq.com/blog/engineering/ai-ashby-engineering-and-the-future. Here’s an impromptu quote from Arjun in our company Slack of what it’s like to build a feature at Ashby: [https://app.ashbyhq.com/api/images/user-content/4ea5f68e-c33e-4ac9-831a-e732bee4a303/8d94727a-46d8-42a2-9627-ddcd7f822f95/arjun.png] And a demo of one of these building blocks: PUT EFFORT INTO DIVERSITY Diverse teams drive innovation and better outcomes. Having seen my mother and partner build their careers as minority women in non-diverse fields, I want to make sure Ashby creates opportunities for the next generation of engineers from underrepresented groups. Today, 25% of engineers and 50% of our engineering leaders at Ashby are from underrepresented groups. We are taking conscious steps to improve, like sourcing diverse candidates, providing generous paid family leave, no leetcode interviews, and more. INTERVIEW PROCESS At Ashby, our team and interview process want to help you show your best self. We’ll dive into past projects and simulate working together through pair programming, designing, writing design system specs collaboratively, and discussing decisions. There are no leetcode or whiteboard exercises. Our interview process is three rounds: - Introduction call with me (30m, live). Be prepared to screen-share examples of your work. - A second round where we either do a technical screen (1h, live) or a design take-home (~3h async, 30m live) - Three interviews, a deep dive into a past design system or design project, a design system interview, and the interview we didn’t do in the second round: technical screen or design take-home. (3h, live) Depending on our leadership team’s bandwidth, we may start with an additional 30m screen with a recruiter. I will be your main point of contact and prep you for interviews. Each round will have written guidance so you know what to expect. You’ll meet 3-4 people in Design Engineering (with 5-15 minutes in each interview to ask them questions). If we don’t give an offer, we’ll provide feedback! YOUR FIRST THREE MONTHS AT ASHBY We want an exceptional onboarding experience for every new hire. At Ashby, your dev environment is set up with a single script, you push your first product change on day one, and you spend the rest of your time shipping product changes that give you a tour of our codebase and best practices. The product changes increase in scope and ambiguity from simple copy changes to the delivery of a prominent, impactful feature. Your manager will do a 30, 60, and 90-day review to give feedback and calibrate on how we work together. It’s a team effort to get you successfully onboarded; you’ll have a peer paired with you to answer questions, pair program, and check in often to see if you need help. The rest of the team will run training sessions on our culture, product, engineering process, and technical architecture. TECHNOLOGY STACK Our tech stack is TypeScript (frontend & backend), React, GraphQL API, Node.js, Postgres, and Redis. Depending on the level you’re applying for and your past experience, we expect, at a minimum, good proficiency with TypeScript, React, and CSS. Proficiency with backend technologies is a plus, as it allows you to work without coordinating with Product Engineers. BENEFITS - Competitive salary and equity. - 10-year exercise window for stock options. You shouldn’t feel pressure to purchase stock options if you leave Ashby —do it when you feel financially comfortable. - Unlimited PTO, and we will encourage you to take it. - A minimum of 12 weeks of fully paid parental leave, covered by Ashby. For folks outside the US, it may be longer to be in line with regional requirements. - Generous equipment, software, and office furniture budget. Get what you need to be happy and productive! - $100/month education budget with more expensive items (like conferences) covered with manager approval. - If you’re in the US, we offer top-tier health insurance for you and your dependents, with 100% of premiums covered by Ashby. In other countries, we provide high-quality supplemental health insurance for you and your dependents, also fully covered by us. Ashby’s success hinges on hiring great people and creating an environment where we can be happy, feel challenged, and do our best work. We’re being deliberate about building that environment from the ground up. I hope that excites you enough to apply. Ashby provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, sex, national origin, age, disability, genetics, sexual orientation, gender identity, or gender expression. We are committed to a diverse and inclusive workforce and welcome people from all backgrounds, experiences, perspectives, and abilities. Ashby is committed to a fair and transparent hiring process. We confirm that this advertisement is for an active, existing vacancy within our organization. Please be advised that we may use artificial intelligence-driven tools to assist our recruitment team in screening, assessing, and selecting candidates for this position.", "summaryDescription" : "Design Engineer at Ashby", "createdAt" : "2026-06-14T21:53:47.254", "lastUpdated" : "2026-06-15T22:24:14.592", "ingestTimestamp" : "2026-06-14T21:53:47.254", "mongoId" : "6a2d098d74d8ee00a0ac7c27", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "50k-75k", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.6666667, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "SaaS", "llmIndustryConfidence" : 0.98 }, { "id" : "6a30609ff292fd229cf9201e", "title" : "Junior Physical Design Engineer", "company" : "Astera Labs", "industry" : "Technology", "salary" : { "min" : 180000.0, "max" : 270000.0, "currency" : "ILS", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Junior Physical Design Engineer in Haifa, Israel, adjusted for the technology industry and entry-level experience." }, "location" : "Haifa, Israel", "locations" : [ "Haifa", "Israel", "Tel Aviv", "Israel" ], "timestamp" : "2026-06-16T07:27:49.078", "fingerprint" : "7913759d5feb1d19c404d79a02f599e64edf55bd2423f5a4ca480dae28d73e4f", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/asteralabs/jobs/4705844005", "externalId" : "4705844005", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Haifa", "country" : "Israel", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "32.8191218,34.9983856" } ], "locationText" : "Haifa, Israel", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor's", "experienceMinYears" : 0, "experienceMaxYears" : 2, "experienceLevel" : "Entry", "technicalSkills" : "RTL, GDS, TCL, Python, STA, LEC, DRC, EMIR, SI, PI, DFT", "professionalSkills" : [ "Methodology development", "Tool automation", "Design integrity" ], "hardSkillsList" : [ "Physical implementation", "Timing signoff", "Physical verification", "Reliability analysis", "Logic equivalence checking", "Clock-tree synthesis", "Floorplanning", "Place and route", "Macro-level implementation", "Complex routing" ], "hardSkills" : [ { "name" : "Physical implementation", "level" : "intermediate" }, { "name" : "Timing signoff", "level" : "intermediate" }, { "name" : "Physical verification", "level" : "intermediate" }, { "name" : "Reliability analysis", "level" : "intermediate" }, { "name" : "Logic equivalence checking", "level" : "intermediate" }, { "name" : "Clock-tree synthesis", "level" : "intermediate" }, { "name" : "Floorplanning", "level" : "intermediate" }, { "name" : "Place and route", "level" : "intermediate" }, { "name" : "Macro-level implementation", "level" : "intermediate" }, { "name" : "Complex routing", "level" : "intermediate" } ], "majorSkills" : "Physical design, RTL-to-GDS flow, Signoff flows", "majorSkillsList" : [ "Physical design", "RTL-to-GDS flow", "Signoff flows" ], "coreResponsibilities" : "Establish local execution culture, Establish technical standards, Take responsibility for physical implementation, Perform Synthesis, Perform Floorplanning, Perform Place & Route, Perform Clock-Tree Synthesis, Own macro-level implementation, Perform floorplanning, Perform complex routing, Drive design integrity, Perform Timing signoff, Perform Physical Verification, Perform Reliability analysis, Ensure first-pass silicon success, Apply Logic Equivalence Checking, Guarantee design correctness, Define Backend methodologies, Refine Backend methodologies, Improve workflows, Improve tool automation, Navigate challenges of advanced process nodes, Navigate high-speed connectivity challenges, Leverage scripting for automation, Leverage automation for environment", "teamCollaboration" : "Cross-functional collaboration; Work with Architecture teams; Work with Design teams; Work with DFT teams", "domainKnowledge" : "AI infrastructure; Connectivity solutions; Deep-submicron processes; Advanced process nodes; High-speed connectivity", "domainList" : [ "ai-infrastructure", "connectivity-solutions", "deep-submicron-processes", "advanced-process-nodes", "high-speed-connectivity" ], "domainSpecificKnowledge" : [ "AI infrastructure", "Connectivity solutions", "Deep-submicron processes", "Advanced process nodes", "High-speed connectivity" ], "toolProficiency" : [ "Synopsys Fusion Compiler", "Synopsys ICC2", "Cadence Innovus" ], "innovationCreativity" : "Develop complex semiconductor chips; Transform logic into silicon", "problemSolvingSkills" : "Solve complex challenges", "outcomesObjectives" : "Meet performance targets; Meet power targets; Meet area targets", "qualificationsBasic" : "Bachelor’s degree in Electrical Engineering, RTL-to-GDS flow understanding, Floorplanning exposure, Placement exposure, Routing exposure, Familiarity with 7nm process, Basic signoff methodologies experience, Basic STA experience, Basic LEC experience, Basic DRC experience, Basic EMIR analysis experience, Working knowledge of TCL scripting, Working knowledge of Python scripting", "qualificationsPreferred" : "Full-chip level implementation experience, Full-chip level integration experience, Power analysis knowledge, Noise analysis knowledge, DFT requirements familiarity, Experience with Synopsys Fusion Compiler, Experience with Synopsys ICC2, Experience with Cadence Innovus, High-speed interface designs background, Connectivity protocols background", "workSiteFlexibility" : "Onsite", "rawDescription" : "Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. Role Overview Astera Labs is establishing a strategic R&D center in Israel to drive the development of complex semiconductor chips that solve the critical 'data bottlenecks' enabling the future of AI at scale. As we expand our presence in Israel, we're seeking a visionary Junior Physical Design Engineer to help build our local engineering powerhouse from the ground up. This is a unique opportunity to take on meaningful product ownership in a new site, defining the backend execution and methodologies for chips that power the world's largest AI clusters. As a Junior Physical Design Engineer, you will be a key architect of our silicon's physical reality. You won't just execute a flow—you will help establish our local execution culture and technical standards, owning the transformation of complex logic into high-performance silicon. You will drive the physical implementation journey from synthesis through signoff, ensuring our connectivity solutions meet the extreme performance, power, and area targets required for next-generation AI infrastructure. If you thrive on solving complex challenges in deep-submicron processes and want to shape the backend methodology for AI infrastructure connectivity, this is your opportunity. Key Responsibilities Physical Implementation & Execution Be part of the founding Backend team in Israel, playing a critical role in establishing local execution culture and technical standards Take full responsibility for physical implementation journey including Synthesis, Floorplanning, Place & Route, and Clock-Tree Synthesis (CTS) Own macro-level implementation with deep hands-on experience in floorplanning and complex routing Signoff & Design Integrity Drive final stages of design integrity, owning Timing signoff (STA), Physical Verification (DRC/LVS), and Reliability analysis (EMIR) Ensure first-pass silicon success through rigorous signoff flows and analysis Apply Logic Equivalence Checking (LEC) and other verification techniques to guarantee design correctness Methodology Development & Cross-Functional Collaboration Participate in defining and refining Backend methodologies with autonomy to improve workflows and tool automation Work closely with Architecture, Design, and DFT teams to navigate challenges of advanced process nodes and high-speed connectivity Leverage scripting and automation to make engineering environment faster and more robust Basic Qualifications Bachelor’s degree in Electrical Engineering or a related technical field Foundational understanding of the RTL-to-GDS flow, with academic or internship exposure to areas such as floorplanning, placement, and routing Familiarity with advanced process technologies (e.g., 7nm and below) through coursework or hands-on projects Basic experience with signoff methodologies and tools, including STA, Logic Equivalence Checking (LEC), DRC, and EMIR analysis Working knowledge of TCL or Python scripting for simple automation and support of EDA tool flows Preferred Qualifications Experience with full-chip level implementation and integration Knowledge of Power and Noise analysis (SI/PI) to optimize high-performance silicon Familiarity with Design-for-Test (DFT) requirements and their impact on physical layout Experience with industry-standard EDA tools (Synopsys Fusion Compiler/ICC2, Cadence Innovus) Background in high-speed interface designs or connectivity protocols We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.", "summaryDescription" : "Junior Physical Design Engineer at Astera Labs. Skills: Physical design, RTL-to-GDS flow, Signoff flows. Establish local execution culture. Establish technical standards", "postedDate" : "2026-06-15T23:29:15.431", "createdAt" : "2026-06-15T23:29:15.431", "lastUpdated" : "2026-06-16T07:27:49.078", "ingestTimestamp" : "2026-06-15T23:29:15.431", "mongoId" : "6a30609ff292fd229cf9201e", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "150k-200k", "hasSalary" : false, "allSkills" : [ "Physical implementation", "Timing signoff", "Physical verification", "Reliability analysis", "Logic equivalence checking", "Clock-tree synthesis", "Floorplanning", "Place and route", "Macro-level implementation", "Complex routing", "Physical design", "RTL-to-GDS flow", "Signoff flows", "Methodology development", "Tool automation", "Design integrity", "AI infrastructure", "Connectivity solutions", "Deep-submicron processes", "Advanced process nodes", "High-speed connectivity", "Synopsys Fusion Compiler", "Synopsys ICC2", "Cadence Innovus" ], "skillCount" : 24, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Junior", "dataQualityScore" : 1.0, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a30609ff292fd229cf92045", "title" : "Principal Digital Design Engineer", "company" : "Astera Labs", "industry" : "Technology", "salary" : { "min" : 220000.0, "max" : 320000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Principal Digital Design Engineer in San Jose, adjusted for lead seniority and technology industry." }, "location" : "San Jose, United States", "locations" : [ "San Jose", "United States", "Toronto", "Canada" ], "timestamp" : "2026-06-16T06:52:44.336", "fingerprint" : "5b49dd4c8c85569be72b4786bfd0c9869e34b72740d24b8992e0b706b9546de2", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/asteralabs/jobs/4698992005", "externalId" : "4698992005", "industryFunction" : { }, "structuredLocations" : [ { "city" : "San Jose", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.3361663,-121.8905910" } ], "locationText" : "San Jose, California, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor's", "experienceMinYears" : 8, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "System Verilog, Verilog, Python, Perl, PCIE, Ethernet", "professionalSkills" : [ "Digital design", "Micro-architecture", "RTL implementation", "IP integration", "Chip design", "Timing closure", "Verification completeness", "Embedded design", "Top level integration", "DFT knowledge" ], "hardSkillsList" : [ "RTL development", "Synthesis", "Gate-level simulations", "Design verification", "Pre-silicon design", "Post-silicon design", "Embedded design", "DFT" ], "hardSkills" : [ { "name" : "RTL development", "level" : "intermediate" }, { "name" : "Synthesis", "level" : "intermediate" }, { "name" : "Gate-level simulations", "level" : "intermediate" }, { "name" : "Design verification", "level" : "intermediate" }, { "name" : "Pre-silicon design", "level" : "intermediate" }, { "name" : "Post-silicon design", "level" : "intermediate" }, { "name" : "Embedded design", "level" : "intermediate" }, { "name" : "DFT", "level" : "intermediate" } ], "majorSkills" : "PCIE controller design, Ethernet controller design, Micro-architecture, RTL development", "majorSkillsList" : [ "PCIE controller design", "Ethernet controller design", "Micro-architecture", "RTL development" ], "coreResponsibilities" : "Design high-performance digital solutions, Implement high-performance digital solutions, Perform RTL development, Perform synthesis, Collaborate with cross-functional teams, Integrate IP for Serdes and Controller IPs, Integrate processor and peripherals, Own block-level designs, Own full-chip designs, Ensure timing closure, Assess verification completeness, Assess CDC, Assess lint", "teamCollaboration" : "Cross-functional teams", "domainKnowledge" : "Connectivity solutions; AI infrastructure; CXL; NVLink; UALink; COSMOS software suite; Advanced nodes (≤ 16nm); Serdes; Controller IPs; NIC; Switch; Storage product development", "domainList" : [ "connectivity-solutions", "ai-infrastructure", "cxl", "nvlink", "ualink", "cosmos-software-suite", "advanced-nodes-16nm", "serdes", "controller-ips", "nic", "switch", "storage-product-development" ], "domainSpecificKnowledge" : [ "Connectivity solutions", "AI infrastructure", "CXL", "NVLink", "UALink", "COSMOS software suite", "Advanced nodes (≤ 16nm)", "Serdes", "Controller IPs", "NIC", "Switch", "Storage product development" ], "toolProficiency" : [ "Synopsys", "Cadence" ], "qualificationsBasic" : "Bachelor's in Electronics/Electrical engineering, 8+ years digital design experience, 4+ years PCIE or Ethernet controller, PCS or PHY implementation, Proven expertise in RTL development, synthesis, and timing closure, Experience with front-end design, gate-level simulations, and design verification, Hands-on experience with PCIE or Ethernet Controller or Serdes/PHY IP, Hands-on pre-silicon and post-silicon design implementation, Hands-on experience FW interaction and embedded design, Proficiency in System Verilog/Verilog and scripting (Python/Perl), Experience with block-level and full-chip design at advanced nodes (≤ 16nm), Top level integration and DFT knowledge", "qualificationsPreferred" : "Master's preferred, PCIE or Ethernet SerDes controller or IP level experience, Understanding of PAD design, DFT, and floor planning, Experience with NIC, switch, or storage product development including embedded FW, Familiarity with working in design and verification workflows in a CI/CD environment", "rawDescription" : "Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. Job Description We are seeking a Principal Digital Design Engineer with deep expertise in high-performance PCIE or Ethernet controller and bridge or switch design, micro-architecture, RTL implementation, and IP integration. The ideal candidate will play a critical role in the development of cutting-edge connectivity solutions. Key Responsibilities: Design and implement high-performance digital solutions, including RTL development and synthesis. Collaborate with cross-functional teams on IP integration for Serdes and Controller IPS, processor and peripherals Own block-level and full-chip designs from architecture to GDS, focusing on designs at nodes ≤ 16nm. Ensure timing closure, assess verification completeness, CDC, lint etc. Utilize tools from Synopsys/Cadence for design and emulation. Basic Qualifications: Bachelor’s in Electronics/Electrical engineering (Master's preferred). +8 years of digital design experience, with 4+ years focused on PCIE or Ethernet controller, PCS or PHY implementation. Proven expertise in RTL development, synthesis, and timing closure. Experience with front-end design, gate-level simulations, and design verification. Strong work ethic, ability to handle multiple tasks, and a proactive, customer-focused attitude. Required Expertise: Hands-on experience with PCIE or Ethernet Controller or Serdes/PHY IP. Hands-on pre-silicon and post-silicon design implementation. Hands-on experience  FW interaction and embedded design. Strong proficiency in System Verilog/Verilog and scripting (Python/Perl). Experience with block-level and full-chip design at advanced nodes (≤ 16nm). Top level integration and DFT knowledge. Preferred Experience: PCIE or Ethernet SerDes controller or IP level experience. Understanding of PAD design, DFT, and floor planning. Experience with NIC, switch, or storage product development including embedded FW. Familiarity with working in design and verification workflows in a CI/CD environment. We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.", "summaryDescription" : "Principal Digital Design Engineer at Astera Labs. Skills: PCIE controller design, Ethernet controller design, Micro-architecture, RTL development. Design high-performance digital solutions. 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