Astera Labs
Technology
PrincipalDigitalDesignEngineer
“Principal Digital Design Engineer at Astera Labs. Skills: PCIE controller design, Ethernet controller design, Micro-architecture, RTL development. Design high-performance digital solutions. Implement high-performance digital solutions”
Industry & Context.
What They're Looking For.
Must Have
Bachelor's in Electronics/Electrical engineering, 8+ years digital design experience, 4+ years PCIE or Ethernet controller, PCS or PHY implementation, Proven expertise in RTL development, synthesis, and timing closure, Experience with front-end design, gate-level simulations, and design verification, Hands-on experience with PCIE or Ethernet Controller or Serdes/PHY IP, Hands-on pre-silicon and post-silicon design implementation, Hands-on experience FW interaction and embedded design, Proficiency in System Verilog/Verilog and scripting (Python/Perl), Experience with block-level and full-chip design at advanced nodes (≤ 16nm), Top level integration and DFT knowledge
Nice to Have
Master's preferred, PCIE or Ethernet SerDes controller or IP level experience, Understanding of PAD design, DFT, and floor planning, Experience with NIC, switch, or storage product development including embedded FW, Familiarity with working in design and verification workflows in a CI/CD environment
What You'll Do.
Design high-performance digital solutions
Implement high-performance digital solutions
Perform RTL development
Collaborate with cross-functional teams
Integrate IP for Serdes and Controller IPs
Integrate processor and peripherals
Own block-level designs
Own full-chip designs
Ensure timing closure
Assess verification completeness
How You'll Work.
Team & Collaboration
Cross-functional teams
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