{ "count" : 93284, "data" : [ { "id" : "6a210e4874d8ee00a0af6b63", "title" : "Silicon Design Verification Engineer", "industry" : "Technology", "location" : "[Mountain View, CA, USA, [100 Bay Vw Dr, Mountain View, CA 94043, USA], Mountain View, 94043, CA, US]", "locations" : [ "[Mountain View, CA, USA, [100 Bay Vw Dr, Mountain View, CA 94043, USA], Mountain View, 94043, CA, US]" ], "timestamp" : "2026-06-16T11:50:16.251", "fingerprint" : "33e14147a8aae8bf3d51e339e83ba763da13b226092318c482a6f7a091b2dd0e", "source" : "google", "language" : "en", "externalId" : "86602986070909638", "industryFunction" : { }, "technicalSkills" : "Verilog, SystemVerilog, UVM", "hardSkillsList" : [ "Design verification", "RTL design" ], "hardSkills" : [ { "name" : "Design verification", "level" : "intermediate" }, { "name" : "RTL design", "level" : "intermediate" } ], "majorSkills" : "Design verification, RTL design, SystemVerilog, UVM", "majorSkillsList" : [ "Design verification", "RTL design", "SystemVerilog", "UVM" ], "coreResponsibilities" : "Develop verification plans, Write verification environments, Execute verification tests, Debug failures, Document results, Collaborate with design teams, Improve verification methodologies", "teamCollaboration" : "Design teams; Cross-functional teams", "domainKnowledge" : "ASIC design; SoC architecture", "domainList" : [ "asic-design", "soc-architecture" ], "domainSpecificKnowledge" : [ "ASIC design", "SoC architecture" ], "toolProficiency" : [ "EDA tools" ], "communicationSkills" : "Technical documentation", "documentationSkills" : "Verification plans; Test results", "problemSolvingSkills" : "Root cause analysis", "outcomesObjectives" : "Achieve high verification coverage; Ensure silicon quality", "qualificationsBasic" : "5+ years experience, Bachelor's degree", "qualificationsPreferred" : "Master's degree preferred, PhD preferred", "workSiteFlexibility" : "Onsite", "summaryDescription" : "Silicon Design Verification Engineer. Skills: Design verification, RTL design, SystemVerilog, UVM. Develop verification plans. Write verification environments", "postedDate" : "2026-06-16T01:48:39.427", "createdAt" : "2026-06-16T01:48:39.427", "lastUpdated" : "2026-06-16T11:50:16.251", "ingestTimestamp" : "2026-06-16T01:48:39.427", "mongoId" : "6a210e4874d8ee00a0af6b63", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "hasSalary" : false, "allSkills" : [ "Design verification", "RTL design", "SystemVerilog", "UVM", "ASIC design", "SoC architecture", "EDA tools" ], "skillCount" : 7, "jobCategory" : "operations", "jobSubcategory" : "general", "seniorityLevel" : "Mid", "dataQualityScore" : 0.44444445, "_score" : 1073.729, "daysOld" : 0, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.0 }, { "id" : "6a307f2df292fd229c055ead", "title" : "Silicon Design Verification Engineer ll", "company" : "Google", "industry" : "Technology", "salary" : { "min" : 2500000.0, "max" : 4500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market data for a Mid-level Silicon Design Verification Engineer II at a large technology company in Bengaluru, India, adjusted for seniority and industry." }, "location" : "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]", "locations" : [ "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]" ], "timestamp" : "2026-06-16T10:47:21.154", "fingerprint" : "ea073ae23cdbd296211fcc41b91345e5b1b1fa35fc0204f4f69f91d1a08fe5d4", "source" : "google", "language" : "en", "externalId" : "86238684898042566", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "experienceMinYears" : 2, "experienceMaxYears" : 5, "experienceLevel" : "Mid", "remoteFriendly" : false, "summaryDescription" : "Silicon Design Verification Engineer ll at Google", "postedDate" : "2026-06-16T01:48:28.545", "createdAt" : "2026-06-16T01:48:28.545", "lastUpdated" : "2026-06-16T10:47:21.154", "ingestTimestamp" : "2026-06-16T01:48:28.545", "mongoId" : "6a307f2df292fd229c055ead", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.6666667, "_score" : 1037.1345, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a305b03f292fd229cf584e9", "title" : "Silicon Emulation Engineer", "company" : "Waymo", "industry" : "Technology", "salary" : { "min" : 175000.0, "max" : 215000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Mountain View, California, United States", "locations" : [ "Mountain View", "California", "United States" ], "timestamp" : "2026-06-16T07:21:35.569", "fingerprint" : "fd32fcc0842fd919e0180c0a7dbd6d78223e89d6761cd34e3cf329cc6e514780", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://careers.withwaymo.com/jobs?gh_jid=8004234", "externalId" : "8004234", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Mountain View", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "hybrid", "geo" : "37.3893889,-122.0832101" } ], "locationText" : "Mountain View, California, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor's", "experienceMinYears" : 5, "experienceMaxYears" : 5, "experienceLevel" : "Mid", "technicalSkills" : "SystemVerilog, C++, Python, TCL, QEMU, VirtualBox", "professionalSkills" : [ "System design", "Performance analysis", "Power analysis" ], "hardSkillsList" : [ "Hardware emulation", "Software development", "Testbench development", "Root cause analysis", "Infrastructure building", "Automation", "Regression testing", "Continuous integration", "Data analysis", "Bare metal programming", "Embedded systems", "Linux internals", "Operating systems", "Boot loaders", "Drivers", "Firmware" ], "hardSkills" : [ { "name" : "Hardware emulation", "level" : "intermediate" }, { "name" : "Software development", "level" : "intermediate" }, { "name" : "Testbench development", "level" : "intermediate" }, { "name" : "Root cause analysis", "level" : "intermediate" }, { "name" : "Infrastructure building", "level" : "intermediate" }, { "name" : "Automation", "level" : "intermediate" }, { "name" : "Regression testing", "level" : "intermediate" }, { "name" : "Continuous integration", "level" : "intermediate" }, { "name" : "Data analysis", "level" : "intermediate" }, { "name" : "Bare metal programming", "level" : "intermediate" }, { "name" : "Embedded systems", "level" : "intermediate" }, { "name" : "Linux internals", "level" : "intermediate" }, { "name" : "Operating systems", "level" : "intermediate" }, { "name" : "Boot loaders", "level" : "intermediate" }, { "name" : "Drivers", "level" : "intermediate" }, { "name" : "Firmware", "level" : "intermediate" } ], "majorSkills" : "Silicon emulation, Hardware/software debug, Testbench optimization", "majorSkillsList" : [ "Silicon emulation", "Hardware/software debug", "Testbench optimization" ], "coreResponsibilities" : "Collaborate with Design, Verification, Software teams, Simulate future silicon designs, Simulate software on emulation platform, Target functional validation, Target performance validation, Left-shift software development, Design emulation testbenches, Implement emulation testbenches, Optimize emulation testbenches, Write synthesizable transactors, Interact with emulated designs, Triage failures, Root-cause failures, Assist with post-silicon bring-up, Assist with debug, Assist with characterization, Build infrastructure for emulation users, Develop tools for model build, Develop tools for regression, Develop tools for automation, Develop tools for continuous integration, Develop tools for data analysis, Develop tools for training", "teamCollaboration" : "Design teams; Verification teams; Software teams; Silicon Engineering Lead", "domainKnowledge" : "Autonomous driving; Compute platforms; Automotive compute; Hardware/software co-design; Embedded systems; Linux internals; Operating systems; Bare metal programming", "domainList" : [ "autonomous-driving", "compute-platforms", "automotive-compute", "hardware-software-co-design", "embedded-systems", "linux-internals", "operating-systems", "bare-metal-programming" ], "domainSpecificKnowledge" : [ "Autonomous driving", "Compute platforms", "Automotive compute", "Hardware/software co-design", "Embedded systems", "Linux internals", "Operating systems", "Bare metal programming" ], "toolProficiency" : [ "Palladium", "Zebu", "Veloce", "Protium", "HAPS", "Trace32", "OpenOCD", "TARMAC" ], "problemSolvingSkills" : "Root-cause analysis; Debug; Problem-solving", "qualificationsBasic" : "BS degree in Computer Science / Electrical Engineering, 5 years of silicon development experience, Experience with major hardware emulation platform, High proficiency with emulation approaches, Experience with SystemVerilog, Experience with design verification methodologies, Programming and scripting for automation, Debug and problem-solving ability", "qualificationsPreferred" : "Experience with AXI/AMBA, Experience with PCIe, Experience with DRAM, Experience with Ethernet interfaces, Performance and power analysis techniques, Experience with JTAG, Experience with DFT, Experience with UART, Experience with SPI, Experience with GPIO, Experience with test/low-speed interfaces, Knowledge of advanced design verification methods, Post-silicon debug software experience, Lab bench tools experience, Understanding of bare metal programming, Understanding of embedded systems, Understanding of Linux internals, Understanding of operating systems, Understanding of boot loaders, Understanding of drivers, Understanding of firmware", "remoteFriendly" : true, "workSiteFlexibility" : "Hybrid", "rawDescription" : "Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo’s fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U. S. states. Waymo's Compute Team is tasked with a critical and exciting mission: We deliver the compute platform responsible for running the fully autonomous vehicle’s software stack. To achieve our mission, we architect and create high-performance custom silicon; we develop system-level compute architectures that push the boundaries of performance, power, and latency; and we collaborate closely with many other teammates to ensure we design and optimize hardware and software for maximum performance. We are a multidisciplinary team seeking curious and talented teammates to work on one of the world’s highest performance automotive compute platforms. This role follows a hybrid work schedule and you will report to a Silicon Engineering Lead. You will: Collaborate with the Design, Verification, and Software teams to simulate future silicon designs and software on an emulation platform, targeting functional and performance validation and left-shift of software development Design, implement, and optimize emulation testbenches, balancing performance and debug capabilities based on user needs and hardware constraints Write end-to-end synthesizable transactors to interact with emulated designs through software APIs and C-DPI Triage and root-cause failures alongside emulation users, leveraging waveforms, software logging, and custom-built emulation monitors Assist with post-silicon bring-up, debug, and characterization Build infrastructure to support the emulation user base, including tools for model build, regression, automation, continuous integration, data analysis, and training You have: BS degree in Computer Science / Electrical Engineering or related field and 5 years of silicon development experience. Experience with at least one major hardware emulation platform (Palladium, Zebu, Veloce, Protium, HAPS). High level of proficiency with one or more of the following emulation approaches: virtual prototyping, testbench acceleration, hybrid emulation, in-circuit emulation (speed bridge), QEMU, or VirtualBox Experience with SystemVerilog and design verification methodologies Programming and scripting (C++, Python, or TCL) for automation, test development, debug flows, and release process. Strong debug and problem-solving ability across hardware and software We prefer: Experience with AXI/AMBA, PCIe, DRAM, and Ethernet interfaces Performance and power analysis techniques Experience with JTAG, DFT, UART, SPI, GPIO and other test/low-speed interfaces Knowledge of advanced design verification methods (coverage, gate-level simulation, assertions, and UVM). Post-silicon debug software (e. g. Trace32, OpenOCD, TARMAC) and lab bench tools (analyzers, scopes, meters) Understanding of bare metal programming, embedded systems, Linux internals, operating systems, boot loaders, drivers, and firmware The expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range $175,000—$215,000 USD", "summaryDescription" : "Silicon Emulation Engineer at Waymo. Skills: Silicon emulation, Hardware/software debug, Testbench optimization. Collaborate with Design, Verification, Software teams. Simulate future silicon designs", "postedDate" : "2026-06-15T23:20:52.716", "createdAt" : "2026-06-15T23:20:52.716", "lastUpdated" : "2026-06-16T07:21:35.569", "ingestTimestamp" : "2026-06-15T23:20:52.716", "mongoId" : "6a305b03f292fd229cf584e9", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 175000, "salaryAnnualMax" : 215000, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "Hardware emulation", "Software development", "Testbench development", "Root cause analysis", "Infrastructure building", "Automation", "Regression testing", "Continuous integration", "Data analysis", "Bare metal programming", "Embedded systems", "Linux internals", "Operating systems", "Boot loaders", "Drivers", "Firmware", "Silicon emulation", "Hardware/software debug", "Testbench optimization", "System design", "Performance analysis", "Power analysis", "Autonomous driving", "Compute platforms", "Automotive compute", "Hardware/software co-design", "Palladium", "Zebu", "Veloce", "Protium", "HAPS", "Trace32", "OpenOCD", "TARMAC" ], "skillCount" : 34, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 1.0, "_score" : 1012.9562, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a307f55f292fd229c0580b8", "title" : "Senior Software Engineer, System Acceleration, Silicon", "industry" : "Technology", "salary" : { "min" : 1750000.0, "max" : 2500000.0, "currency" : "TWD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior Software Engineer in New Taipei City, Taiwan, adjusted for the technology industry and senior experience level." }, "location" : "[New Taipei, Banqiao District, New Taipei City, Taiwan, [Banqiao District, New Taipei City, Taiwan 220], null, 220, New Taipei City, TW]", "locations" : [ "[New Taipei, Banqiao District, New Taipei City, Taiwan, [Banqiao District, New Taipei City, Taiwan 220], null, 220, New Taipei City, TW]" ], "timestamp" : "2026-06-16T11:48:01.613", "fingerprint" : "526dbdc103c383edb21e878c979fea585a1c4ae0676bfbd801fdddf98613a4c4", "source" : "google", "language" : "en", "externalId" : "95806293633049286", "industryFunction" : { }, "structuredLocations" : [ { "city" : "New Taipei City", "country" : "Taiwan", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "25.0834547,121.4755340" } ], "locationText" : "New Taipei City, Taiwan", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "summaryDescription" : "Senior Software Engineer, System Acceleration, Silicon", "postedDate" : "2026-06-16T01:49:47.552", "createdAt" : "2026-06-16T01:49:47.552", "lastUpdated" : "2026-06-16T11:48:01.613", "ingestTimestamp" : "2026-06-16T01:49:47.552", "mongoId" : "6a307f55f292fd229c0580b8", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.5555556, "_score" : 968.44556, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "69fda4e34c40e2acd1b99769", "title" : "Audio System Development Engineer, Silicon and Systems Group", "company" : "Amazon Lab126", "industry" : "Software Development, System Development Engineering, alexa and amazon devices", "salary" : { "min" : 2200000.0, "max" : 3500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market data for a Mid-level Audio System Development Engineer in Bengaluru, India, adjusted for the technology industry and a large company size." }, "location" : "Bengaluru, Karnataka, IND", "locations" : [ "Bengaluru, Karnataka, IND" ], "timestamp" : "2026-06-15T01:26:30.659", "fingerprint" : "9261830f75840ccd3a8de980df9ec757e5d682bbfe8ddfc04a306b478a4f1cb8", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.jobs/jobs/10413592/apply", "externalId" : "767d6de0-f69c-44b4-b183-e9fe2e5fd49b", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor's", "experienceMinYears" : 3, "experienceMaxYears" : 5, "experienceLevel" : "Mid", "technicalSkills" : "ALSA, Pulse Audio, Android, QNX, ARM, DSP, Linux, Bare metal", "professionalSkills" : [ "System architects", "Program managers", "Hardware engineers" ], "hardSkillsList" : [ "Audio software development", "Embedded firmware development", "Real-time embedded firmware", "Embedded Linux software", "Audio features implementation", "Audio software optimization", "Porting audio algorithms", "Porting speech algorithms", "Audio performance tuning", "Noise reduction tuning" ], "hardSkills" : [ { "name" : "Audio software development", "level" : "intermediate" }, { "name" : "Embedded firmware development", "level" : "intermediate" }, { "name" : "Real-time embedded firmware", "level" : "intermediate" }, { "name" : "Embedded Linux software", "level" : "intermediate" }, { "name" : "Audio features implementation", "level" : "intermediate" }, { "name" : "Audio software optimization", "level" : "intermediate" }, { "name" : "Porting audio algorithms", "level" : "intermediate" }, { "name" : "Porting speech algorithms", "level" : "intermediate" }, { "name" : "Audio performance tuning", "level" : "intermediate" }, { "name" : "Noise reduction tuning", "level" : "intermediate" } ], "majorSkills" : "Embedded systems, Audio software, Linux kernel drivers, DSP architectures", "majorSkillsList" : [ "Embedded systems", "Audio software", "Linux kernel drivers", "DSP architectures" ], "coreResponsibilities" : "Design devices, Develop devices, Integrate devices, Design embedded firmware, Implement embedded firmware, Troubleshoot kernel drivers, Fix kernel drivers, Develop Audio SW, Develop BSP, Develop real-time embedded firmware, Develop embedded Linux software, Implement audio features, Develop audio software, Optimize audio algorithms, Port audio algorithms, Optimize speech algorithms, Port speech algorithms, Integrate vendor hardware, Integrate vendor software stacks, Tune hardware for audio performance, Tune hardware for noise reduction", "teamCollaboration" : "Work with customers; Work with system architects; Work with program managers; Work with hardware engineers", "domainKnowledge" : "Audio software stack; Audio/Video Sync; STB audio systems; DTV audio systems; Embedded systems; Real-time embedded firmware; Embedded Linux; ARM architectures; DSP architectures; Proprietary OS", "domainList" : [ "audio-software-stack", "audio-video-sync", "stb-audio-systems", "dtv-audio-systems", "embedded-systems", "real-time-embedded-firmware", "embedded-linux", "arm-architectures", "dsp-architectures", "proprietary-os" ], "domainSpecificKnowledge" : [ "Audio software stack", "Audio/Video Sync", "STB audio systems", "DTV audio systems", "Embedded systems", "Real-time embedded firmware", "Embedded Linux", "ARM architectures", "DSP architectures", "Proprietary OS" ], "toolProficiency" : [ "Oscilloscope", "Logic Analyzer", "Audio Precision" ], "innovationCreativity" : "Inventive research; Design and engineer consumer electronics; Ground-breaking devices", "problemSolvingSkills" : "Troubleshoot; Fix kernel drivers", "qualificationsBasic" : "Bachelor's degree, 3+ years software development experience, Experience with embedded systems", "qualificationsPreferred" : "Master's degree in computer science, Experience working on Audio software, DSP experience, ARM experience, Linux driver development experience, Android platform development experience", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Amazon Lab126 is an inventive research and development company that designs and engineer’s high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced ground-breaking devices like Fire tablets, Fire TV and Amazon Echo. Work hard. Have fun. Make history. We are looking for an Embedded System Development Engineer- to help design, develop, integrate our next generation devices. In this role you will work with customers, system architects, program managers and hardware engineers to design, implement, troubleshoot, fix kernel drivers, Audio SW, BSP for our next generation devices. You will be responsible for the development of real-time embedded firmware and embedded Linux software that implements audio features. Key job responsibilities If you have one or more of the below skills, then this job is for you: - Expertise in ALSA / Pulse Audio - Exposure to Audio software stack on Android/QNX/proprietary OS including Audio Flinger, Audio HAL - Exposure to ARM, DSP architectures - Exposure to Dolby MS12 / DTS/ MPEG-TS - Exposure to Audio/Video Sync - Exposure to STB / DTV audio systems - Working knowledge of Oscilloscope, Logic Analyzer, and Audio Tools including Audio Precision Key job responsibilities In this role, you will: - Develop audio software that runs on ARM/DSP using Bare metal, Linux and other high level OSes - Optimization and porting audio and speech processing algorithms - Integration of vendor hardware and software stacks - Tune hardware for highest audio performance and lowest noise About the team Amazon Lab126 is an inventive research and development company that designs and engineer’s high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced ground-breaking devices like Fire tablets, Fire TV and Amazon Echo. Basic Qualifications: - Bachelor's degree - 3+ years of non-internship professional software development experience - Experience with embedded systems Preferred Qualifications: - Master's degree in computer science or equivalent - Experience working on Audio software, DSP, ARM, Linux driver development, Android platform development Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "Audio System Development Engineer, Silicon and Systems Group at Amazon Lab126. Skills: Embedded systems, Audio software, Linux kernel drivers, DSP architectures. Design devices. Develop devices", "postedDate" : "2026-06-13T03:14:26.337", "createdAt" : "2026-06-13T03:14:26.337", "lastUpdated" : "2026-06-15T01:26:30.659", "ingestTimestamp" : "2026-06-13T03:14:26.337", "mongoId" : "69fda4e34c40e2acd1b99769", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.jobs/jobs/10413592/apply", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Audio software development", "Embedded firmware development", "Real-time embedded firmware", "Embedded Linux software", "Audio features implementation", "Audio software optimization", "Porting audio algorithms", "Porting speech algorithms", "Audio performance tuning", "Noise reduction tuning", "Embedded systems", "Audio software", "Linux kernel drivers", "DSP architectures", "System architects", "Program managers", "Hardware engineers", "Audio software stack", "Audio/Video Sync", "STB audio systems", "DTV audio systems", "Embedded Linux", "ARM architectures", "Proprietary OS", "Oscilloscope", "Logic Analyzer", "Audio Precision" ], "skillCount" : 27, "jobCategory" : "engineering", "dataQualityScore" : 1.0, "_score" : 946.77325, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true }, { "id" : "6a307f98f292fd229c05b1ef", "title" : "Senior Physical Design Engineer, Cloud Silicon", "industry" : "Technology", "salary" : { "min" : 2500000.0, "max" : 4500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market data for Senior Physical Design Engineer, Cloud Silicon in Bengaluru, India, adjusted for seniority and industry." }, "location" : "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]", "locations" : [ "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]" ], "timestamp" : "2026-06-16T12:05:10.670", "fingerprint" : "d100aa281c0e739cc3acb367760fe65865c2a4474e29dfd17e25974275ca7539", "source" : "google", "language" : "en", "externalId" : "91250802210808518", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "summaryDescription" : "Senior Physical Design Engineer, Cloud Silicon", "postedDate" : "2026-06-16T01:52:10.957", "createdAt" : "2026-06-16T01:52:10.957", "lastUpdated" : "2026-06-16T12:05:10.670", "ingestTimestamp" : "2026-06-16T01:52:10.957", "mongoId" : "6a307f98f292fd229c05b1ef", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.5555556, "_score" : 944.7191, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a307f5ff292fd229c05887c", "title" : "Senior Silicon Physical Design STA Engineer", "industry" : "Technology", "salary" : { "min" : 2500000.0, "max" : 4500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Senior Silicon Physical Design STA Engineer in Bengaluru, India, adjusted for seniority and industry." }, "location" : "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]", "locations" : [ "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]" ], "timestamp" : "2026-06-16T08:51:42.265", "fingerprint" : "baef068bb83f0d3f7a6eea7cb0cda8534e0dadb33c13784b235b4b1cb42d04de", "source" : "google", "language" : "en", "externalId" : "95720866733531846", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "remoteFriendly" : false, "summaryDescription" : "Senior Silicon Physical Design STA Engineer", "postedDate" : "2026-06-16T01:49:06.361", "createdAt" : "2026-06-16T01:49:06.361", "lastUpdated" : "2026-06-16T08:51:42.265", "ingestTimestamp" : "2026-06-16T01:49:06.361", "mongoId" : "6a307f5ff292fd229c05887c", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.5555556, "_score" : 944.5442, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a307f9df292fd229c05b53f", "title" : "Silicon Design Verification Engineer, Google Cloud", "company" : "Google", "industry" : "Technology", "salary" : { "min" : 2500000.0, "max" : 4500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market data for a Mid-level Silicon Design Verification Engineer in Bengaluru, India, adjusted for Google's size and industry." }, "location" : "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]", "locations" : [ "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]" ], "timestamp" : "2026-06-16T12:15:40.968", "fingerprint" : "17d4b07e04d687ec9dfc4c8e00b5c12ee16eaa1e389e55bddac1e04f9d1e8f9c", "source" : "google", "language" : "en", "externalId" : "89680811275494086", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "remoteFriendly" : false, "summaryDescription" : "Silicon Design Verification Engineer, Google Cloud at Google", "postedDate" : "2026-06-16T01:50:47.892", "createdAt" : "2026-06-16T01:50:47.892", "lastUpdated" : "2026-06-16T12:15:40.968", "ingestTimestamp" : "2026-06-16T01:50:47.892", "mongoId" : "6a307f9df292fd229c05b53f", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.5555556, "_score" : 940.50635, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a307f59f292fd229c05838b", "title" : "Senior Silicon DFT Engineer", "company" : "Google", "industry" : "Technology", "salary" : { "min" : 450000.0, "max" : 750000.0, "currency" : "ILS", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Senior Silicon DFT Engineer in Tel Aviv, Israel, adjusted for Google's industry and size, and senior experience level." }, "location" : "[Tel Aviv, Israel, [Yigal Alon St 98, Tel Aviv-Yafo, Israel], Tel Aviv-Yafo, null, Tel Aviv District, IL]", "locations" : [ "[Tel Aviv, Israel, [Yigal Alon St 98, Tel Aviv-Yafo, Israel], Tel Aviv-Yafo, null, Tel Aviv District, IL]", "[Haifa, Israel, [Haifa, Israel], Haifa, null, Haifa District, IL]" ], "timestamp" : "2026-06-16T13:56:53.371", "fingerprint" : "693e959583b6dd3068e693d783a49b672f81582ea304c2fbe95612d29bc416aa", "source" : "google", "language" : "en", "externalId" : "113854278786785990", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Tel Aviv", "country" : "Israel", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "32.0852997,34.7818064" } ], "locationText" : "Tel Aviv, Israel", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "DFT, Scan chains, Boundary scan, Test patterns, ATPG, Memory BIST, Logic BIST, Scan compression, SoC, ASIC, Verilog, VHDL, SystemVerilog, Python, Shell scripting, Perl, Tcl", "professionalSkills" : [ "Silicon validation", "Chip design", "Test development" ], "hardSkillsList" : [ "DFT methodologies", "Test pattern generation", "Scan insertion", "BIST implementation", "Compression techniques" ], "hardSkills" : [ { "name" : "DFT methodologies", "level" : "intermediate" }, { "name" : "Test pattern generation", "level" : "intermediate" }, { "name" : "Scan insertion", "level" : "intermediate" }, { "name" : "BIST implementation", "level" : "intermediate" }, { "name" : "Compression techniques", "level" : "intermediate" } ], "majorSkills" : "DFT, Silicon validation, SoC design", "majorSkillsList" : [ "DFT", "Silicon validation", "SoC design" ], "coreResponsibilities" : "Design and implement DFT structures, Develop scan chains, Implement boundary scan, Generate test patterns, Perform ATPG, Implement memory BIST, Implement logic BIST, Develop scan compression, Support SoC and ASIC design, Collaborate with design teams, Debug DFT issues, Validate DFT implementation, Work with cloud technologies, Work with AI/ML", "teamCollaboration" : "Design teams; Cross-functional teams", "domainKnowledge" : "DFT; SoC; ASIC; Semiconductor industry", "domainList" : [ "dft", "soc", "asic", "semiconductor-industry" ], "domainSpecificKnowledge" : [ "DFT", "SoC", "ASIC", "Semiconductor industry" ], "toolProficiency" : [ "Cadence", "Synopsys", "Mentor Graphics" ], "documentationSkills" : "Technical documentation", "problemSolvingSkills" : "Debug DFT issues; Root cause analysis", "qualificationsBasic" : "5+ years DFT experience, BS/MS degree", "qualificationsPreferred" : "Experience with cloud technologies, Experience with AI/ML", "workSiteFlexibility" : "Onsite", "summaryDescription" : "Senior Silicon DFT Engineer at Google. Skills: DFT, Silicon validation, SoC design. Design and implement DFT structures. Develop scan chains", "postedDate" : "2026-06-16T01:51:54.593", "createdAt" : "2026-06-16T01:51:54.593", "lastUpdated" : "2026-06-16T13:56:53.371", "ingestTimestamp" : "2026-06-16T01:51:54.593", "mongoId" : "6a307f59f292fd229c05838b", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "DFT methodologies", "Test pattern generation", "Scan insertion", "BIST implementation", "Compression techniques", "DFT", "Silicon validation", "SoC design", "Chip design", "Test development", "SoC", "ASIC", "Semiconductor industry", "Cadence", "Synopsys", "Mentor Graphics" ], "skillCount" : 16, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.7777778, "_score" : 912.5666, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a307f0ff292fd229c054d87", "title" : "ASIC Digital Design Engineer II, Silicon Engineering", "salary" : { "min" : 1500000.0, "max" : 2500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level ASIC Digital Design Engineer II in Bengaluru, India, adjusted for junior seniority and the technology industry." }, "location" : "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]", "locations" : [ "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]" ], "timestamp" : "2026-06-16T13:54:47.479", "fingerprint" : "2ecc3608c118362ad239e3b34577ec9617c62ae40d66399eb245225548e9594c", "source" : "google", "language" : "en", "externalId" : "140959387895112390", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "experienceMinYears" : 2, "experienceMaxYears" : 5, "experienceLevel" : "Mid", "remoteFriendly" : false, "summaryDescription" : "ASIC Digital Design Engineer II, Silicon Engineering", "postedDate" : "2026-06-16T01:49:51.836", "createdAt" : "2026-06-16T01:49:51.836", "lastUpdated" : "2026-06-16T13:54:47.479", "ingestTimestamp" : "2026-06-16T01:49:51.836", "mongoId" : "6a307f0ff292fd229c054d87", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Junior", "dataQualityScore" : 0.5555556, "_score" : 909.07495, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a307f39f292fd229c0565f1", "title" : "Senior Silicon Design Verification Engineer, Google Cloud", "company" : "Google", "industry" : "Technology", "salary" : { "min" : 4500000.0, "max" : 7500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Senior Silicon Design Verification Engineer in Bengaluru, India, adjusted for Google's size and industry, reflecting 2024-2025 data." }, "location" : "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]", "locations" : [ "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]" ], "timestamp" : "2026-06-16T14:40:36.494", "fingerprint" : "b3601dd52aea2086e71422ef7681f40d9bb0ee03ca550111c1f3d51f0fa25f0c", "source" : "google", "language" : "en", "externalId" : "111501109154980550", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "remoteFriendly" : false, "summaryDescription" : "Senior Silicon Design Verification Engineer, Google Cloud at Google", "postedDate" : "2026-06-16T01:48:30.394", "createdAt" : "2026-06-16T01:48:30.394", "lastUpdated" : "2026-06-16T14:40:36.494", "ingestTimestamp" : "2026-06-16T01:48:30.394", "mongoId" : "6a307f39f292fd229c0565f1", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.6666667, "_score" : 891.8862, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a210e2a74d8ee00a0af603c", "title" : "Staff Silicon Physical Design Engineer, Quantum AI", "industry" : "Technology", "salary" : { "min" : 220000.0, "max" : 320000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Staff Silicon Physical Design Engineer in Mountain View, USA, adjusted for lead seniority and the technology industry." }, "location" : "[Mountain View, CA, USA, [100 Bay Vw Dr, Mountain View, CA 94043, USA], Mountain View, 94043, CA, US]", "locations" : [ "[Mountain View, CA, USA, [100 Bay Vw Dr, Mountain View, CA 94043, USA], Mountain View, 94043, CA, US]", "[Goleta, CA, USA, [Goleta, CA, USA], Goleta, null, CA, US]" ], "timestamp" : "2026-06-16T11:19:47.865", "fingerprint" : "01de68b61fb9a89b022bc3366ddadfe921fdcb679067f7733500242d0a004ca5", "source" : "google", "language" : "en", "externalId" : "129450915651297990", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Mountain View", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.3893889,-122.0832101" } ], "locationText" : "Mountain View, California, United States", "experienceMinYears" : 8, "experienceMaxYears" : 15, "experienceLevel" : "Staff", "summaryDescription" : "Staff Silicon Physical Design Engineer, Quantum AI", "postedDate" : "2026-06-16T01:48:20.326", "createdAt" : "2026-06-16T01:48:20.326", "lastUpdated" : "2026-06-16T11:19:47.865", "ingestTimestamp" : "2026-06-16T01:48:20.326", "mongoId" : "6a210e2a74d8ee00a0af603c", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 220000, "salaryAnnualMax" : 320000, "salaryBand" : "200k+", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Lead", "dataQualityScore" : 0.5555556, "_score" : 878.77795, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "69cf3f072beec4dd3d9341df", "title" : "FPGA Prototyping Engineer, Silicon and Systems Group", "company" : "ADCI", "industry" : "Hardware Development, ASIC, alexa and amazon devices", "salary" : { "min" : 2500000.0, "max" : 4000000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior FPGA Prototyping Engineer in Bengaluru, India, adjusted for the technology industry and company size." }, "location" : "Bengaluru, Karnataka, IND", "locations" : [ "Bengaluru, Karnataka, IND" ], "timestamp" : "2026-06-14T23:56:43.374", "fingerprint" : "8992f7084c54084b7e5c5f05879ca06582cb7ebca5a385b1a7cd4b864804086f", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/10381865/apply", "externalId" : "54df4afb-88de-4cee-bc7a-dee05f72dd19", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor's", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "C/C++, Python, Java, Perl, ARM, DSP ISA", "professionalSkills" : [ "System prototyping", "Hardware design", "Software engineering" ], "hardSkillsList" : [ "Embedded development", "Hardware debugging", "FPGA design", "ASIC prototyping" ], "hardSkills" : [ { "name" : "Embedded development", "level" : "intermediate" }, { "name" : "Hardware debugging", "level" : "intermediate" }, { "name" : "FPGA design", "level" : "intermediate" }, { "name" : "ASIC prototyping", "level" : "intermediate" } ], "majorSkills" : "FPGA prototyping, Hardware design, Embedded development", "majorSkillsList" : [ "FPGA prototyping", "Hardware design", "Embedded development" ], "coreResponsibilities" : "Define FPGA bring up environment, Participate in design, Participate in verification, Participate in bring-up of IPs, Write relevant scripts, Debug code, Debug test benches, Debug test harnesses, Interact with extended team, Responsible for lab bring-up, Architect FPGA solutions, Implement FPGA solutions, Create verification of IP's, Enhance verification of IP's, Identify all types tests, Write all types tests, Debug tests with design engineers", "teamCollaboration" : "Multi-disciplinary groups; Extended team; Product Design; Audio Technology; Computer Vision; Hardware Engineering; Software Engineering", "domainKnowledge" : "ASIC prototyping; FPGA design; Embedded systems; Consumer electronics; Hardware devices", "domainList" : [ "asic-prototyping", "fpga-design", "embedded-systems", "consumer-electronics", "hardware-devices" ], "domainSpecificKnowledge" : [ "ASIC prototyping", "FPGA design", "Embedded systems", "Consumer electronics", "Hardware devices" ], "toolProficiency" : [ "Synopsys HAPS" ], "innovationCreativity" : "Exploring new hardware designs", "problemSolvingSkills" : "Troubleshooting; Debugging", "outcomesObjectives" : "Deliver IP's in FPGA platforms; Deliver functionally correct design blocks", "qualificationsBasic" : "Bachelor's degree in Electrical Engineering, Experience in embedded development in C/C++, Experience with general troubleshooting/debugging of hardware, Experience with FPGA build flows, Experience in prototype bring-up, Hardware debug skills", "qualificationsPreferred" : "Master's degree in Electrical or Communications Engineering, 5+ years FPGA design or FPGA-based ASIC prototyping, Experience with ASIC prototyping on FPGAs", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "The Amazon Devices team designs and engineers high-profile consumer electronics, including the best-selling Kindle family of products. We have also produced ground-breaking devices like Fire tablets, Fire TV, and Amazon Echo, and the Astro personal robot. What will you help us create? As an FPGA Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve our devices. In this role, you will be responsible for defining the FPGA bring up environment for ASIC and system prototyping. You will participate in the design, verification and bring-up of IPs in FPGA by writing relevant scripts, debugging code, test benches, test harnesses, and otherwise interacting with the extended team. You will responsible for the lab bring-up of these blocks. You will work closely with multi-disciplinary groups including Product Design, Audio Technology, Computer Vision, Hardware Engineering, and Software Engineering, to architect and implement FPGA solutions that enable development of world-class hardware devices. Key job responsibilities • Design world class hardware and software • Communicate and work with team members across multiple disciplines • Deliver IP's in FPGA platforms for software teams • Create and enhance verification of these IP's by leveraging the FPGA environment • Identify and write all types tests for stimulus and corner-cases • Debug tests with design engineers to deliver functionally correct design blocks Basic Qualifications: - Bachelor's degree in Electrical Engineering or a related field - Experience in embedded development in C/C++, or experience with general troubleshooting/debugging of hardware - Experience with FPGA build flows - Experience in prototype bring-up with strong hardware debug skills Preferred Qualifications: - Master's degree in Electrical or Communications Engineering or a related field - Knowledge of programming languages such as C/C++, Python, Java or Perl - 5+ years or more of FPGA design or FPGA-based ASIC prototyping - Experience with ARM and various DSP ISA - Experience with industry standard I/O interfaces - Experience with ASIC prototyping on FPGAs - Experience with Synopsys HAPS Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "FPGA Prototyping Engineer, Silicon and Systems Group at ADCI. Skills: FPGA prototyping, Hardware design, Embedded development. Define FPGA bring up environment. Participate in design", "postedDate" : "2026-06-13T04:58:48.815", "createdAt" : "2026-06-13T04:58:48.815", "lastUpdated" : "2026-06-14T23:56:43.374", "ingestTimestamp" : "2026-06-13T04:58:48.815", "mongoId" : "69cf3f072beec4dd3d9341df", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/10381865/apply", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Embedded development", "Hardware debugging", "FPGA design", "ASIC prototyping", "FPGA prototyping", "Hardware design", "System prototyping", "Software engineering", "Embedded systems", "Consumer electronics", "Hardware devices", "Synopsys HAPS" ], "skillCount" : 12, "jobCategory" : "other", "dataQualityScore" : 1.0, "_score" : 878.42676, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Consumer Electronics" }, { "id" : "6a3051a1f292fd229cf03978", "title" : "Photonics Design Engineer", "company" : "Lightmatter", "industry" : "Technology", "salary" : { "min" : 200000.0, "max" : 225000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Boston, MA", "locations" : [ "Boston", "MA", "Mountain View", "CA", "Toronto", "ON" ], "timestamp" : "2026-06-16T08:02:54.267", "fingerprint" : "f926b9bc7b9c6229cbe3477a08d6e5033ccbc8b788e6b0d9d8f69db1abc7f3b5", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://boards.greenhouse.io/lightmatter/jobs/5254961008?gh_jid=5254961008", "externalId" : "5254961008", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Boston", "state" : "Massachusetts", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "42.3588336,-71.0578303" } ], "locationText" : "Boston, Massachusetts, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 8, "experienceMaxYears" : 15, "experienceLevel" : "Staff", "technicalSkills" : "Python, Lumerical, Tidy3D, SOAs", "professionalSkills" : [ "Device design", "Device layout", "Device testing", "Data analysis", "Problem solving" ], "hardSkillsList" : [ "Silicon photonics", "Integrated photonics", "Laser systems", "Data analysis" ], "hardSkills" : [ { "name" : "Silicon photonics", "level" : "intermediate" }, { "name" : "Integrated photonics", "level" : "intermediate" }, { "name" : "Laser systems", "level" : "intermediate" }, { "name" : "Data analysis", "level" : "intermediate" } ], "majorSkills" : "Silicon photonics, Device design, Laser systems", "majorSkillsList" : [ "Silicon photonics", "Device design", "Laser systems" ], "coreResponsibilities" : "Design silicon photonic devices, Optimize silicon photonic devices, Layout device test structures, Layout complex integrated photonic systems, Develop test plans, Execute test plans, Analyze test results, Assess device performance, Troubleshoot device issues, Address integration challenges, Implement simulation methodologies, Implement modeling methodologies, Implement testing methodologies, Calibrate designs, Optimize performance, Engage in problem solving, Contribute to new device designs, Contribute to new device architectures, Publish photonics results, Participate in optics/photonics conferences", "teamCollaboration" : "Cross-functional teams; Photonics teams; Packaging teams; Systems teams; Software teams; Multidisciplinary teams", "domainKnowledge" : "Silicon photonics; Integrated photonics; Laser systems; AI data center infrastructure; HPC workloads", "domainList" : [ "silicon-photonics", "integrated-photonics", "laser-systems", "ai-data-center-infrastructure", "hpc-workloads" ], "domainSpecificKnowledge" : [ "Silicon photonics", "Integrated photonics", "Laser systems", "AI data center infrastructure", "HPC workloads" ], "toolProficiency" : [ "Lumerical", "Tidy3D", "Python" ], "communicationSkills" : "Excellent communication; Technical communication", "innovationCreativity" : "Build innovative laser solutions; Tackle groundbreaking challenges", "problemSolvingSkills" : "Problem solving skills; Troubleshoot issues", "qualificationsBasic" : "PhD in Electrical Engineering, Physics, Photonics, or related discipline, 3 years of industry experience, Silicon photonics device design, layout, and testing experience, Integrated silicon photonics components design experience, Modeling and data analysis in Python experience, Experience with integrated lasers, SOAs, Excellent communication skills, Demonstrated ability to collaborate effectively with multidisciplinary teams, Demonstrate problem solving skills", "qualificationsPreferred" : "Layout experience with foundry PDKs, Code-based GDS creation experience, Experience with optical and electronic test equipment, Wafer-level testing experience, Statistical data analysis experience, Project execution skills, Ability to handle multiple priorities, Ability to meet project milestones", "remoteFriendly" : true, "workSiteFlexibility" : "Hybrid", "rawDescription" : "Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter! If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders. Lightmatter is (re)inventing the future of computing with light! We are hiring a Photonics Design Engineer to join our development team. In this role, you will design, layout, and test silicon photonics devices for an integrated and scalable laser system.You will collaborate closely with cross-functional teams including photonics, packaging, systems, and software to define and refine specifications, ensuring that all designs meet or exceed performance targets and align with product requirements. Join a tight-knit team where each individual’s contributions directly influence the success of the company and product. You'll have the opportunity to build innovative laser solutions from the ground up and tackle groundbreaking challenges. Work with people who love to build and who thrive in diverse technical environments where great ideas are prioritized. Key Responsibilities: Design and optimize silicon photonic devices for laser systems, including couplers, muxes, rings, switches, and other active and passive components. Layout device test structures as well as complex integrated photonic systems. Work with the characterization team to develop and execute test plans for device validation, analyzing results to assess performance and troubleshoot issues. Work closely with packaging and systems engineering teams to address integration challenges, ensuring high alignment between device and system requirements. Implement rigorous simulation, modeling, and testing methodologies to calibrate designs and optimize performance across manufacturing variability. Engage in problem solving and contribute to new device designs and architectures. Publish novel photonics results, and participate in premier optics/photonics conferences. Required Qualifications: PhD in Electrical Engineering, Physics, Photonics, or related discipline with 3 years of industry experience Experience in silicon photonics device design, layout, and testing, ideally in a product development environment Demonstrated track record of designing integrated silicon photonics components using Lumerical, Tidy3D, or equivalent Proficiency in modeling and data analysis in Python Experience with integrated lasers, SOAs Excellent communication skills, with a demonstrated ability to collaborate effectively with multidisciplinary teams Demonstrate strong problem solving skills in problems that do not have obvious solutions Can-do, positive attitude Preferred Qualifications: Experience doing layout with foundry PDKs Experience with code-based GDS creation such as GDS Factory or similar Experience with optical and electronic test equipment, wafer-level testing and statistical data analysis (e.g., optical spectrum analyzers, tunable lasers, OBR/OVA, oscilloscopes, BERT). Strong project execution skills, with the ability to handle multiple priorities and meet project milestones. We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data. Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution. $200,000—$225,000 USD Benefits Comprehensive Health Care Plan (Medical, Dental & Vision) Retirement Savings Matching Program Life Insurance (Basic, Voluntary & AD&D) Generous Time Off (Vacation, Sick & Public Holidays) Paid Family Leave Short Term & Long Term Disability Training & Development Commuter Benefits Flexible, hybrid workplace model Equity grants (applicable to full-time employees) Benefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law. Export Control Candidates should have capacity to comply with the federally mandated requirements of U. S. export control laws.", "summaryDescription" : "Photonics Design Engineer at Lightmatter. Skills: Silicon photonics, Device design, Laser systems. Design silicon photonic devices. Optimize silicon photonic devices", "postedDate" : "2026-06-15T23:20:13.535", "createdAt" : "2026-06-15T23:20:13.535", "lastUpdated" : "2026-06-16T08:02:54.267", "ingestTimestamp" : "2026-06-15T23:20:13.535", "mongoId" : "6a3051a1f292fd229cf03978", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 200000, "salaryAnnualMax" : 225000, "salaryBand" : "200k+", "hasSalary" : true, "allSkills" : [ "Silicon photonics", "Integrated photonics", "Laser systems", "Data analysis", "Device design", "Device layout", "Device testing", "Problem solving", "AI data center infrastructure", "HPC workloads", "Lumerical", "Tidy3D", "Python" ], "skillCount" : 13, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Lead", "dataQualityScore" : 1.0, "_score" : 853.9555, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "69fda4e34c40e2acd1b9976a", "title" : "SDE-Audio, Silicon and Systems Group", "company" : "Amazon Lab126", "industry" : "Hardware Development, Software Development, alexa and amazon devices", "salary" : { "min" : 2500000.0, "max" : 4000000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level SDE-Audio in Bengaluru, India, adjusted for the technology industry and a large company size." }, "location" : "Bengaluru, Karnataka, IND", "locations" : [ "Bengaluru, Karnataka, IND" ], "timestamp" : "2026-06-15T03:30:05.770", "fingerprint" : "22a11d7d5113a56ced36d51f93fc4f70e4fd6bc53e36714b83c4c5ef1e05573a", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.jobs/jobs/10413591/apply", "externalId" : "c8ed11ac-4ea6-4dca-8109-7727ef8bc140", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor's", "experienceMinYears" : 3, "experienceMaxYears" : 5, "experienceLevel" : "Mid", "technicalSkills" : "ALSA, Pulse Audio, Audio software stack, Android, QNX, ARM, DSP, Dolby MS12, DTS, MPEG-TS, Audio/Video Sync, STB audio systems, DTV audio systems, Bare metal, Embedded Linux, Audio processing algorithms, Speech processing algorithms", "professionalSkills" : [ "System design", "Embedded software development" ], "hardSkillsList" : [ "Kernel driver development", "Real-time firmware development", "Audio software development", "DSP architecture", "ARM architecture", "Audio tuning", "Algorithm optimization", "Algorithm porting" ], "hardSkills" : [ { "name" : "Kernel driver development", "level" : "intermediate" }, { "name" : "Real-time firmware development", "level" : "intermediate" }, { "name" : "Audio software development", "level" : "intermediate" }, { "name" : "DSP architecture", "level" : "intermediate" }, { "name" : "ARM architecture", "level" : "intermediate" }, { "name" : "Audio tuning", "level" : "intermediate" }, { "name" : "Algorithm optimization", "level" : "intermediate" }, { "name" : "Algorithm porting", "level" : "intermediate" } ], "majorSkills" : "Embedded systems, Audio software, Linux driver development", "majorSkillsList" : [ "Embedded systems", "Audio software", "Linux driver development" ], "coreResponsibilities" : "Design next generation devices, Develop next generation devices, Integrate next generation devices, Design audio software, Implement audio software, Troubleshoot kernel drivers, Fix kernel drivers, Develop real-time embedded firmware, Develop embedded Linux software, Implement audio features, Develop audio software on ARM/DSP, Develop audio software on Bare metal, Develop audio software on Linux, Develop audio software on high level OSes, Optimize audio algorithms, Optimize speech algorithms, Port audio algorithms, Port speech algorithms, Integrate vendor hardware, Integrate vendor software stacks, Tune hardware for audio performance, Tune hardware for low noise", "teamCollaboration" : "Work with customers; Work with system architects; Work with program managers; Work with hardware engineers", "domainKnowledge" : "Audio software; Embedded systems; Real-time systems; Embedded Linux; DSP architectures; ARM architectures; Audio codecs; Audio standards", "domainList" : [ "audio-software", "embedded-systems", "real-time-systems", "embedded-linux", "dsp-architectures", "arm-architectures", "audio-codecs", "audio-standards" ], "domainSpecificKnowledge" : [ "Audio software", "Embedded systems", "Real-time systems", "Embedded Linux", "DSP architectures", "ARM architectures", "Audio codecs", "Audio standards" ], "toolProficiency" : [ "Oscilloscope", "Logic Analyzer", "Audio Precision" ], "innovationCreativity" : "Inventive research and development", "problemSolvingSkills" : "Troubleshoot; Fix", "qualificationsBasic" : "3+ years software development experience, Bachelor's degree or equivalent, Experience with embedded systems", "qualificationsPreferred" : "Master's degree or equivalent, Experience working on Audio software, DSP experience, ARM experience, Linux driver development experience, Android platform development experience", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Amazon Lab126 is an inventive research and development company that designs and engineer’s high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced ground-breaking devices like Fire tablets, Fire TV and Amazon Echo. Work hard. Have fun. Make history. We are looking for an Embedded Software Development Engineer for audio software team - to help design, develop, integrate our next generation devices. In this role you will work with customers, system architects, program managers and hardware engineers to design, implement, troubleshoot, fix kernel drivers, Audio SW, BSP for our next generation devices. You will be responsible for the development of real-time embedded firmware and embedded Linux software that implements audio features. Key job responsibilities If you have one or more of the below skills, then this job is for you: - Expertise in ALSA / Pulse Audio - Exposure to Audio software stack on Android/QNX/proprietary OS including Audio Flinger, Audio HAL - Exposure to ARM, DSP architectures - Exposure to Dolby MS12 / DTS/ MPEG-TS - Exposure to Audio/Video Sync - Exposure to STB / DTV audio systems - Working knowledge of Oscilloscope, Logic Analyzer, and Audio Tools including Audio Precision In this role, you will: - Develop audio software that runs on ARM/DSP using Bare metal, Linux and other high level OSes - Optimization and porting audio and speech processing algorithms - Integration of vendor hardware and software stacks - Tune hardware for highest audio performance and lowest noise About the team Amazon Lab126 is an inventive research and development company that designs and engineer’s high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced ground-breaking devices like Fire tablets, Fire TV and Amazon Echo. Basic Qualifications: - 3+ years of non-internship professional software development experience - Bachelor's degree or equivalent - Experience with embedded systems Preferred Qualifications: - Master's degree or equivalent - Experience working on Audio software, DSP, ARM, Linux driver development, Android platform development Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "SDE-Audio, Silicon and Systems Group at Amazon Lab126. Skills: Embedded systems, Audio software, Linux driver development. Design next generation devices. Develop next generation devices", "postedDate" : "2026-06-13T08:05:14.093", "createdAt" : "2026-06-13T08:05:14.093", "lastUpdated" : "2026-06-15T03:30:05.770", "ingestTimestamp" : "2026-06-13T08:05:14.093", "mongoId" : "69fda4e34c40e2acd1b9976a", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.jobs/jobs/10413591/apply", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Kernel driver development", "Real-time firmware development", "Audio software development", "DSP architecture", "ARM architecture", "Audio tuning", "Algorithm optimization", "Algorithm porting", "Embedded systems", "Audio software", "Linux driver development", "System design", "Embedded software development", "Real-time systems", "Embedded Linux", "DSP architectures", "ARM architectures", "Audio codecs", "Audio standards", "Oscilloscope", "Logic Analyzer", "Audio Precision" ], "skillCount" : 22, "jobCategory" : "other", "dataQualityScore" : 1.0, "_score" : 834.3562, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true }, { "id" : "68e0a7e2ce260f92cbf8e9b1", "title" : "Sr. Applied Scientist, Silicon and Systems Group", "company" : "Evi Technologies Limited", "industry" : "Machine Learning Science, Applied Science, alexa and amazon devices", "salary" : { "min" : 95000.0, "max" : 145000.0, "currency" : "GBP", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior Applied Scientist in Cambridge, UK, adjusted for the technology industry and company size." }, "location" : "Cambridge, England, GBR", "locations" : [ "Cambridge, England, GBR" ], "certifications" : [ "GCP Professional Data Engineer certification", "AWS Data Analytics certification", "Databricks Certified certification", "Dbt Certified certification" ], "timestamp" : "2026-06-15T06:43:13.736", "fingerprint" : "414a87ae420357f2559cb43e6e8238bff92b86da2179ae54170178fe797eed2c", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/3100838/apply", "externalId" : "daf8c094-a9e1-47d4-8f72-390747cae89f", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Cambridge", "state" : "England", "country" : "United Kingdom", "continent" : "eu", "source" : "llm", "workMode" : "onsite", "geo" : "52.1975846,0.1391537" } ], "locationText" : "Cambridge, England, United Kingdom", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Python, SQL, R, Scala, Spark, Dbt, Tableau, Power BI, Looker, Snowflake, BigQuery, Redshift, Databricks, Fivetran, Airflow, Dbt Cloud, Delta Lake, Scikit-learn, TensorFlow, PyTorch, XGBoost, LightGBM, Hugging Face, MLflow, AWS, GCP, Azure, SageMaker, Vertex AI, ML Studio", "professionalSkills" : [ "Data engineering", "Machine learning", "Business intelligence", "Analytics engineering", "Quantitative analysis", "Statistical modeling", "MLOps" ], "hardSkillsList" : [ "Statistical analysis", "Regression", "Classification", "Clustering", "Time-series analysis", "A/B testing", "Causal inference", "Data modelling", "ETL development", "Data warehousing", "Data pipeline development", "Algorithm development", "Model deployment", "Performance tuning" ], "hardSkills" : [ { "name" : "Statistical analysis", "level" : "intermediate" }, { "name" : "Regression", "level" : "intermediate" }, { "name" : "Classification", "level" : "intermediate" }, { "name" : "Clustering", "level" : "intermediate" }, { "name" : "Time-series analysis", "level" : "intermediate" }, { "name" : "A/B testing", "level" : "intermediate" }, { "name" : "Causal inference", "level" : "intermediate" }, { "name" : "Data modelling", "level" : "intermediate" }, { "name" : "ETL development", "level" : "intermediate" }, { "name" : "Data warehousing", "level" : "intermediate" }, { "name" : "Data pipeline development", "level" : "intermediate" }, { "name" : "Algorithm development", "level" : "intermediate" }, { "name" : "Model deployment", "level" : "intermediate" }, { "name" : "Performance tuning", "level" : "intermediate" } ], "majorSkills" : "Data science, Machine learning, Data engineering, Business intelligence", "majorSkillsList" : [ "Data science", "Machine learning", "Data engineering", "Business intelligence" ], "coreResponsibilities" : "Design and implement data pipelines, Develop and deploy machine learning models, Build and maintain business intelligence dashboards, Perform data analysis to drive business insights, Collaborate with stakeholders to understand data needs, Ensure data quality and integrity, Optimize data infrastructure for performance and scalability, Stay current with advancements in data science and", "teamCollaboration" : "Cross-functional teams; Stakeholders", "toolProficiency" : [ "Tableau", "Power BI", "Looker", "Snowflake", "BigQuery", "Redshift", "Databricks", "Dbt", "Fivetran", "Airflow", "Dbt Cloud", "Delta Lake", "Scikit-learn", "TensorFlow", "PyTorch", "XGBoost", "LightGBM", "Hugging Face", "MLflow", "SageMaker", "Vertex AI", "ML Studio" ], "problemSolvingSkills" : "Root cause analysis; Troubleshooting; Data-driven decision making", "qualificationsBasic" : "5+ years of experience in data science, Proficiency in SQL, Bachelor's degree in Computer Science, Statistics, Mathematics, or a related quantitative field", "qualificationsPreferred" : "PhD in a related quantitative field, Experience with scikit-learn, Experience with TensorFlow, Experience with PyTorch, Experience with XGBoost, Experience with LightGBM, Experience with Hugging Face, Experience with MLflow, Experience with Snowflake, Experience with BigQuery, Experience with Redshift, Experience with Databricks, Experience with dbt, Experience with Fivetran, Experience with Airflow, Experience with dbt Cloud, Experience with Delta Lake, Experience with AWS SageMaker, Experience with GCP Vertex AI, Experience with Azure ML Studio, GCP Professional Data Engineer certification, AWS Data Analytics certification, Databricks Certified certification, Dbt Certified certification", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Amazon Devices is an inventive research and development company that designs and engineer high-profile devices like Echo, Fire Tablets, Fire TV, and other consumer devices. We are looking for exceptional scientists to join our Applied Science team to advance the state-of-the-art in developing efficient multimodal language models across our product portfolio. Through close hardware-software integration, we design and train models for resource efficiency across the hardware and software tech stack. The Silicon and Solutions Group Edge AI team is looking for a talented Sr. Applied Scientist who will lead our efforts on inventing evaluation methods for multimodal language models and agents for new devices, including audio and vision experiences. Key job responsibilities - Collaborate with cross-functional engineers and scientists to advance the state of the art in multimodal model evaluations for devices, including audio, images, and videos - Invent and validate reliability for novel automated evaluation methods for perception tasks, such as fine-tuned LLM-as-judge - Develop and extend our evaluation framework(s) to support expanding capabilities for multimodal language models - Analyze large offline and online datasets to understand model gaps, develop methods to interpret model failures, and collaborate with training teams to enhance model capabilities for product use cases - Work closely with scientists, compiler engineers, data collection, and product teams to advance evaluation methods - Mentor less experienced Applied Scientists A day in the life As a Scientist with the Silicon and Solutions Group Edge AI team, you'll contribute to innovative methods for evaluating new product experiences and discover ways to enhance our model capabilities and enrich our customer experiences. You'll research new methods for reliably assessing perception capabilities for audio-visual tasks in multimodal language models, design and implement new metrics, and develop our evaluation framework. You'll collaborate across teams of engineers and scientists to identify and root cause issues in models and their system integration to continuously enhance the end-to-end experience. About the team Our Edge AI science team brings together our unique skills and experiences to deliver state-of-the-art multimodal AI models that enable new experiences on Amazon devices. We work at the intersection of hardware, software, and science to build models designed for our custom silicon. Basic Qualifications: - PhD in engineering, technology, computer science, machine learning, robotics, operations research, statistics, mathematics or equivalent quantitative field - Experience programming in Java, C++, Python or related language - Experience with neural deep learning methods and machine learning - Experience in building machine learning models for business application - Experience with modeling tools such as R, scikit-learn, Spark MLLib, MxNet, Tensorflow, numpy, scipy etc. Preferred Qualifications: - Experience with large scale distributed systems such as Hadoop, Spark etc. - Experience working with evaluations for large language models (LLMs) and/or vision-language models Amazon is an equal opportunities employer. We believe passionately that employing a diverse workforce is central to our success. We make recruiting decisions based on your experience and skills. We value your passion to discover, invent, simplify and build. Protecting your privacy and the security of your data is a longstanding top priority for Amazon. Please consult our Privacy Notice ( https://www.amazon.jobs/en/privacy_page ) to know more about how we collect, use and transfer the personal data of our candidates. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "Sr. Applied Scientist, Silicon and Systems Group at Evi Technologies Limited. Skills: Data science, Machine learning, Data engineering, Business intelligence. Design and implement data pipelines. Develop and deploy machine learning models", "postedDate" : "2026-06-13T19:16:21.064", "createdAt" : "2026-06-13T19:16:21.064", "lastUpdated" : "2026-06-15T06:43:13.736", "ingestTimestamp" : "2026-06-13T19:16:21.064", "mongoId" : "68e0a7e2ce260f92cbf8e9b1", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/3100838/apply", "salaryBand" : "75k-100k", "hasSalary" : false, "allSkills" : [ "Statistical analysis", "Regression", "Classification", "Clustering", "Time-series analysis", "A/B testing", "Causal inference", "Data modelling", "ETL development", "Data warehousing", "Data pipeline development", "Algorithm development", "Model deployment", "Performance tuning", "Data science", "Machine learning", "Data engineering", "Business intelligence", "Analytics engineering", "Quantitative analysis", "Statistical modeling", "MLOps", "GCP Professional Data Engineer certification", "AWS Data Analytics certification", "Databricks Certified certification", "Dbt Certified certification", "Tableau", "Power BI", "Looker", "Snowflake", "BigQuery", "Redshift", "Databricks", "Dbt", "Fivetran", "Airflow", "Dbt Cloud", "Delta Lake", "Scikit-learn", "TensorFlow", "PyTorch", "XGBoost", "LightGBM", "Hugging Face", "MLflow", "SageMaker", "Vertex AI", "ML Studio" ], "skillCount" : 48, "jobCategory" : "engineering", "jobSubcategory" : "data", "seniorityLevel" : "Senior", "dataQualityScore" : 1.0, "_score" : 830.2732, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a307f51f292fd229c057e7e", "title" : "Silicon DFT Engineer III", "company" : "Google", "industry" : "Technology", "salary" : { "min" : 3500000.0, "max" : 5500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market data for a Silicon DFT Engineer III at Google in Bengaluru, India, adjusted for mid-seniority and full-time employment." }, "location" : "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]", "locations" : [ "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]" ], "timestamp" : "2026-06-16T11:04:16.332", "fingerprint" : "9709c73a0820af4ca985d5d9b63659a07e0eaa48704412a4f22544cb9afd06f6", "source" : "google", "language" : "en", "externalId" : "123648462079042246", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "summaryDescription" : "Silicon DFT Engineer III at Google", "postedDate" : "2026-06-16T01:49:31.035", "createdAt" : "2026-06-16T01:49:31.035", "lastUpdated" : "2026-06-16T11:04:16.332", "ingestTimestamp" : "2026-06-16T01:49:31.035", "mongoId" : "6a307f51f292fd229c057e7e", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.6666667, "_score" : 823.8226, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a2c951374d8ee00a098c2fc", "title" : "Principal Power & Performance Validation Engineer", "company" : "Graphcore", "industry" : "Technology", "salary" : { "min" : 4500000.0, "max" : 7000000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market data for a Lead Principal Power & Performance Validation Engineer in Bengaluru, India, adjusted for the technology industry and company size." }, "location" : "Bengaluru, India", "locations" : [ "Bengaluru", "India" ], "timestamp" : "2026-06-15T13:23:46.667", "fingerprint" : "4a6dfaf754a6cf61d16c019bd5fe38b781009aa79f26013dd83428f1cc6d1c11", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/graphcore/jobs/8587305002", "externalId" : "8587305002", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, India", "employmentType" : "FULL_TIME", "experienceMinYears" : 8, "experienceMaxYears" : 15, "experienceLevel" : "Lead", "technicalSkills" : "Python, C/C++, Linux, SoC architecture, CPU, Memory, Interconnect, High-speed I/O", "professionalSkills" : [ "Performance validation", "Silicon characterization", "System performance engineering", "Team leadership", "Technical guidance", "Coaching", "Career development", "Validation strategy", "Validation execution", "Workload optimization", "Automation framework development", "Regression infrastructure development", "Reporting tools development", "Benchmark design", "Performance experiments", "Data analysis", "Process improvement", "Tooling improvement", "Engineering practices" ], "hardSkillsList" : [ "Power validation", "Thermal validation", "Performance validation", "Silicon characterization", "System performance analysis", "Low-level performance analysis", "Python automation", "Data analysis", "Debugging complex issues", "Workload modeling", "Test strategy definition", "Performance tuning", "Power management", "Hardware instrumentation", "Telemetry systems" ], "softSkillsList" : [ "Leadership", "Mentoring" ], "hardSkills" : [ { "name" : "Power validation", "level" : "intermediate" }, { "name" : "Thermal validation", "level" : "intermediate" }, { "name" : "Performance validation", "level" : "intermediate" }, { "name" : "Silicon characterization", "level" : "intermediate" }, { "name" : "System performance analysis", "level" : "intermediate" }, { "name" : "Low-level performance analysis", "level" : "intermediate" }, { "name" : "Python automation", "level" : "intermediate" }, { "name" : "Data analysis", "level" : "intermediate" }, { "name" : "Debugging complex issues", "level" : "intermediate" }, { "name" : "Workload modeling", "level" : "intermediate" }, { "name" : "Test strategy definition", "level" : "intermediate" }, { "name" : "Performance tuning", "level" : "intermediate" }, { "name" : "Power management", "level" : "intermediate" }, { "name" : "Hardware instrumentation", "level" : "intermediate" }, { "name" : "Telemetry systems", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Leadership" }, { "name" : "Mentoring" } ], "majorSkills" : "Power validation, Performance validation, AI compute silicon, System performance", "majorSkillsList" : [ "Power validation", "Performance validation", "AI compute silicon", "System performance" ], "coreResponsibilities" : "Define validation strategies, Lead validation activities, Mentor validation engineers, Support validation engineers, Drive planning, Prioritize validation activities, Execute validation activities, Develop validation plans, Lead post-silicon bring-up, Drive power validation, Drive performance validation, Validate CPU subsystems, Validate memory subsystems, Validate interconnect subsystems, Validate I/O subsystems, Develop automation frameworks, Develop regression infrastructure, Develop reporting tools, Design benchmark workloads, Execute performance experiments, Collaborate with teams, Debug technical issues, Resolve technical issues, Define validation metrics, Define pass/fail criteria, Define reporting methodologies, Guide workload generator development, Guide micro-benchmark development, Analyze power data, Analyze thermal data, Analyze performance data, Identify bottlenecks, Recommend improvements, Contribute to process improvement, Contribute to tooling improvement, Contribute to practice improvement, Communicate technical findings, Communicate project status, Communicate risks, Communicate recommendations, Support hiring activities, Support onboarding, Support team growth", "teamCollaboration" : "Cross-functional teams; Architecture teams; RTL teams; Firmware teams; Software teams; Systems teams; Geographically distributed teams", "projectManagementSkills" : [ "Prioritization", "Delivery coordination" ], "domainKnowledge" : "AI compute silicon; SoC architecture; High-performance compute; AI accelerators; GPU architectures; Power management technologies; Silicon characterization", "domainList" : [ "ai-compute-silicon", "soc-architecture", "high-performance-compute", "ai-accelerators", "gpu-architectures", "power-management-technologies", "silicon-characterization" ], "domainSpecificKnowledge" : [ "AI compute silicon", "SoC architecture", "High-performance compute", "AI accelerators", "GPU architectures", "Power management technologies", "Silicon characterization" ], "toolProficiency" : [ "Stress-ng", "Fio", "Perf", "Iperf" ], "communicationSkills" : "Communicate technical findings; Communicate project status; Communicate risks; Communicate recommendations", "problemSolvingSkills" : "Debug complex issues; Identify bottlenecks; Recommend improvements; Root cause analysis", "qualificationsBasic" : "Experience in power and performance validation, Experience leading engineering teams, Deep understanding of SoC architecture, Linux systems knowledge, Low-level performance analysis experience, Python programming skills, Experience with benchmarking tools, Experience debugging hardware and software, Define structured validation methodologies, Analytical skills, Communication skills, Stakeholder management skills, Cross-functional collaboration skills, Lead technical initiatives", "qualificationsPreferred" : "Experience with AI accelerator architectures, Experience with GPU architectures, Experience with high-performance compute architectures, Experience with pre-silicon modelling, Experience with simulation environments, Knowledge of power management technologies, Knowledge of silicon characterization methodologies, Programming experience in C/C++, Familiarity with hardware instrumentation, Familiarity with telemetry systems, Experience with high core-count systems, Experience with large-scale compute systems, Experience scaling technical teams, Experience building technical teams", "rawDescription" : "About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role combines deep technical expertise with people leadership responsibilities, including team development, prioritisation, mentoring and delivery coordination across multiple projects and stakeholders. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to debug complex issues, optimize workloads and continuously improve validation infrastructure and methodologies. Responsibilities and Duties Define and lead validation strategies for power, thermal and performance characterization of AI compute silicon and platforms Lead, mentor and support a team of validation engineers, providing technical guidance, coaching and career development Drive planning, prioritisation and execution of validation activities across multiple projects and milestones Develop comprehensive validation plans covering functional, stress, workload and corner-case scenarios Lead post-silicon bring-up and characterization activities for power and performance validation Drive validation of CPU, memory, interconnect and high-speed I/O subsystems under complex workload conditions Develop scalable automation frameworks, regression infrastructure and reporting tools using Python Design and execute benchmark workloads, parameter sweeps and performance experiments to identify optimization opportunities Collaborate with architecture, RTL, firmware, software and systems teams to debug and resolve complex technical issues Define validation metrics, pass/fail criteria and reporting methodologies to ensure repeatable and high-quality analysis Guide development of custom workload generators and micro-benchmarks where required Analyse power, thermal and performance data to identify bottlenecks and recommend improvements Contribute to continuous improvement of validation processes, tooling and engineering practices Communicate technical findings, project status, risks and recommendations clearly to stakeholders and engineering leadership Support hiring activities, onboarding and team growth initiatives Candidate Profile Essential: Strong experience in power and performance validation, silicon characterization or system performance engineering Experience leading or managing engineering teams within a technical environment Deep understanding of modern SoC architecture, including CPU, memory, interconnect and high-speed I/O technologies Strong Linux systems knowledge and low-level performance analysis experience Strong Python programming skills for automation, orchestration and data analysis Experience with benchmarking and profiling tools such as stress-ng, fio, perf, iperf or equivalent technologies Experience debugging complex hardware and software interactions Ability to define structured validation methodologies, workload models and test strategies Strong analytical skills with the ability to interpret large datasets and identify system bottlenecks Strong communication, stakeholder management and cross-functional collaboration skills Ability to lead complex technical initiatives across geographically distributed teams Desirable Experience with AI accelerator, GPU or high-performance compute architectures Experience with pre-silicon modelling or simulation environments Knowledge of power management technologies and silicon characterization methodologies Programming experience in C/C++ for low-level system or benchmark development Familiarity with hardware instrumentation and telemetry systems Experience working with high core-count or large-scale compute systems Experience scaling or building technical engineering teams", "summaryDescription" : "Principal Power & Performance Validation Engineer at Graphcore. Skills: Power validation, Performance validation, AI compute silicon, System performance. Define validation strategies. Lead validation activities", "postedDate" : "2026-06-14T08:59:47.356", "createdAt" : "2026-06-14T08:59:47.356", "lastUpdated" : "2026-06-15T13:23:46.667", "ingestTimestamp" : "2026-06-14T08:59:47.356", "mongoId" : "6a2c951374d8ee00a098c2fc", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Power validation", "Thermal validation", "Performance validation", "Silicon characterization", "System performance analysis", "Low-level performance analysis", "Python automation", "Data analysis", "Debugging complex issues", "Workload modeling", "Test strategy definition", "Performance tuning", "Power management", "Hardware instrumentation", "Telemetry systems", "Leadership", "Mentoring", "AI compute silicon", "System performance", "System performance engineering", "Team leadership", "Technical guidance", "Coaching", "Career development", "Validation strategy", "Validation execution", "Workload optimization", "Automation framework development", "Regression infrastructure development", "Reporting tools development", "Benchmark design", "Performance experiments", "Process improvement", "Tooling improvement", "Engineering practices", "Prioritization", "Delivery coordination", "SoC architecture", "High-performance compute", "AI accelerators", "GPU architectures", "Power management technologies", "Stress-ng", "Fio", "Perf", "Iperf" ], "skillCount" : 46, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Lead", "dataQualityScore" : 1.0, "_score" : 816.2266, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.97 }, { "id" : "6a3057ebf292fd229cf3edd1", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-16T08:45:03.464", "fingerprint" : "4366111ae7f79f184c18a1fa21d68d61d9e7a0d35eeeceefbde18fc9ebe1778f", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785276", "externalId" : "785276", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design process", "Presentation graphics", "Technical details" ], "hardSkillsList" : [ "Model-making", "Rendering" ], "hardSkills" : [ { "name" : "Model-making", "level" : "intermediate" }, { "name" : "Rendering", "level" : "intermediate" } ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments, Participate in architectural design, Develop alternative solutions, Develop presentation graphics, Follow through on design development drawings, Follow through on design development models, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Open studio environment; Knowledge sharing; Teamwork", "projectManagementSkills" : [ "Project management" ], "domainKnowledge" : "Architecture; Social infrastructure; Mass timber; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing", "domainList" : [ "architecture", "social-infrastructure", "mass-timber", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing" ], "domainSpecificKnowledge" : [ "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "communicationSkills" : "Presentation graphics", "documentationSkills" : "Construction drawings", "continuousLearning" : "Tuition reimbursement", "innovationCreativity" : "Novel ideas", "problemSolvingSkills" : "Solve complex design challenges", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments. Participate in architectural design", "createdAt" : "2026-06-15T23:09:30.254", "lastUpdated" : "2026-06-16T08:45:03.464", "ingestTimestamp" : "2026-06-15T23:09:30.254", "mongoId" : "6a3057ebf292fd229cf3edd1", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "Model-making", "Rendering", "User experience", "Interface design", "Visual design", "Design systems", "Design process", "Presentation graphics", "Technical details", "Project management", "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 22, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 815.55994, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "6a3057dcf292fd229cf3e8ad", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-16T06:59:56.312", "fingerprint" : "67757e0779ba9314ca67c2293eea7fecbf0279836f91155567f105989193f198", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785316", "externalId" : "785316", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design process", "Presentation graphics", "Technical details" ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments, Participate in architectural design, Develop alternative solutions, Develop presentation graphics, Follow through on design development drawings, Follow through on design development models, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Open studio environment; Knowledge sharing; Teamwork", "projectManagementSkills" : [ "Project management" ], "domainKnowledge" : "Architecture; Social infrastructure; Mass timber; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing; Built environment", "domainList" : [ "architecture", "social-infrastructure", "mass-timber", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing", "built-environment" ], "domainSpecificKnowledge" : [ "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Built environment" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "communicationSkills" : "Presentation graphics", "documentationSkills" : "Construction drawings", "continuousLearning" : "Tuition reimbursement", "innovationCreativity" : "Novel ideas", "problemSolvingSkills" : "Solve complex design challenges", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments. Participate in architectural design", "createdAt" : "2026-06-15T23:08:40.109", "lastUpdated" : "2026-06-16T06:59:56.312", "ingestTimestamp" : "2026-06-15T23:08:40.109", "mongoId" : "6a3057dcf292fd229cf3e8ad", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "User experience", "Interface design", "Visual design", "Design systems", "Design process", "Presentation graphics", "Technical details", "Project management", "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Built environment", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 21, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 815.5192, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "68e6b1d870f0b99d58d66a84", "title" : "Principal Applied Scientist, Hardware Silicon and Systems Group", "company" : "ADCI", "industry" : "Machine Learning Science, Applied Science, alexa and amazon devices", "salary" : { "min" : 6000000.0, "max" : 9000000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Principal Applied Scientist in Bengaluru, India, adjusted for executive seniority and technology industry." }, "location" : "Bengaluru, Karnataka, IND", "locations" : [ "Bengaluru, Karnataka, IND" ], "timestamp" : "2026-06-16T04:14:17.090", "fingerprint" : "de28bd31718a0a3a760c707970e79f984e16268c138d3264f4dc82a4f411e979", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/3103322/apply", "externalId" : "601eb834-4d4c-46c8-a0b4-013265096258", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Machine learning, Deep learning, Computer architecture, Inference algorithms, TensorFlow, PyTorch, ONNX", "professionalSkills" : [ "Model architecture design", "Model optimization", "Model deployment", "Hardware acceleration", "Efficient inference", "Model compression", "Quantization", "Pruning", "Distillation", "Multimodal optimization" ], "hardSkillsList" : [ "Hardware-aware quantization", "Low-precision arithmetic" ], "hardSkills" : [ { "name" : "Hardware-aware quantization", "level" : "intermediate" }, { "name" : "Low-precision arithmetic", "level" : "intermediate" } ], "majorSkills" : "ML models, Hardware optimization, Model compression, On-device ML", "majorSkillsList" : [ "ML models", "Hardware optimization", "Model compression", "On-device ML" ], "coreResponsibilities" : "Own technical architecture, Optimize ML models, Develop novel model architectures, Establish methodologies for model compression, Create evaluation framework, Implement multimodal optimization techniques, Define technical standards, Drive research initiatives, Develop novel ML architectures, Write critical optimization code, Create proof-of-concept implementations, Influence architecture decisions, Establish standards for model optimization, Mentor others", "teamCollaboration" : "Cross-functional teams", "domainKnowledge" : "On-device ML models; ML innovation; Silicon design; Resource-constrained devices; Consumer AI devices; Model training; Vision tasks; Language tasks; Multi-modal tasks; Custom silicon; Edge devices", "domainList" : [ "on-device-ml-models", "ml-innovation", "silicon-design", "resource-constrained-devices", "consumer-ai-devices", "model-training", "vision-tasks", "language-tasks", "multi-modal-tasks", "custom-silicon", "edge-devices" ], "domainSpecificKnowledge" : [ "On-device ML models", "ML innovation", "Silicon design", "Resource-constrained devices", "Consumer AI devices", "Model training", "Vision tasks", "Language tasks", "Multi-modal tasks", "Custom silicon", "Edge devices" ], "innovationCreativity" : "Industry-first model architectures; Breakthrough efficiency gains", "qualificationsBasic" : "Masters degree in Computer Science, 8+ years of experience in machine learning, Expertise in developing deep learning models, Background in computer architecture, Hands-on experience with model compression techniques, Proficiency with deep learning frameworks", "qualificationsPreferred" : "PhD in Computer Science, 10+ years of experience in machine learning, Proven expertise in co-designing ML models, In-depth understanding of model compression, Experience working on resource-constrained embedded systems, Demonstrated ability to influence technical strategy, Mentor cross-functional teams", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Hardware Silicon and Systems Group leads the development and optimization of on-device ML models for Amazon's hardware products, including audio, vision, and multi-modal AI features. We work at the critical intersection of ML innovation and silicon design, ensuring AI capabilities can run efficiently on resource-constrained devices. Currently, we enable production ML models across multiple device families, including Echo, Ring/Blink, and other consumer devices. Our work directly impacts Amazon's customer experiences in consumer AI device market. The solutions we develop determine which AI features can be offered on-device versus requiring cloud connectivity, ultimately shaping product capabilities and customer experience across Amazon's hardware portfolio. This is a unique opportunity to help shape the future of AI in consumer devices at unprecedented scale. You'll be at the forefront of developing industry-first model architectures and compression techniques that will power AI features across millions of Amazon devices worldwide. Your innovations will directly enable new AI features that enhance how customers interact with Amazon products every day. As Principal Applied Scientist you will blend expertise at the intersection of ML and hardware optimization for model training, build cutting-edge architectures for vision, language, and multi-modal tasks. Role requires a specialist in hardware-aware quantization, with hands-on experience in model compression techniques like pruning and distillation. You will be responsible for computer architecture, ML accelerator designs, efficient inference algorithms and low-precision arithmetic. Key job responsibilities As a Principal Applied Scientist, you will: • Own the technical architecture and optimization strategy for ML models deployed across Amazon's device ecosystem, from existing to yet-to-be-shipped products. • Develop novel model architectures optimized for our custom silicon, establishing new methodologies for model compression and quantization. • Create an evaluation framework for model efficiency and implement multimodal optimization techniques that work across vision, language, and audio tasks. • Define technical standards for model deployment and drive research initiatives in model efficiency to guide future silicon designs. • Spend the majority of your time doing deep technical work - developing novel ML architectures, writing critical optimization code, and creating proof-of-concept implementations that demonstrate breakthrough efficiency gains. • Influence architecture decisions impacting future silicon generations, establish standards for model optimization, and mentor others in advanced ML techniques. Basic Qualifications: Basic Qualifications: • Masters degree in Computer Science, Electrical Engineering, or a related technical field • 8+ years of experience in machine learning, with a focus on model architecture design, optimization, and deployment • Expertise in developing and deploying deep learning models for real-world applications, including vision, language, and multi modal tasks • Strong background in computer architecture, hardware acceleration, and efficient inference algorithms • Hands-on experience with model compression techniques such as pruning, quantization, and distillation • Proficiency with deep learning frameworks like TensorFlow, PyTorch, or ONNX Preferred Qualifications: • PhD in Computer Science, Electrical Engineering, or a related technical field • 10+ years of experience in machine learning, with a track record of developing novel model architectures and optimization techniques • Proven expertise in co-designing ML models and hardware accelerators for efficient on-device inference • In-depth understanding of the latest advancements in model compression, including techniques like knowledge distillation, network pruning, and hardware-aware quantization • Experience working on resource-constrained embedded systems and deploying ML models on edge devices • Demonstrated ability to influence technical strategy and mentor cross-functional teams • Strong communication skills and the ability to effectively present complex technical concepts to both technical and non-technical stakeholders Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "Principal Applied Scientist, Hardware Silicon and Systems Group at ADCI. Skills: ML models, Hardware optimization, Model compression, On-device ML. Own technical architecture. Optimize ML models", "postedDate" : "2026-06-14T19:48:18.334", "createdAt" : "2026-06-14T19:48:18.334", "lastUpdated" : "2026-06-16T04:14:17.090", "ingestTimestamp" : "2026-06-14T19:48:18.334", "mongoId" : "68e6b1d870f0b99d58d66a84", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/3103322/apply", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Hardware-aware quantization", "Low-precision arithmetic", "ML models", "Hardware optimization", "Model compression", "On-device ML", "Model architecture design", "Model optimization", "Model deployment", "Hardware acceleration", "Efficient inference", "Quantization", "Pruning", "Distillation", "Multimodal optimization", "On-device ML models", "ML innovation", "Silicon design", "Resource-constrained devices", "Consumer AI devices", "Model training", "Vision tasks", "Language tasks", "Multi-modal tasks", "Custom silicon", "Edge devices" ], "skillCount" : 26, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Executive", "dataQualityScore" : 1.0, "_score" : 811.9808, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a3057caf292fd229cf3e142", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-16T08:05:04.338", "fingerprint" : "59a9ae77f6e6ef5cf03d46c73a3260140f7a33eccd33efea31680ee562c2f5d0", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785276", "externalId" : "785276", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design process", "Presentation graphics", "Technical details" ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments under supervision, Participate in architectural design, Develop alternative solutions, Develop presentation graphics, Follow through on design drawings, Follow through on design models, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Open studio environment; Knowledge sharing; Teamwork", "domainKnowledge" : "Architecture; Social infrastructure; Mass timber; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing; Built environment", "domainList" : [ "architecture", "social-infrastructure", "mass-timber", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing", "built-environment" ], "domainSpecificKnowledge" : [ "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Built environment" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "continuousLearning" : "Tuition reimbursement", "innovationCreativity" : "Novel ideas", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments under supervision. Participate in architectural design", "createdAt" : "2026-06-15T23:10:05.723", "lastUpdated" : "2026-06-16T08:05:04.338", "ingestTimestamp" : "2026-06-15T23:10:05.723", "mongoId" : "6a3057caf292fd229cf3e142", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "User experience", "Interface design", "Visual design", "Design systems", "Design process", "Presentation graphics", "Technical details", "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Built environment", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 20, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 810.94806, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Planning", "llmIndustryConfidence" : 0.95 }, { "id" : "6a3057cbf292fd229cf3e164", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-16T06:44:46.695", "fingerprint" : "7d35f72c0f53c0ab398884f4b330867dc06e4b084420256d7a04aa4e01e2e453", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785276", "externalId" : "785276", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design process", "Presentation graphics", "Technical details" ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments under supervision, Participate in architectural design, Develop alternative solutions, Develop presentation graphics, Follow through on design drawings, Follow through on design models, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Open studio environment; Knowledge sharing; Teamwork", "domainKnowledge" : "Architecture; Social infrastructure; Mass timber; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing; Built environment", "domainList" : [ "architecture", "social-infrastructure", "mass-timber", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing", "built-environment" ], "domainSpecificKnowledge" : [ "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Built environment" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "continuousLearning" : "Tuition reimbursement", "innovationCreativity" : "Novel ideas", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments under supervision. Participate in architectural design", "createdAt" : "2026-06-15T23:09:43.038", "lastUpdated" : "2026-06-16T06:44:46.695", "ingestTimestamp" : "2026-06-15T23:09:43.038", "mongoId" : "6a3057cbf292fd229cf3e164", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "User experience", "Interface design", "Visual design", "Design systems", "Design process", "Presentation graphics", "Technical details", "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Built environment", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 20, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 810.92975, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "6a3057d2f292fd229cf3e3f7", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-16T08:03:09.075", "fingerprint" : "500325a908034fb6acfd37c6f62f814681ff78e69fc4b626ed5c1d02dfb2d193", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785316", "externalId" : "785316", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design development", "Presentation graphics" ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments under supervision, Participate in architectural design, Develop alternative solutions, Develop presentation graphics, Follow through on design drawings, Follow through on design models, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Open studio environment; Knowledge sharing; Teamwork", "domainKnowledge" : "Social infrastructure projects; Mass timber; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing", "domainList" : [ "social-infrastructure-projects", "mass-timber", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing" ], "domainSpecificKnowledge" : [ "Social infrastructure projects", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "continuousLearning" : "Tuition reimbursement", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments under supervision. Participate in architectural design", "createdAt" : "2026-06-15T23:09:41.495", "lastUpdated" : "2026-06-16T08:03:09.075", "ingestTimestamp" : "2026-06-15T23:09:41.495", "mongoId" : "6a3057d2f292fd229cf3e3f7", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "User experience", "Interface design", "Visual design", "Design systems", "Design development", "Presentation graphics", "Social infrastructure projects", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 17, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 810.92847, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "6a3057d2f292fd229cf3e3f8", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-16T08:14:34.850", "fingerprint" : "c52d332f9819064bcd1890d95fedd80b6581e534f9f4425ba9d0a933db320279", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785276", "externalId" : "785276", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design development", "Presentation graphics" ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments under supervision, Participate in architectural design, Develop alternative solutions, Develop presentation graphics, Follow through on design drawings, Follow through on design models, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Open studio environment; Knowledge sharing; Teamwork", "domainKnowledge" : "Social infrastructure projects; Mass timber; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing", "domainList" : [ "social-infrastructure-projects", "mass-timber", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing" ], "domainSpecificKnowledge" : [ "Social infrastructure projects", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "continuousLearning" : "Tuition reimbursement", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments under supervision. Participate in architectural design", "createdAt" : "2026-06-15T23:09:20.331", "lastUpdated" : "2026-06-16T08:14:34.850", "ingestTimestamp" : "2026-06-15T23:09:20.331", "mongoId" : "6a3057d2f292fd229cf3e3f8", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "User experience", "Interface design", "Visual design", "Design systems", "Design development", "Presentation graphics", "Social infrastructure projects", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 17, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 810.91144, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "6a3057cbf292fd229cf3e162", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-16T10:40:41.023", "fingerprint" : "afe20e6f9ccbb99118fe6b52e2ef08c5093f42b5c3cbb93ce497d11b64fa7963", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785316", "externalId" : "785316", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design development", "Presentation graphics" ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments under supervision, Participate in architectural design, Develop alternative solutions, Develop presentation graphics, Follow through on design drawings, Follow through on design models, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Open studio environment; Knowledge sharing; Teamwork", "domainKnowledge" : "Social infrastructure projects; Mass timber; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing", "domainList" : [ "social-infrastructure-projects", "mass-timber", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing" ], "domainSpecificKnowledge" : [ "Social infrastructure projects", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "continuousLearning" : "Tuition reimbursement", "innovationCreativity" : "Novel ideas", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments under supervision. Participate in architectural design", "createdAt" : "2026-06-15T23:09:15.244", "lastUpdated" : "2026-06-16T10:40:41.023", "ingestTimestamp" : "2026-06-15T23:09:15.244", "mongoId" : "6a3057cbf292fd229cf3e162", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "User experience", "Interface design", "Visual design", "Design systems", "Design development", "Presentation graphics", "Social infrastructure projects", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 17, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 810.9073, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "6a3057caf292fd229cf3e141", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-16T07:03:08.848", "fingerprint" : "42adec09a8c8c84ca96043802b5236646b348394ed2831145e8cc90b8def4c7c", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785316", "externalId" : "785316", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design development", "Presentation graphics" ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments under supervision, Participate in architectural design process, Develop alternative solutions, Develop presentation graphics, Follow through on design development drawings, Follow through on design development models, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Open studio environment; Knowledge sharing; Teamwork", "domainKnowledge" : "Architecture; Social infrastructure; Mass timber; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing", "domainList" : [ "architecture", "social-infrastructure", "mass-timber", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing" ], "domainSpecificKnowledge" : [ "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "continuousLearning" : "Tuition reimbursement", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments under supervision. Participate in architectural design process", "createdAt" : "2026-06-15T23:09:58.752", "lastUpdated" : "2026-06-16T07:03:08.848", "ingestTimestamp" : "2026-06-15T23:09:58.752", "mongoId" : "6a3057caf292fd229cf3e141", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "User experience", "Interface design", "Visual design", "Design systems", "Design development", "Presentation graphics", "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 18, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 808.73785, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "6a3057ebf292fd229cf3edd0", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-16T08:59:30.547", "fingerprint" : "b3e13decf5c259ac9f086861e8364741771170a6ac4c1d882c143038977f144c", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785316", "externalId" : "785316", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design development", "Presentation graphics" ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments under supervision, Participate in architectural design process, Develop alternative solutions, Develop presentation graphics, Follow through on design drawings, Follow through on design models, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Open studio environment; Knowledge sharing; Teamwork", "domainKnowledge" : "Architecture; Social infrastructure; Mass timber; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing; Built environment", "domainList" : [ "architecture", "social-infrastructure", "mass-timber", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing", "built-environment" ], "domainSpecificKnowledge" : [ "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Built environment" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "continuousLearning" : "Tuition reimbursement", "innovationCreativity" : "Novel ideas", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments under supervision. Participate in architectural design process", "createdAt" : "2026-06-15T23:09:47.147", "lastUpdated" : "2026-06-16T08:59:30.547", "ingestTimestamp" : "2026-06-15T23:09:47.147", "mongoId" : "6a3057ebf292fd229cf3edd0", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "User experience", "Interface design", "Visual design", "Design systems", "Design development", "Presentation graphics", "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Built environment", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 19, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 808.7285, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "6a3057dcf292fd229cf3e8ae", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-16T09:05:40.268", "fingerprint" : "88e4382e1177c8d8c618b2ce90ea53a76aa4d5f70f585cc1bd40c4c4defef0c0", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785276", "externalId" : "785276", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design development", "Presentation graphics" ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments under supervision, Participate in architectural design process, Develop alternative solutions, Develop presentation graphics, Follow through on design development drawings, Follow through on design development models, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Open studio environment; Knowledge sharing; Teamwork", "domainKnowledge" : "Architecture; Social infrastructure; Mass timber; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing", "domainList" : [ "architecture", "social-infrastructure", "mass-timber", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing" ], "domainSpecificKnowledge" : [ "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "continuousLearning" : "Tuition reimbursement", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments under supervision. Participate in architectural design process", "createdAt" : "2026-06-15T23:09:42.127", "lastUpdated" : "2026-06-16T09:05:40.268", "ingestTimestamp" : "2026-06-15T23:09:42.127", "mongoId" : "6a3057dcf292fd229cf3e8ae", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "User experience", "Interface design", "Visual design", "Design systems", "Design development", "Presentation graphics", "Architecture", "Social infrastructure", "Mass timber", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 18, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 808.7245, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "68e3dee770f0b99d589c6ca2", "title" : "Applied Scientist, Silicon and Systems Group", "company" : "Evi Technologies Limited", "industry" : "Machine Learning Science, Applied Science, alexa and amazon devices", "salary" : { "min" : 85000.0, "max" : 130000.0, "currency" : "GBP", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "The estimation is based on the UK market baseline for a Senior Applied Scientist in the Technology industry, adjusted for the Cambridge city tier and company size." }, "location" : "Cambridge, England, GBR", "locations" : [ "Cambridge, England, GBR" ], "timestamp" : "2026-06-15T02:16:24.523", "fingerprint" : "bc2f5b646089adabce387c952195b8bf33cc44f68144eb8704fe4e09dac3dba7", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/3101590/apply", "externalId" : "4740e638-e30d-4606-86e9-05ac52d58797", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Cambridge", "state" : "England", "country" : "United Kingdom", "continent" : "eu", "source" : "llm", "workMode" : "onsite", "geo" : "52.1975846,0.1391537" } ], "locationText" : "Cambridge, England, United Kingdom", "employmentType" : "FULL_TIME", "minimumEducation" : "Master's", "technicalSkills" : "Java, C++, Python, MxNet, Tensor Flow", "professionalSkills" : [ "Multimodal language models", "Model evaluation", "Perception tasks", "Reliability validation", "Automated evaluation", "Model interpretation", "Model capabilities" ], "hardSkillsList" : [ "Algorithms", "Data structures", "Parsing", "Numerical optimization", "Data mining", "Parallel computing", "Distributed computing", "High-performance computing", "Machine learning models" ], "hardSkills" : [ { "name" : "Algorithms", "level" : "intermediate" }, { "name" : "Data structures", "level" : "intermediate" }, { "name" : "Parsing", "level" : "intermediate" }, { "name" : "Numerical optimization", "level" : "intermediate" }, { "name" : "Data mining", "level" : "intermediate" }, { "name" : "Parallel computing", "level" : "intermediate" }, { "name" : "Distributed computing", "level" : "intermediate" }, { "name" : "High-performance computing", "level" : "intermediate" }, { "name" : "Machine learning models", "level" : "intermediate" } ], "majorSkills" : "Multimodal models, Model evaluation, Edge AI", "majorSkillsList" : [ "Multimodal models", "Model evaluation", "Edge AI" ], "coreResponsibilities" : "Collaborate with engineers and scientists, Advance state of the art, Develop evaluation methods, Invent reliability methods, Validate reliability for methods, Develop evaluation framework, Support model capabilities, Analyze datasets, Understand model gaps, Develop methods to interpret failures, Enhance model capabilities, Work with scientists, Work with compiler engineers, Work with data collection teams, Work with product teams, Advance evaluation methods, Contribute to methods for evaluating experiences, Discover ways to enhance capabilities, Enrich customer experiences, Bring algorithms to production, Bring models to production", "teamCollaboration" : "Cross-functional engineers; Cross-functional scientists; Training teams; Compiler engineers; Data collection teams; Product teams", "domainKnowledge" : "Edge AI; Multimodal AI models; Resource efficiency", "domainList" : [ "edge-ai", "multimodal-ai-models", "resource-efficiency" ], "domainSpecificKnowledge" : [ "Edge AI", "Multimodal AI models", "Resource efficiency" ], "innovationCreativity" : "Invent and validate reliability; Invent new methods", "problemSolvingSkills" : "Analyze datasets; Interpret model failures", "qualificationsBasic" : "Master's degree and experience, Experience in patents or publications, Experience programming in Java, C++, Python, Experience in algorithms and data structures, Experience in parsing, Experience in numerical optimization, Experience in data mining, Experience in parallel and distributed computing, Experience in high-performance computing, Experience in building machine learning models", "qualificationsPreferred" : "PhD, Experience using Unix/Linux, Experience in professional software development, Experience with MxNet, Experience with Tensor Flow", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Amazon Devices is an inventive research and development company that designs and engineer high-profile devices like Echo, Fire Tablets, Fire TV, and other consumer devices. We are looking for exceptional scientists to join our Applied Science team to advance the state-of-the-art in developing efficient multimodal language models across our product portfolio. Through close hardware-software integration, we design and train models for resource efficiency across the hardware and software tech stack. The Silicon and Solutions Group Edge AI team is looking for a talented Applied Scientist who will develop new evaluation methods for multimodal language models and agents for our devices, including audio and vision experiences. Key job responsibilities - Collaborate with cross-functional engineers and scientists to advance the state of the art in multimodal model evaluations for devices, including audio, images, and videos - Invent and validate reliability for novel automated evaluation methods for perception tasks, such as fine-tuned LLM-as-judge - Develop and extend our evaluation framework(s) to support expanding capabilities for multimodal language models - Analyze large offline and online datasets to understand model gaps, develop methods to interpret model failures, and collaborate with training teams to enhance model capabilities for product use cases - Work closely with scientists, compiler engineers, data collection, and product teams to advance evaluation methods A day in the life As a Scientist with the Silicon and Solutions Group Edge AI team, you'll contribute to innovative methods for evaluating new product experiences and discover ways to enhance our model capabilities and enrich our customer experiences. You'll have opportunities to collaborate across teams of engineers and scientists to bring algorithms and models to production. About the team Our Edge AI science team brings together our unique skills and experiences to deliver state-of-the-art multimodal AI models that enable new experiences on Amazon devices. Basic Qualifications: - PhD, or a Master's degree and experience in CS, CE, ML or related field - Experience in patents or publications at top-tier peer-reviewed conferences or journals - Experience programming in Java, C++, Python or related language - Experience in any of the following areas: algorithms and data structures, parsing, numerical optimization, data mining, parallel and distributed computing, high-performance computing - Experience in building machine learning models for business application Preferred Qualifications: - Experience using Unix/Linux - Experience in professional software development - Experience with popular deep learning frameworks such as MxNet and Tensor Flow Amazon is an equal opportunities employer. We believe passionately that employing a diverse workforce is central to our success. We make recruiting decisions based on your experience and skills. We value your passion to discover, invent, simplify and build. Protecting your privacy and the security of your data is a longstanding top priority for Amazon. Please consult our Privacy Notice ( https://www.amazon.jobs/en/privacy_page ) to know more about how we collect, use and transfer the personal data of our candidates. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "Applied Scientist, Silicon and Systems Group at Evi Technologies Limited. Skills: Multimodal models, Model evaluation, Edge AI. Collaborate with engineers and scientists. Advance state of the art", "postedDate" : "2026-06-13T07:32:00.181", "createdAt" : "2026-06-13T07:32:00.181", "lastUpdated" : "2026-06-15T02:16:24.523", "ingestTimestamp" : "2026-06-13T07:32:00.181", "mongoId" : "68e3dee770f0b99d589c6ca2", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/3101590/apply", "salaryBand" : "75k-100k", "hasSalary" : false, "allSkills" : [ "Algorithms", "Data structures", "Parsing", "Numerical optimization", "Data mining", "Parallel computing", "Distributed computing", "High-performance computing", "Machine learning models", "Multimodal models", "Model evaluation", "Edge AI", "Multimodal language models", "Perception tasks", "Reliability validation", "Automated evaluation", "Model interpretation", "Model capabilities", "Multimodal AI models", "Resource efficiency" ], "skillCount" : 20, "jobCategory" : "data", "dataQualityScore" : 0.8888889, "_score" : 795.9867, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true }, { "id" : "6a30609ff292fd229cf92080", "title" : "Senior Design Verification Engineer", "company" : "Astera Labs", "industry" : "Technology", "salary" : { "min" : 175000.0, "max" : 250000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Senior Design Verification Engineer in San Jose, CA, adjusted for industry and company size." }, "location" : "San Jose, United States", "locations" : [ "San Jose", "United States", "Toronto", "Canada" ], "timestamp" : "2026-06-16T08:58:59.000", "fingerprint" : "f9a55781023716cc44560e7d042a86934969aa9ef878161be70f3e098d33ccaf", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/asteralabs/jobs/4699012005", "externalId" : "4699012005", "industryFunction" : { }, "structuredLocations" : [ { "city" : "San Jose", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.3361663,-121.8905910" } ], "locationText" : "San Jose, California, United States", "minimumEducation" : "Bachelor's", "experienceMinYears" : 2, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "C/C++, System Verilog, UVM, RTL simulation, CoSimulation, Emulation, Perl, Python, PCI-Express, Ethernet, Infiniband, DDR, NVMe, USB, DDR4, DDR5, HBM", "professionalSkills" : [ "Customer meetings", "Independent development", "Collaborative debugging" ], "hardSkillsList" : [ "Verification infrastructure", "Test development", "Constrained random environments", "Transaction-based methodology", "Assertion writing", "Coverage analysis", "VIP integration", "VIP abstraction" ], "softSkillsList" : [ "Entrepreneurial", "Open-mind behavior" ], "hardSkills" : [ { "name" : "Verification infrastructure", "level" : "intermediate" }, { "name" : "Test development", "level" : "intermediate" }, { "name" : "Constrained random environments", "level" : "intermediate" }, { "name" : "Transaction-based methodology", "level" : "intermediate" }, { "name" : "Assertion writing", "level" : "intermediate" }, { "name" : "Coverage analysis", "level" : "intermediate" }, { "name" : "VIP integration", "level" : "intermediate" }, { "name" : "VIP abstraction", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Entrepreneurial" }, { "name" : "Open-mind behavior" } ], "majorSkills" : "Design Verification, UVM, C/C++, SoC/silicon products", "majorSkillsList" : [ "Design Verification", "UVM", "C/C++", "SoC/silicon products" ], "coreResponsibilities" : "Develop test-plans, Develop test-sequences in UVM, Generate stimuli, Debug failures with RTL designers, Develop user-controlled random constraints, Write assertions, Write cover properties, Analyze coverage data, Integrate Verification IPs, Develop VIP abstraction layers, Debug SoC based designs, Verify Physical Layer, Verify Link Layer, Verify Transaction Layer", "teamCollaboration" : "Collaborate with RTL designers", "projectManagementSkills" : [ "Prioritize tasks" ], "domainKnowledge" : "Server applications; Storage applications; Networking applications; PCI-Express protocol; Memory technologies; FPGA-based verificationulation", "domainList" : [ "server-applications", "storage-applications", "networking-applications", "pci-express-protocol", "memory-technologies", "fpga-based-verificationulation" ], "domainSpecificKnowledge" : [ "Server applications", "Storage applications", "Networking applications", "PCI-Express protocol", "Memory technologies", "FPGA-based verificationulation" ], "toolProficiency" : [ "Perl", "Python", "UVM" ], "communicationSkills" : "Customer meetings", "innovationCreativity" : "Creativity; Innovation", "problemSolvingSkills" : "Debugging", "specialRequirements" : "Authorized to work in Canada, Start immediately", "qualificationsBasic" : "Academic and technical background in electrical engineering, Bachelor’s in EE, ≥2 years’ experience supporting or developing complex SoC/silicon products, Professional attitude, Ability to prioritize a dynamic list of multiple tasks, Plan and prepare for customer meetings, Work with minimal guidance and supervision, Experience with integrating C/C++ in System Verilog environments using DPI/PLI, Ability to use scripting tools (Perl/Python) to automate verification infrastructure, Experience in developing infrastructure and tests in a hybrid directed and constrained random environments, Work independently to develop test-plans, Develop related test-sequences in UVM, Generate stimuli, Work collaboratively with RTL designers to debug failures, Develop user-controlled random constraints in transaction-based verification methodology, Experience writing assertions, Cover properties, Analyzing coverage data, Prior experience using Verification IPs from 3rd party vendors, Develop VIP abstraction layers", "qualificationsPreferred" : "Master’s in EE, S/W debugging for SoC based designs, Physical Layer, Link Layer and Transaction Layer verification expertise in PCIe protocol, Experience in memory technologies like DDR4/DDR5/HBM, Experience with FPGA-based verificationulation", "rawDescription" : "Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com. Job Description  We are looking for a Senior Design Verification Engineer with proven experience in all aspects of verification in UVM and C/C++. The candidate must have experience using high level programming languages such as C/C++ to communicate with System Verilog and/or UVM based environments to aid RTL simulation, CoSimulation and Emulation.  Basic qualifications:  Strong academic and technical background in electrical engineering. At minimum, a Bachelor’s in EE is  required, and a Maser’s is preferred.  ≥2 years’ experience supporting or developing complex SoC/silicon products for Server, Storage, and/or  Networking applications.  Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for  customer meetings in advance, and to work with minimal guidance and supervision.  Entrepreneurial, open-mind behavior and can-do attitude. Think and act fast with the customer in mind!  Authorized to work in Canada and start immediately.  Required Experience  Experience with integrating C/C++ in System Verilog environments using DPI/PLI  Ability to use scripting tools (Perl/Python) to automate verification infrastructure.  Experience in developing infrastructure and tests in a hybrid directed and constrained random  environments  Must be able to work independently to develop test-plans, and related test-sequences in UVM to  generate stimuli and work collaboratively with RTL designers to debug failures.  Develop user-controlled random constraints in transaction-based verification methodology. Experience  writing assertions, cover properties and analyzing coverage data  Must have prior experience using Verification IPs from 3rd party vendors for communication protocols  such as PCI-Express (Gen-3 and above), Ethernet, Infiniband, DDR, NVMe, USB, etc.  Develop VIP abstraction layers to simplify and scale verification deployments  Preferred Experience  S/W debugging for SoC based designs in the area of kernel/device-drivers/u-boot  Physical Layer, Link Layer and Transaction Layer verification expertise in PCIe protocol.  Experience in memory technologies like DDR4/DDR5/HBM.  Experience with FPGA-based verification/emulation.  We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.", "summaryDescription" : "Senior Design Verification Engineer at Astera Labs. Skills: Design Verification, UVM, C/C++, SoC/silicon products. Develop test-plans. Develop test-sequences in UVM", "postedDate" : "2026-06-15T23:25:45.001", "createdAt" : "2026-06-15T23:25:45.001", "lastUpdated" : "2026-06-16T08:58:59.000", "ingestTimestamp" : "2026-06-15T23:25:45.001", "mongoId" : "6a30609ff292fd229cf92080", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 175000, "salaryAnnualMax" : 250000, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "Verification infrastructure", "Test development", "Constrained random environments", "Transaction-based methodology", "Assertion writing", "Coverage analysis", "VIP integration", "VIP abstraction", "Entrepreneurial", "Open-mind behavior", "Design Verification", "UVM", "C/C++", "SoC/silicon products", "Customer meetings", "Independent development", "Collaborative debugging", "Prioritize tasks", "Server applications", "Storage applications", "Networking applications", "PCI-Express protocol", "Memory technologies", "FPGA-based verificationulation", "Perl", "Python" ], "skillCount" : 26, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.8888889, "_score" : 774.3924, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a2c951474d8ee00a098c3a6", "title" : "Staff -Power and Performance Validation Engineer", "company" : "Graphcore", "industry" : "Technology", "salary" : { "min" : 3500000.0, "max" : 5500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Lead Staff Power and Performance Validation Engineer in Bengaluru, India, adjusted for the technology industry and company size." }, "location" : "Bengaluru, India", "locations" : [ "Bengaluru", "India" ], "timestamp" : "2026-06-15T13:01:56.883", "fingerprint" : "21e34fc53a2b094312239f72735034c9de17f017ff070f308cff5c41fa97bb99", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/graphcore/jobs/8587313002", "externalId" : "8587313002", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, India", "experienceMinYears" : 8, "experienceMaxYears" : 15, "experienceLevel" : "Staff", "technicalSkills" : "Python, C/C++", "professionalSkills" : [ "Validation strategy", "Performance analysis", "Automation frameworks", "Data analysis", "System design" ], "hardSkillsList" : [ "Power validation", "Performance validation", "Thermal validation", "Silicon characterization", "System performance", "SoC architecture", "CPU architecture", "Memory architecture", "Interconnect architecture", "High-speed I/O", "Linux systems", "Low-level performance", "Python programming", "Automation", "Orchestration", "Data analysis", "Benchmarking", "Profiling", "Hardware debugging", "Software debugging", "Workload modeling", "Test strategy", "Data interpretation", "Bottleneck identification", "AI accelerators", "GPU architecture", "High-performance compute", "Pre-silicon modeling", "Pre-silicon simulation", "Power management", "Hardware instrumentation", "Telemetry systems", "High core-count systems", "Large-scale compute" ], "hardSkills" : [ { "name" : "Power validation", "level" : "intermediate" }, { "name" : "Performance validation", "level" : "intermediate" }, { "name" : "Thermal validation", "level" : "intermediate" }, { "name" : "Silicon characterization", "level" : "intermediate" }, { "name" : "System performance", "level" : "intermediate" }, { "name" : "SoC architecture", "level" : "intermediate" }, { "name" : "CPU architecture", "level" : "intermediate" }, { "name" : "Memory architecture", "level" : "intermediate" }, { "name" : "Interconnect architecture", "level" : "intermediate" }, { "name" : "High-speed I/O", "level" : "intermediate" }, { "name" : "Linux systems", "level" : "intermediate" }, { "name" : "Low-level performance", "level" : "intermediate" }, { "name" : "Python programming", "level" : "intermediate" }, { "name" : "Automation", "level" : "intermediate" }, { "name" : "Orchestration", "level" : "intermediate" }, { "name" : "Data analysis", "level" : "intermediate" }, { "name" : "Benchmarking", "level" : "intermediate" }, { "name" : "Profiling", "level" : "intermediate" }, { "name" : "Hardware debugging", "level" : "intermediate" }, { "name" : "Software debugging", "level" : "intermediate" }, { "name" : "Workload modeling", "level" : "intermediate" }, { "name" : "Test strategy", "level" : "intermediate" }, { "name" : "Data interpretation", "level" : "intermediate" }, { "name" : "Bottleneck identification", "level" : "intermediate" }, { "name" : "AI accelerators", "level" : "intermediate" }, { "name" : "GPU architecture", "level" : "intermediate" }, { "name" : "High-performance compute", "level" : "intermediate" }, { "name" : "Pre-silicon modeling", "level" : "intermediate" }, { "name" : "Pre-silicon simulation", "level" : "intermediate" }, { "name" : "Power management", "level" : "intermediate" }, { "name" : "Hardware instrumentation", "level" : "intermediate" }, { "name" : "Telemetry systems", "level" : "intermediate" }, { "name" : "High core-count systems", "level" : "intermediate" }, { "name" : "Large-scale compute", "level" : "intermediate" } ], "majorSkills" : "Power validation, Performance validation, AI compute silicon, System performance", "majorSkillsList" : [ "Power validation", "Performance validation", "AI compute silicon", "System performance" ], "coreResponsibilities" : "Define validation strategies, Lead validation strategies, Drive validation strategy execution, Lead power validation activities, Lead thermal validation activities, Lead performance validation activities, Ensure products meet expectations, Develop validation plans, Execute validation activities, Lead post-silicon bring-up, Lead characterization activities, Drive validation of CPU subsystems, Drive validation of memory subsystems, Drive validation of interconnect subsystems, Drive validation of I/O subsystems, Develop scalable automation frameworks, Develop regression infrastructure, Develop reporting tools, Design benchmark workloads, Execute benchmark workloads, Design performance experiments, Execute performance experiments, Identify optimization opportunities, Debug complex technical issues, Resolve complex technical issues, Define validation metrics, Define pass/fail criteria, Define reporting methodologies, Ensure repeatable analysis, Ensure high-quality analysis, Guide development of custom workload generators, Guide development of micro-benchmarks, Analyze power data, Analyze thermal data, Analyze performance data, Identify bottlenecks, Recommend improvements, Contribute to continuous improvement, Improve validation processes, Improve validation tooling, Improve engineering practices, Communicate technical findings, Communicate project status, Communicate risks, Communicate recommendations, Support knowledge sharing, Contribute to continuous improvement", "teamCollaboration" : "Cross-functional teams; Architecture teams; RTL teams; Firmware teams; Software teams; Systems teams; Engineering leadership", "projectManagementSkills" : [ "Planning and execution" ], "domainKnowledge" : "AI compute; SoC architecture; High-speed I/O; AI accelerators; GPU architecture; High-performance compute", "domainList" : [ "ai-compute", "soc-architecture", "high-speed-i-o", "ai-accelerators", "gpu-architecture", "high-performance-compute" ], "domainSpecificKnowledge" : [ "AI compute", "SoC architecture", "High-speed I/O", "AI accelerators", "GPU architecture", "High-performance compute" ], "toolProficiency" : [ "Stress-ng", "Fio", "Perf", "Iperf" ], "communicationSkills" : "Communicate technical findings; Communicate project status; Communicate risks; Communicate recommendations", "problemSolvingSkills" : "Debugging complex issues; Identify bottlenecks; Root cause analysis", "qualificationsBasic" : "Power and performance validation experience, Silicon characterization experience, System performance engineering experience, SoC architecture understanding, CPU, memory, interconnect, I/O knowledge, Linux systems knowledge, Low-level performance analysis experience, Python programming skills, Benchmarking and profiling tools experience, Complex hardware/software debugging, Structured validation methodologies, Workload models and test strategies, Analytical skills, Interpret large datasets, Identify system bottlenecks, Cross-functional collaboration skills, Work independently on complex tasks", "qualificationsPreferred" : "AI accelerator architecture experience, GPU architecture experience, High-performance compute architecture experience, Pre-silicon modelling experience, Pre-silicon simulation environments experience, Power management technologies knowledge, Silicon characterization methodologies knowledge, C/C++ programming experience, Low-level system development experience, Benchmark development experience, Hardware instrumentation familiarity, Telemetry systems familiarity, High core-count systems experience, Large-scale compute systems experience, Shared validation infrastructure contribution, Engineering best practices contribution", "workSiteFlexibility" : "Onsite", "rawDescription" : "Staff -Power and Performance Validation Engineer About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to senior leadership within Architecture and Validation, the Power and Performance Validation Lead will drive validation strategy and execution for advanced AI compute silicon and systems. The role is responsible for leading power, thermal and performance validation activities across pre-silicon and post-silicon environments to ensure products meet efficiency, reliability and scalability expectations. This role requires strong technical expertise and collaboration across multiple engineering disciplines to deliver robust validation methodologies, scalable automation frameworks and actionable performance insights. The Team The Power and Performance Validation team sits within the Architecture and Validation organisation and is responsible for validating the performance, efficiency and thermal behaviour of Graphcore silicon and systems. The team supports the full product lifecycle, from early architectural modelling through to first silicon bring-up, characterization and production readiness. Engineers work closely with cross-functional teams globally to debug complex issues, optimize workloads and continuously improve validation infrastructure and methodologies. Responsibilities and Duties Define and lead validation strategies for power, thermal and performance characterization of AI compute silicon and platforms Contribute to planning and execution of validation activities across multiple projects and milestones Develop comprehensive validation plans covering functional, stress, workload and corner-case scenarios Lead post-silicon bring-up and characterization activities for power and performance validation Drive validation of CPU, memory, interconnect and high-speed I/O subsystems under complex workload conditions Develop scalable automation frameworks, regression infrastructure and reporting tools using Python Design and execute benchmark workloads, parameter sweeps and performance experiments to identify optimization opportunities Collaborate with architecture, RTL, firmware, software and systems teams to debug and resolve complex technical issues Define validation metrics, pass/fail criteria and reporting methodologies to ensure repeatable and high-quality analysis Guide development of custom workload generators and micro-benchmarks where required Analyse power, thermal and performance data to identify bottlenecks and recommend improvements Contribute to continuous improvement of validation processes, tooling and engineering practices Communicate technical findings, project status, risks and recommendations clearly to stakeholders and engineering leadership Support knowledge sharing and contribute to continuous improvement across the validation organisation Candidate Profile Essential: Strong experience in power and performance validation, silicon characterization or system performance engineering Deep understanding of modern SoC architecture, including CPU, memory, interconnect and high-speed I/O technologies Strong Linux systems knowledge and low-level performance analysis experience Strong Python programming skills for automation, orchestration and data analysis Experience with benchmarking and profiling tools such as stress-ng, fio, perf, iperf or equivalent technologies Experience debugging complex hardware and software interactions Ability to define structured validation methodologies, workload models and test strategies Strong analytical skills with the ability to interpret large datasets and identify system bottlenecks Strong communication and cross-functional collaboration skills Ability to work independently on complex technical tasks while collaborating effectively across teams Desirable Experience with AI accelerator, GPU or high-performance compute architectures Experience with pre-silicon modelling or simulation environments Knowledge of power management technologies and silicon characterization methodologies Programming experience in C/C++ for low-level system or benchmark development Familiarity with hardware instrumentation and telemetry systems Experience working with high core-count or large-scale compute systems Experience contributing to shared validation infrastructure and engineering best practices", "summaryDescription" : "Staff -Power and Performance Validation Engineer at Graphcore. Skills: Power validation, Performance validation, AI compute silicon, System performance. Define validation strategies. Lead validation strategies", "postedDate" : "2026-06-14T02:28:52.967", "createdAt" : "2026-06-14T02:28:52.967", "lastUpdated" : "2026-06-15T13:01:56.883", "ingestTimestamp" : "2026-06-14T02:28:52.967", "mongoId" : "6a2c951474d8ee00a098c3a6", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Power validation", "Performance validation", "Thermal validation", "Silicon characterization", "System performance", "SoC architecture", "CPU architecture", "Memory architecture", "Interconnect architecture", "High-speed I/O", "Linux systems", "Low-level performance", "Python programming", "Automation", "Orchestration", "Data analysis", "Benchmarking", "Profiling", "Hardware debugging", "Software debugging", "Workload modeling", "Test strategy", "Data interpretation", "Bottleneck identification", "AI accelerators", "GPU architecture", "High-performance compute", "Pre-silicon modeling", "Pre-silicon simulation", "Power management", "Hardware instrumentation", "Telemetry systems", "High core-count systems", "Large-scale compute", "AI compute silicon", "Validation strategy", "Performance analysis", "Automation frameworks", "System design", "Planning and execution", "AI compute", "Stress-ng", "Fio", "Perf", "Iperf" ], "skillCount" : 45, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Lead", "dataQualityScore" : 0.8888889, "_score" : 758.8722, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a210e2a74d8ee00a0af6036", "title" : "ASIC RTL Engineer III, Silicon", "industry" : "Technology", "salary" : { "min" : 2200000.0, "max" : 3500000.0, "currency" : "INR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for an ASIC RTL Engineer III in Bengaluru, India, adjusted for senior experience level and the technology industry." }, "location" : "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]", "locations" : [ "[Bengaluru, Karnataka, India, [3, Old Madras Rd, Sadanandanagar, Bennigana Halli, Bengaluru, Karnataka 560038, India], Bengaluru, 560038, KA, IN]" ], "timestamp" : "2026-06-16T12:38:57.194", "fingerprint" : "b1c262870b66bac5501f455e543653ca477782b2a2ac7bc4e11cfd5092ae36a3", "source" : "google", "language" : "en", "externalId" : "131996864789521094", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bengaluru", "state" : "Karnataka", "country" : "India", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "12.9767936,77.5900820" } ], "locationText" : "Bengaluru, Karnataka, India", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "summaryDescription" : "ASIC RTL Engineer III, Silicon", "postedDate" : "2026-06-16T01:48:27.632", "createdAt" : "2026-06-16T01:48:27.632", "lastUpdated" : "2026-06-16T12:38:57.194", "ingestTimestamp" : "2026-06-16T01:48:27.632", "mongoId" : "6a210e2a74d8ee00a0af6036", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.5555556, "_score" : 745.0826, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a307f01f292fd229c054602", "title" : "Silicon Validation Engineer, Google Cloud", "company" : "Google", "industry" : "Technology", "salary" : { "min" : 175000.0, "max" : 250000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level Silicon Validation Engineer in Sunnyvale, CA, adjusted for Google's size and industry." }, "location" : "[Sunnyvale, CA, USA, [111 W Java Dr, Sunnyvale, CA 94089, USA], Sunnyvale, 94089, CA, US]", "locations" : [ "[Sunnyvale, CA, USA, [111 W Java Dr, Sunnyvale, CA 94089, USA], Sunnyvale, 94089, CA, US]" ], "timestamp" : "2026-06-16T11:26:23.664", "fingerprint" : "e0ea0ff7a4fe6c42b991f95f62a6c0a35f2a8b8473fee3f5bb29650c9cd6d570", "source" : "google", "language" : "en", "externalId" : "87066834049606342", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Sunnyvale", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.3688301,-122.0363490" } ], "locationText" : "Sunnyvale, California, United States", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "summaryDescription" : "Silicon Validation Engineer, Google Cloud at Google", "postedDate" : "2026-06-16T01:49:09.635", "createdAt" : "2026-06-16T01:49:09.635", "lastUpdated" : "2026-06-16T11:26:23.664", "ingestTimestamp" : "2026-06-16T01:49:09.635", "mongoId" : "6a307f01f292fd229c054602", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 175000, "salaryAnnualMax" : 250000, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.5555556, "_score" : 741.7035, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "69f519c94c40e2acd1eb1c34", "title" : "Software Development Engineer - Silicon Development", "company" : "Annapurna Labs", "industry" : "Software Development, Cloud Computing", "salary" : { "min" : 70000.0, "max" : 194400.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Austin, Texas, USA", "locations" : [ "Austin, Texas, USA" ], "timestamp" : "2026-06-15T11:05:24.113", "fingerprint" : "0fcc679f368aa01e35916807fac6285c92afcf3ee4074c9f9dc7d9d3279d736a", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.jobs/jobs/10409008/apply", "externalId" : "eb28f364-2f3b-4ab1-8e8e-24cd25fc0595", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Austin", "state" : "Texas", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "30.2711286,-97.7436995" } ], "locationText" : "Austin, Texas, United States", "employmentType" : "FULL_TIME", "technicalSkills" : "Python, Ruby, Golang, Java, C++, C#, Rust, AWS, CloudFormation, Terraform, CDK, Linux, Unix, Slurm", "professionalSkills" : [ "System design", "Reliability engineering", "Performance engineering", "Cost efficiency" ], "hardSkillsList" : [ "Production-quality code", "Maintainable code", "Infrastructure as code", "Service deployments", "Incident response", "Operational excellence" ], "hardSkills" : [ { "name" : "Production-quality code", "level" : "intermediate" }, { "name" : "Maintainable code", "level" : "intermediate" }, { "name" : "Infrastructure as code", "level" : "intermediate" }, { "name" : "Service deployments", "level" : "intermediate" }, { "name" : "Incident response", "level" : "intermediate" }, { "name" : "Operational excellence", "level" : "intermediate" } ], "majorSkills" : "Silicon development infrastructure, Cloud infrastructure, High-performance computing, Electronic design automation", "majorSkillsList" : [ "Silicon development infrastructure", "Cloud infrastructure", "High-performance computing", "Electronic design automation" ], "coreResponsibilities" : "Partner with design teams, Understand development workflows, Build tooling and automation, Eliminate manual toil, Reduce time-to-results, Gather customer feedback, Iterate on solutions, Benchmark infrastructure, Design cloud infrastructure, Implement cloud infrastructure, Operate cloud infrastructure, Design HPC clusters, Implement HPC clusters, Operate HPC clusters, Build CI/CD pipelines, Maintain CI/CD pipelines, Take ownership of reliability, Take ownership of performance, Take ownership of cost efficiency, Develop monitoring systems, Develop diagnostics systems, Develop alerting systems, Establish incident response, Create runbooks, Create documentation, Anticipate system failures, Implement preventive measures, Write production-quality code, Review infrastructure-as-code, Collaborate across teams", "teamCollaboration" : "Silicon design teams; Verification teams; Emulation teams; Software teams; Hardware teams; Operations teams; Chip designers; Verification engineers; Software developers", "domainKnowledge" : "Silicon development; Chip development; Electronic design automation; Custom silicon; Machine Learning Accelerators; RTL to silicon", "domainList" : [ "silicon-development", "chip-development", "electronic-design-automation", "custom-silicon", "machine-learning-accelerators", "rtl-to-silicon" ], "domainSpecificKnowledge" : [ "Silicon development", "Chip development", "Electronic design automation", "Custom silicon", "Machine Learning Accelerators", "RTL to silicon" ], "toolProficiency" : [ "Slurm" ], "documentationSkills" : "Runbooks; Documentation", "innovationCreativity" : "Innovate in custom silicon", "problemSolvingSkills" : "Troubleshooting; Root cause analysis", "outcomesObjectives" : "Accelerate silicon development; Enable faster iteration; Enable thorough validation; Bring transformative silicon to market; Reduce operational toil; Improve system resilience", "qualificationsBasic" : "3+ years software development experience, 2+ years system design experience, Experience programming one language, Experience utilizing AWS, Experience with Linux/Unix, Experience automating infrastructure, Experience with HPC clusters, Experience building AWS services, Experience with CI/CD pipelines, Experience with monitoring systems", "qualificationsPreferred" : "Familiarity with semiconductor workflows, Familiarity with EDA environments", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "We're seeking a Software Development Engineer to help architect, build, and operate the infrastructure that accelerates silicon development at Annapurna Labs. In this role, you'll contribute to the platforms, tooling, and automation that enable our chip design teams to iterate faster, validate more thoroughly, and bring transformative silicon to market. You'll work at the intersection of cloud infrastructure, high-performance computing, and electronic design automation—building systems that directly impact AWS's ability to innovate in custom silicon. This is a unique opportunity to grow your skills in infrastructure that supports chip development while working with world-class engineers across hardware, software, and operations disciplines. Key job responsibilities Customer-Focused Infrastructure Development • Partner with silicon design, verification, emulation, and software teams to understand their development workflows, pain points, and iteration cycles. • Build tooling and automation that eliminates manual toil and reduces time-to-results. • Gather continuous feedback from internal customers and rapidly iterate on solutions. Benchmark infrastructure based on silicon development workflows to provide internal customers with the optimal resources for silicon development. Own Platform Delivery and Operations • Design, implement, and operate cloud infrastructure and high-performance computing clusters using schedulers like Slurm. • Build and maintain CI/CD pipelines for infrastructure-as-code and service deployments with comprehensive testing and safe rollback mechanisms. • Take ownership of platform reliability, performance, and cost efficiency from initial design through production operation. Drive Results Through Automation and Observability • Develop monitoring, diagnostics, and alerting systems that surface actionable insights on efficiency, utilization, reliability, and cost trends. • Establish incident response processes, runbooks, and documentation that enable operational excellence. • Proactively anticipate system failures and implement preventive measures, reducing operational toil and improving system resilience. A day in the life Each day you will work with some of the best engineers in the industry to develop Machine Learning Accelerators. On-site in Austin, Texas, you will be part of the team that develops custom silicon and contribute to the infrastructure that enables this innovation. You might start your day investigating anomalies in job completion rates or resource utilization patterns. You could spend your morning collaborating with a design verification team to optimize their regression workflows, identifying bottlenecks and proposing improvements. In the afternoon, you might be building new tooling that simplifies infrastructure access for emulation teams, or contributing to monitoring dashboards that give teams real-time visibility into their development velocity. You'll participate in design reviews, contribute to postmortems when incidents occur, and continuously refine the systems that accelerate the path from RTL to silicon. Throughout the day, you'll balance immediate customer needs—unblocking a team waiting for compute capacity —with longer-term platform investments. You'll write code, review infrastructure-as-code changes, and collaborate across teams who depend on the systems you build. Take a look inside our labs to see what you will learn at Annapurna Labs: • https://www.aboutamazon.com/news/aws/take-a-look-inside-the-lab-where-aws-makes- custom-chips • https://youtu.be/rViVFrQg4Hk About the team At Annapurna Labs, your infrastructure work directly enables breakthrough innovations in custom silicon that power AWS and transform industries. You'll collaborate with world-class chip designers, verification engineers, and software developers who are pushing the boundaries of what's possible. We offer the resources and scale of AWS with the innovation culture and technical depth of a focused silicon team. If you're passionate about building infrastructure that accelerates innovation, thrive on customer obsession and ownership, and want to see your work enable the next generation of AWS silicon —we want to hear from you Basic Qualifications: - 3+ years of non-internship professional software development experience - 2+ years of non-internship design or architecture (design patterns, reliability and scaling) of new and existing systems experience - Experience programming with at least one software programming language - 2+ years of non-internship professional software development experience - 2+ years of designing or architecting (design patterns, reliability and scaling) of new and existing systems experience - 3+ years of administrative experience in networking, storage systems, operating systems and hands-on systems engineering experience - Knowledge of systems engineering fundamentals (networking, storage, operating systems) - Experience programming with at least one modern language such as C++, C#, Java, - Python, Golang, PowerShell, Ruby - Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent Preferred Qualifications: - 3+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience - Bachelor's degree in computer science or equivalent - Experience programming with at least one modern language such as Python, Ruby, Golang, Java, C++, C#, Rust with demonstrated ability to write production-quality, maintainable code - • Experience utilizing AWS cloud solutions in a DevOps environment with infrastructure as code (CloudFormation, Terraform, CDK) - • Experience with Linux/Unix - • Experience in automating, deploying, and supporting large-scale infrastructure - • Experience with high-performance computing (HPC) clusters using workload schedulers like Slurm - • Familiarity with semiconductor development workflows or electronic design automation (EDA) environments - • Experience building services using AWS products - • Experience with CI/CD pipelines and build processes - • Experience with monitoring, observability, and incident management at scale Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits . USA, TX, Austin - 143,700.00 - 194,400.00 USD annually", "summaryDescription" : "Software Development Engineer - Silicon Development at Annapurna Labs. Skills: Silicon development infrastructure, Cloud infrastructure, High-performance computing, Electronic design automation. Partner with design teams. Understand development workflows", "postedDate" : "2026-06-13T19:33:16.471", "createdAt" : "2026-06-13T19:33:16.471", "lastUpdated" : "2026-06-15T11:05:24.113", "ingestTimestamp" : "2026-06-13T19:33:16.471", "mongoId" : "69f519c94c40e2acd1eb1c34", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.jobs/jobs/10409008/apply", "salaryAnnualMin" : 70000, "salaryAnnualMax" : 194400, "salaryBand" : "50k-75k", "hasSalary" : true, "allSkills" : [ "Production-quality code", "Maintainable code", "Infrastructure as code", "Service deployments", "Incident response", "Operational excellence", "Silicon development infrastructure", "Cloud infrastructure", "High-performance computing", "Electronic design automation", "System design", "Reliability engineering", "Performance engineering", "Cost efficiency", "Silicon development", "Chip development", "Custom silicon", "Machine Learning Accelerators", "RTL to silicon", "Slurm" ], "skillCount" : 20, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.8888889, "_score" : 735.22546, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a3051f8f292fd229cf09f01", "title" : "Target System Analysis Analyst", "company" : "Accenture Federal Services", "industry" : "Consulting", "salary" : { "min" : 55000.0, "max" : 75000.0, "currency" : "GBP", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level Target System Analysis Analyst in Molesworth, United Kingdom, adjusted for the government industry and company size." }, "location" : "Molesworth, England, United Kingdom", "locations" : [ "Molesworth", "England", "United Kingdom" ], "timestamp" : "2026-06-16T10:37:14.761", "fingerprint" : "2f8285d9b515a28a771b06e68ae9bd1093c3ede299d2d0f5430394e63d65a974", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://boards.greenhouse.io/accenturefederalservices/jobs/4688304006?gh_jid=4688304006", "externalId" : "4688304006", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Molesworth", "state" : "England", "country" : "United Kingdom", "continent" : "eu", "source" : "llm", "workMode" : "onsite", "geo" : "52.3704941,-0.4269704" } ], "locationText" : "Molesworth, England, United Kingdom", "rawDescription" : "At Accenture Federal Services, nothing matters more than helping the US federal government make the nation stronger and safer and life better for people. Our 13,000+ people are united in a shared purpose to pursue the limitless potential of technology and ingenuity for clients across defense, national security, public safety, civilian, and military health organizations. Join Accenture Federal Services, a technology company within global Accenture. Recognized as a Glassdoor Top 100 Best Place to Work, we offer a collaborative and caring community where you feel like you belong and are empowered to grow, learn and thrive through hands-on experience, certifications, industry training and more. Join us to drive positive, lasting change that moves missions and the government forward! The Work As a Target System Analysis (TSA) Analyst, you will analyze all‑source intelligence and produce advanced, decision‑quality target system assessments in a dynamic theater environment. You’ll integrate intelligence into operational planning and contribute across the Joint Targeting Cycle to enable precise, compliant, and operationally relevant effects. Develop advanced Target System Assessments (TSAs) using all‑source methods; synthesize complex data into clear analytic products and briefings for senior stakeholders. Integrate intelligence with operational planning activities, supporting Joint Intelligence Preparation of the Operational Environment (JIPOE/JIOPE) and target development (basic, intermediate, and advanced). Contribute across the Joint Targeting Cycle, including weaponeering inputs, collateral damage estimation (CDE), target validation, and effects assessment. Apply DIA tradecraft (e.g., Center of Gravity and Critical Factors Analysis) and analytic methodologies; maintain rigorous analytic design and documentation standards. Use mission systems and collaboration platforms (e.g., RMT, CHROME, Cedalion, Warpath, MARS, MIDB) to research, fuse, and share intelligence. Coordinate with COCOM J2 targeting cells and joint/coalition partners; ensure alignment with Combatant Command (COCOM) structures, directives, and processes. Produce high‑quality analytical writing, visualizations, and briefings that translate complex findings into actionable insights for operators and planners. Here's What You Need Joint Targeting Fundamentals (JTF) certification is required Knowledge and/or familiarization with the below publications JP 5‑0 (Joint Planning); JP 2‑0 (Joint Intelligence) Target System Analysis (TSA) Working Group document CJCS 3162.01 (Irregular Warfare) Headquarters Joint Operations Center (JOC) J2T Handbook Defense Intelligence Reference Documents (DIRD): Analytic Methodologies; Analytic Design DIA Tradecraft: Center of Gravity & Critical Factors Analysis Joint Staff Director of Intelligence — Joint Guide for JIOPE/JIPOE General familiarity with COCOM‑specific directives and operational frameworks Prior service in a COCOM J2 targeting cell with 3+ years of relevant TSA experience preferred Proficiency with intelligence analysis tools (e.g., RMT, CHROME, Cedalion, Warpath, MARS, MIDB) and collaboration platforms. Eligibility Requirements US Citizen Active TS/SCI clearance Ability to work onsite in Molesworth, UK As required by local law, Accenture Federal Services provides reasonable ranges of compensation for hired roles based on labor costs in the states of California, Colorado, Hawaii, Illinois, Maryland, Massachusetts, Minnesota, New Jersey, New York, Washington, Vermont, the District of Columbia, and the city of Cleveland. The base pay range for this position in these locations is shown below. Compensation for roles at Accenture Federal Services varies depending on a wide array of factors, including but not limited to office location, role, skill set, and level of experience. Accenture Federal Services offers a wide variety of benefits. You can find more information on benefits here. We accept applications on an on-going basis and there is no fixed deadline to apply. The pay range for the states of California, Colorado, Hawaii, Illinois, Maryland, Massachusetts, Minnesota, New Jersey, New York, Washington, Vermont, the District of Columbia, and the city of Cleveland is: $78,600—$160,200 USD What We Believe As a company wholly dedicated to serving the US federal government, we bring together the best talent to help reinvent how federal agencies operate and deliver greater value for their mission and the American people. We have an unwavering commitment to creating a culture in which all our people are respected, feel a sense of belonging, and have equal opportunity. As a business imperative, every person at Accenture Federal Services has the responsibility to create and sustain a culture where everyone feels welcomed and included. This is grounded in our core values and our experience that hiring and developing great people who reflect different perspectives, experiences, and backgrounds is key to driving innovation and delivering the results that our clients and the country count on. Equal Employment Opportunity Statement We believe that no one should be discriminated against because of their differences. All employment decisions shall be made without regard to age, race, creed, color, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by federal, state, or local law. Our rich diversity makes us more innovative, more competitive, and more creative, which helps us better serve our clients and our communities. For details, view a copy of the Accenture Federal Services Equal Opportunity Policy Statement. Accenture Federal Services is an Equal Employment Opportunity employer. Additionally, as an Affirmative Action Employer for Veterans and Individuals with Disabilities, Accenture Federal Services is committed to providing veteran employment opportunities to our service men and women. Requesting An Accommodation Accenture Federal Services is committed to providing equal employment opportunities for persons with disabilities or religious observances, including reasonable accommodation when needed. If you are hired by Accenture Federal Services and require accommodation to perform the essential functions of your role, you will be asked to participate in our reasonable accommodation process. Accommodations made to facilitate the recruiting process are not a guarantee of future or continued accommodations once hired. If you are being considered for employment opportunities with Accenture Federal Services and need an accommodation for a disability or religious observance during the interview process or for the job you are interviewing for, please speak with your recruiter. Other Employment Statements Applicants for employment in the US must have work authorization that does not now or in the future require sponsorship of a visa for employment authorization in the United States. Candidates who are currently employed by a client of Accenture Federal Services or an affiliated Accenture business may not be eligible for consideration. Job candidates will not be obligated to disclose sealed or expunged records of conviction or arrest as part of the hiring process. The Company will not discharge or in any other manner discriminate against employees or applicants because they have inquired about, discussed, or disclosed their own pay or the pay of another employee or applicant. Additionally, employees who have access to the compensation information of other employees or applicants as a part of their essential job functions cannot disclose the pay of other employees or applicants to individuals who do not otherwise have access to compensation information, unless the disclosure is (a) in response to a formal complaint or charge, (b) in furtherance of an investigation, proceeding, hearing, or action, including an investigation conducted by the employer, or (c) consistent with the Company's legal duty to furnish information. California requires additional notifications for applicants and employees. If you are a California resident, live in or plan to work from Los Angeles County upon being hired for this position, please click here for additional important information.", "summaryDescription" : "Target System Analysis Analyst at Accenture Federal Services", "postedDate" : "2026-06-15T23:19:16.338", "createdAt" : "2026-06-15T23:19:16.338", "lastUpdated" : "2026-06-16T10:37:14.761", "ingestTimestamp" : "2026-06-15T23:19:16.338", "mongoId" : "6a3051f8f292fd229cf09f01", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "50k-75k", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.6666667, "_score" : 710.8019, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Government", "llmIndustryConfidence" : 0.95 }, { "id" : "6a307f76f292fd229c0598eb", "title" : "Senior Silicon Engineer- P and D- (gCPU), Design Verification (multiple openings)", "industry" : "Technology", "salary" : { "min" : 175000.0, "max" : 250000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Senior Silicon Engineer in Austin, United States, adjusted for industry and seniority." }, "location" : "[Austin, TX, USA, [500 W 2nd St, Austin, TX 78701, USA], Austin, 78701, TX, US]", "locations" : [ "[Austin, TX, USA, [500 W 2nd St, Austin, TX 78701, USA], Austin, 78701, TX, US]" ], "timestamp" : "2026-06-16T12:37:37.765", "fingerprint" : "efc736301e95699306b842aa2f659d7d410cdd9c5af246eb45c46b8d129cb36c", "source" : "google", "language" : "en", "externalId" : "134298443374830278", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Austin", "state" : "Texas", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "30.2711286,-97.7436995" } ], "locationText" : "Austin, Texas, United States", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "workSiteFlexibility" : "Onsite", "summaryDescription" : "Senior Silicon Engineer- P and D- (gCPU), Design Verification (multiple openings)", "postedDate" : "2026-06-16T01:49:04.043", "createdAt" : "2026-06-16T01:49:04.043", "lastUpdated" : "2026-06-16T12:37:37.765", "ingestTimestamp" : "2026-06-16T01:49:04.043", "mongoId" : "6a307f76f292fd229c0598eb", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 175000, "salaryAnnualMax" : 250000, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.5555556, "_score" : 709.1839, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a210e3e74d8ee00a0af66e4", "title" : "Staff Front-End CAD Engineer, Silicon", "industry" : "Technology", "salary" : { "min" : 220000.0, "max" : 300000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Staff Front-End CAD Engineer in San Diego, adjusted for lead seniority and the technology industry." }, "location" : "[San Diego, CA, USA, [San Diego, CA, USA], San Diego, null, CA, US]", "locations" : [ "[San Diego, CA, USA, [San Diego, CA, USA], San Diego, null, CA, US]", "[Mountain View, CA, USA, [Mountain View, CA, USA], Mountain View, null, CA, US]" ], "timestamp" : "2026-06-16T10:56:38.835", "fingerprint" : "ecde316ad23018d5234d395dfb6af2a9a1c58367534204ac19c0dacb9025c0cb", "source" : "google", "language" : "en", "externalId" : "83747129272476358", "industryFunction" : { }, "structuredLocations" : [ { "city" : "San Diego", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "32.7174202,-117.1627720" } ], "locationText" : "San Diego, California, United States", "experienceMinYears" : 8, "experienceMaxYears" : 15, "experienceLevel" : "Staff", "summaryDescription" : "Staff Front-End CAD Engineer, Silicon", "postedDate" : "2026-06-16T01:48:21.025", "createdAt" : "2026-06-16T01:48:21.025", "lastUpdated" : "2026-06-16T10:56:38.835", "ingestTimestamp" : "2026-06-16T01:48:21.025", "mongoId" : "6a210e3e74d8ee00a0af66e4", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 220000, "salaryAnnualMax" : 300000, "salaryBand" : "200k+", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Lead", "dataQualityScore" : 0.5555556, "_score" : 689.20447, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a210e3374d8ee00a0af6359", "title" : "Software Engineer Manager II, Silicon Tools", "industry" : "Technology", "salary" : { "min" : 2200000.0, "max" : 3500000.0, "currency" : "TWD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Software Engineer Manager II in New Taipei City, Taiwan, adjusted for the technology industry and manager seniority." }, "location" : "[New Taipei, Banqiao District, New Taipei City, Taiwan, [Banqiao District, New Taipei City, Taiwan 220], null, 220, New Taipei City, TW]", "locations" : [ "[New Taipei, Banqiao District, New Taipei City, Taiwan, [Banqiao District, New Taipei City, Taiwan 220], null, 220, New Taipei City, TW]" ], "timestamp" : "2026-06-16T12:32:28.016", "fingerprint" : "9ed965af5439fb3a9c208ca2106054772e62b9ff57269f27dac612103bc55245", "source" : "google", "language" : "en", "externalId" : "137160042544538310", "industryFunction" : { }, "structuredLocations" : [ { "city" : "New Taipei City", "country" : "Taiwan", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "25.0834547,121.4755340" } ], "locationText" : "New Taipei City, Taiwan", "experienceLevel" : "Manager", "summaryDescription" : "Software Engineer Manager II, Silicon Tools", "postedDate" : "2026-06-16T01:48:09.802", "createdAt" : "2026-06-16T01:48:09.802", "lastUpdated" : "2026-06-16T12:32:28.016", "ingestTimestamp" : "2026-06-16T01:48:09.802", "mongoId" : "6a210e3374d8ee00a0af6359", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Manager", "dataQualityScore" : 0.5555556, "_score" : 689.1967, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a2cca1d74d8ee00a0a2245e", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-15T05:08:43.474", "fingerprint" : "3467628b32ed5a4eef84a63bb65e131e76ae703372ba1af98f3355c6552f824f", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785276", "externalId" : "785276", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design development", "Presentation graphics" ], "hardSkillsList" : [ "Model-making" ], "hardSkills" : [ { "name" : "Model-making", "level" : "intermediate" } ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments, Participate in architectural design, Develop alternative solutions, Develop presentation graphics, Follow through on design development, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Knowledge sharing; Teamwork", "domainKnowledge" : "Architecture; Social infrastructure; Mass timber; Institutional projects; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing", "domainList" : [ "architecture", "social-infrastructure", "mass-timber", "institutional-projects", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing" ], "domainSpecificKnowledge" : [ "Architecture", "Social infrastructure", "Mass timber", "Institutional projects", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "communicationSkills" : "Presentation graphics", "continuousLearning" : "Tuition reimbursement", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments. Participate in architectural design", "createdAt" : "2026-06-14T07:50:04.630", "lastUpdated" : "2026-06-15T05:08:43.474", "ingestTimestamp" : "2026-06-14T07:50:04.630", "mongoId" : "6a2cca1d74d8ee00a0a2245e", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "Model-making", "User experience", "Interface design", "Visual design", "Design systems", "Design development", "Presentation graphics", "Architecture", "Social infrastructure", "Mass timber", "Institutional projects", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 20, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 688.52704, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "6a2ea02b74d8ee00a0e407cf", "title" : "Staff Engineer, system design engineering", "company" : "Sandisk", "industry" : "Computer Hardware", "location" : "Milpitas, CA, United States", "locations" : [ "Milpitas", "CA", "United States" ], "certifications" : [ ], "timestamp" : "2026-06-15T13:16:06.751", "fingerprint" : "3807b570b83f52106ffa1de763796195e620a58f8698576a0eb8fe422fdfb989", "source" : "smartrecruiters", "applyUrl" : "https://jobs.smartrecruiters.com/Sandisk/744000131991375-staff-engineer-system-design-engineering", "externalId" : "744000131991375", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Milpitas", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite" } ], "locationText" : "Milpitas, California, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "mid", "technicalSkills" : "Python, C/C++, Shell scripts, AI frameworks, GPU computing", "professionalSkills" : [ "AI workloads, system architectures, performance characterization methodologies, modern AI infrastructure environments, Chat Assistants, LLM inference, Retrieval-Augmented Generation (RAG), Speech AI, Vision AI, multimodal AI, recommendation systems, Image/Video Generation workloads, Vector DB & KV cache, storage systems, training and inference." ], "hardSkillsList" : [ "Bachelor’s degree in Computer Science or Computer Engineering with 5+ years of experience", "Master’s degree in Computer Science or Computer Engineering with 2+ years of experience", "Scripting and/or programming languages, such as Shell scripts, Python, C/C++ are required", "AI Infrastructure & Hardware Awareness – GPU/CPU architecture basics", "Experience in Performance & Benchmarking – profiling tools, system bottlenecks", "Debugging knowledge on performance bottlenecks in AI pipelines", "Experience in deriving data movement costs on Edge platforms" ], "hardSkills" : [ { "name" : "Bachelor’s degree in Computer Science or Computer Engineering with 5+ years of experience", "level" : "intermediate" }, { "name" : "Master’s degree in Computer Science or Computer Engineering with 2+ years of experience", "level" : "intermediate" }, { "name" : "Scripting and/or programming languages, such as Shell scripts, Python, C/C++ are required", "level" : "intermediate" }, { "name" : "AI Infrastructure & Hardware Awareness – GPU/CPU architecture basics", "level" : "intermediate" }, { "name" : "Experience in Performance & Benchmarking – profiling tools, system bottlenecks", "level" : "intermediate" }, { "name" : "Debugging knowledge on performance bottlenecks in AI pipelines", "level" : "intermediate" }, { "name" : "Experience in deriving data movement costs on Edge platforms", "level" : "intermediate" } ], "majorSkills" : "system design, AI infrastructure, performance characterization, benchmark development, performance analysis", "majorSkillsList" : [ "system design, AI infrastructure, performance characterization, benchmark development, performance analysis" ], "coreResponsibilities" : "Designing, defining, implementing, and enabling comprehensive benchmark tests for AI infrastructure platforms, including box-level GPU systems, multi-GPU servers, and GPU rack-scale deployments. Translating business and customer use cases into measurable performance validation strategies. Developing benchmark proposals, defining evaluation methodologies, and executing performance studies for a wide range of AI applications. Evaluating AI workloads across different hardware configurations to compare scalability, latency, throughput, power efficiency, and cost-performance metrics. Collaborating with internal and external partners to enable emerging AI models, benchmark suites, and infrastructure technologies.", "teamCollaboration" : "Work closely with Marketing, Product Management and System Architecture teams. Collaborating with internal and external partners. Work with cross-functional teams for POC and architecture discussions for validation infrastructure.", "toolProficiency" : [ "NVLink, NVSwitch" ], "documentationSkills" : "performance reports", "continuousLearning" : "Research and implement innovative ways to validate PCIe/NVMe SSD debug infrastructure.", "innovationCreativity" : "Research and innovate Benchmarks for AI workloads on storage specific to Inference & training for major models. Research and implement innovative ways to validate PCIe/NVMe SSD debug infrastructure.", "problemSolvingSkills" : "system design; performance bottlenecks; system architectures; distributed systems", "specialRequirements" : "Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person’s gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the \"Know Your Rights: Workplace Discrimination is Illegal\" poster. Our pay transparency policy is available here. Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at jobs. accommodations@sandisk. com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.", "outcomesObjectives" : "Enable comprehensive benchmark tests for AI infrastructure platforms. Translate business and customer use cases into measurable performance validation strategies. Generate detailed performance reports with actionable insights. Ensure reproducibility, automation, and continuous benchmarking capabilities within AI lab environments.", "qualificationsBasic" : "Bachelor’s degree in Computer Science or Computer Engineering with 5+ years of experience, or a Master’s degree in Computer Science or Computer Engineering with 2+ years of experience. Experience with different Operating Systems (Windows, Linux, VMware). Scripting and/or programming languages, such as Shell scripts, Python, C/C++ are required. AI Infrastructure & Hardware Awareness – GPU/CPU architecture basics. Experience in Performance & Benchmarking – profiling tools, system bottlenecks. Debugging knowledge on performance bottlenecks in AI pipelines. Experience in deriving data movement costs on Edge platforms.", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. The ideal candidate will be responsible for designing, defining, implementing, and enabling comprehensive benchmark tests for AI infrastructure platforms, including box-level GPU systems, multi-GPU servers, and GPU rack-scale deployments. This role requires a strong understanding of AI workloads, system architectures, and performance characterization methodologies across modern AI infrastructure environments. The individual will work closely with Marketing, Product Management and System Architecture teams to understand benchmark requirements and translate business and customer use cases into measurable performance validation strategies. The candidate will develop benchmark proposals, define evaluation methodologies, and execute performance studies for a wide range of AI applications, including Chat Assistants and LLM inference, Retrieval-Augmented Generation (RAG), Speech AI, Vision AI, multimodal AI, recommendation systems, and Image/Video Generation workloads. Responsibilities include selecting and optimizing benchmark frameworks, configuring AI software stacks, validating hardware and software performance, analyzing bottlenecks across compute, memory, storage, and networking subsystems, and generating detailed performance reports with actionable insights. The candidate will evaluate AI workloads across different hardware configurations such as GPUs, CPUs, accelerators, high-speed interconnects, NVLink/NVSwitch fabrics, storage architectures, and network fabrics to compare scalability, latency, throughput, power efficiency, and cost-performance metrics. The role also involves collaborating with internal and external partners to enable emerging AI models, benchmark suites, and infrastructure technologies, while ensuring reproducibility, automation, and continuous benchmarking capabilities within AI lab environments. Strong analytical, scripting, and performance tuning skills are essential, along with hands-on experience in AI frameworks, GPU computing, distributed inference environments, and performance monitoring tools. Essential Duties and Responsibilities: •Design & Validate AI Infrastructure for Benchmarks •Analysis of Benchmarks for End-to-end AI Infrastructure and develop test environment for Benchmark tests •Define and Perform Benchmark tests for AI workloads on storage systems •Evaluate GPU vs CPU vs storage bottlenecks in AI pipelines •Research and innovate Benchmarks for AI workloads on storage specific to Inference & training for major models •Design Benchmarks for Vector DB & KV cache •Optimize Data pipelines for Inference and training •Analyze Benchmark results, document and publish with recommendations Research and implement innovative ways to validate PCIe/NVMe SSD debug infrastructure. Work with cross-functional teams for POC and architecture discussions for validation infrastructure. ## Qualifications Required: * Bachelor’s degree in Computer Science or Computer Engineering with 5+ years of experience, or a Master’s degree in Computer Science or Computer Engineering with 2+ years of experience. Skills : * Experience with different Operating Systems (Windows, Linux, VMware). * Scripting and/or programming languages, such as Shell scripts, Python, C/C++ are required. * AI Infrastructure & Hardware Awareness – GPU/CPU architecture basics * Experience in Performance & Benchmarking – profiling tools, system bottlenecks * Debugging knowledge on performance bottlenecks in AI pipelines * Experience in deriving data movement costs on Edge platforms ## Additional Information Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person’s gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person’s assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the \"[Know Your Rights: Workplace Discrimination is Illegal](https://www.eeoc.gov/sites/default/files/2023-06/22-088EEOCKnowYourRights6.12.pdf)” poster. Our pay transparency policy is available [here](https://www.dol.gov/sites/dolgov/files/OFCCP/pdf/pay-transp%20EnglishformattedESQA508c.pdf). Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution. Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at [jobs.accommodations@sandisk.com](mailto:jobs.accommodations@sandisk.com) to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying. Based on our experience, we anticipate that the application deadline will be 08/12/2026 (3 months from posting), although we reserve the right to close the application process sooner if we hire an applicant for this position before the application deadline. If we are not able to hire someone from this role before the application deadline, we will update this posting with a new anticipated application deadline. #LI-KH1 Compensation & Benefits Details * An employee’s pay position within the salary range may be based on several factors including but not limited to (1) relevant education; qualifications; certifications; and experience; (2) skills, ability, knowledge of the job; (3) performance, contribution and results; (4) geographic location; (5) shift; (6) internal and external equity; and (7) business and organizational needs. * The salary range is what we believe to be the range of possible compensation for this role at the time of this posting. We may ultimately pay more or less than the posted range and this range is only applicable for jobs to be performed in California, Colorado, New York or remote jobs that can be performed in California, Colorado and New York. This range may be modified in the future. * You will be eligible to participate in Sandisk's Short-Term Incentive (STI) Plan, which provides incentive awards based on Company and individual performance. Depending on your role and your performance, you may be eligible to participate in our annual Long-Term Incentive (LTI) program, which consists of restricted stock units (RSUs) or cash equivalents, pursuant to the terms of the LTI plan. Please note that not all roles are eligible to participate in the LTI program, and not all roles are eligible for equity under the LTI plan. RSU awards are also available to eligible new hires, subject to Sandisk's Standard Terms and Conditions for Restricted Stock Unit Awards. * We offer a comprehensive package of benefits including paid vacation time; paid sick leave; medical/dental/vision insurance; life, accident and disability insurance; tax-advantaged flexible spending and health savings accounts; employee assistance program; other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity; tuition reimbursement; transit; the Applause Program, employee stock purchase plan, and the Sandisk's Savings 401(k) Plan. * Note: No amount of pay is considered to be wages or compensation until such amount is earned, vested, and determinable. The amount and availability of any bonus, commission, benefits, or any other form of compensation and benefits that are allocable to a particular employee remains in the Company's sole discretion unless and until paid and may be modified at the Company’s sole discretion, consistent with the law.", "summaryDescription" : "Staff Engineer, system design engineering at Sandisk. Skills: system design, AI infrastructure, performance characterization, benchmark development, performance analysis. Designing, defining, implementing, and enabling comprehensive benchmark tests for AI infrastructure platforms, including box-level GPU systems, multi-GPU servers, and GPU rack-scale deployments. Translating business and customer use cases into measurable performance validation strategies. Developing benchmark proposals, definin", "postedDate" : "2026-06-12T21:43:14.000", "createdAt" : "2026-06-14T20:58:54.107", "lastUpdated" : "2026-06-15T13:16:06.751", "ingestTimestamp" : "2026-06-14T20:58:54.107", "mongoId" : "6a2ea02b74d8ee00a0e407cf", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "hasSalary" : false, "allSkills" : [ "Bachelor’s degree in Computer Science or Computer Engineering with 5+ years of experience", "Master’s degree in Computer Science or Computer Engineering with 2+ years of experience", "Scripting and/or programming languages, such as Shell scripts, Python, C/C++ are required", "AI Infrastructure & Hardware Awareness – GPU/CPU architecture basics", "Experience in Performance & Benchmarking – profiling tools, system bottlenecks", "Debugging knowledge on performance bottlenecks in AI pipelines", "Experience in deriving data movement costs on Edge platforms", "system design, AI infrastructure, performance characterization, benchmark development, performance analysis", "AI workloads, system architectures, performance characterization methodologies, modern AI infrastructure environments, Chat Assistants, LLM inference, Retrieval-Augmented Generation (RAG), Speech AI, Vision AI, multimodal AI, recommendation systems, Image/Video Generation workloads, Vector DB & KV cache, storage systems, training and inference.", "NVLink, NVSwitch" ], "skillCount" : 10, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Lead", "dataQualityScore" : 0.8888889, "_score" : 681.01184, "daysOld" : 2, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a3086dbf292fd229c083e0b", "title" : "Micro-Architect and RTL Designer", "company" : "MatX", "industry" : "Technology", "salary" : { "min" : 200000.0, "max" : 300000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Senior Micro-Architect and RTL Designer in Mountain View, United States, adjusted for industry and company size." }, "location" : "Mountain View", "locations" : [ "Mountain View" ], "timestamp" : "2026-06-16T11:17:44.757", "fingerprint" : "140e8862013e44475b8a856dfd26617efe171142062c9da768970886ced55618", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/matx/jobs/5263624008", "externalId" : "5263624008", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Mountain View", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "hybrid", "geo" : "37.3893889,-122.0832101" } ], "locationText" : "Mountain View, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 4, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "SystemVerilog, Python, C/C++, ASICs, SOCs", "professionalSkills" : [ "Chip design", "Silicon design", "Micro-architecture", "Design specifications", "Area closure", "Timing closure" ], "hardSkillsList" : [ "Silicon micro-architecture", "Silicon design concepts", "Design synthesis", "Design lint" ], "hardSkills" : [ { "name" : "Silicon micro-architecture", "level" : "intermediate" }, { "name" : "Silicon design concepts", "level" : "intermediate" }, { "name" : "Design synthesis", "level" : "intermediate" }, { "name" : "Design lint", "level" : "intermediate" } ], "majorSkills" : "Micro-architecture, RTL Design, Silicon design", "majorSkillsList" : [ "Micro-architecture", "RTL Design", "Silicon design" ], "coreResponsibilities" : "Contribute to silicon architecture-to-design methodology, Own subsystem or subsets, Own chip-level silicon design deliverables, Plan reviews on micro-architecture, Plan reviews on design specifications, Plan reviews on execution progress, Plan reviews on area closure, Plan reviews on timing closure, Drive reviews on micro-architecture, Drive reviews on design specifications, Drive reviews on execution progress, Drive reviews on area closure, Drive reviews on timing closure, Work closely with verification co-owners, Work closely with DFT co-owners, Work closely with physical design co-owners, Deliver best-in-class performance-power-area results", "teamCollaboration" : "Work closely with verification; Work closely with DFT; Work closely with physical design", "domainKnowledge" : "High-performance compute; High-speed connectivity; Memory management; Caches; Buffers; Crossbars", "domainList" : [ "high-performance-compute", "high-speed-connectivity", "memory-management", "caches", "buffers", "crossbars" ], "domainSpecificKnowledge" : [ "High-performance compute", "High-speed connectivity", "Memory management", "Caches", "Buffers", "Crossbars" ], "documentationSkills" : "Design specifications", "continuousLearning" : "Professional development", "problemSolvingSkills" : "Performance closure; Coverage closure", "specialRequirements" : "Authorized to work in US, U.S. export controls", "outcomesObjectives" : "Deliver performant silicon; Deliver functionally accurate silicon", "qualificationsBasic" : "4 years or more experience with SystemVerilog, 4 years or more experience with Python, 4 years or more experience with C/C++, Production-proven experience on silicon micro-architecture, Production-proven experience on silicon design concepts, Experience with testing designs, Hands-on experience with design synthesis, Hands-on experience with design lint", "qualificationsPreferred" : "Familiarity with verification platforms is a plus, Familiarity with emulation platforms is a plus, Experience with high speed I/O IP is a plus, Experience with logic that focuses on moving data is a plus, Experience with logic that focuses on storing data is a plus, Experience with logic that focuses on managing data is a plus", "remoteFriendly" : true, "workSiteFlexibility" : "Hybrid", "rawDescription" : "What MatX Is Building MatX is on a mission to be the compute platform for AGI. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the largest ML workloads for AGI. MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for these roles will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies. What You'll Do Here Contribute to MatX’s silicon architecture-to-design methodology with a scalable solution across blocks, subsystems, fullchip design Own entire subsystem or subsets and/or chip-level silicon design deliverables from micro-architecture to sign-off ready design Plan and drive intermediate and sign-off reviews on micro-architecture and design specifications, execution progress, area and timing closure towards various silicon milestones including design freeze and tapeout Work closely with the verification, DFT, and physical design co-owners of the subsystem/block in question and deliver best-in-class performance-power-area results Who You Are Concept-to-silicon experience in driving silicon design for subsystems and/or top-level functions with ASICs and SOCs from an architecture specification to production silicon 4 years or more experience with SystemVerilog, Python, C/C++ and similar scripting and programming languages for chip design and related flows Production-proven experience on silicon micro-architecture and design concepts used in high-performance compute (CPUs, GPUs, accelerators), high-speed connectivity, memory management and related functionalities Experience with testing your designs and working closely with verification teams towards performance and coverage closure goals Hands-on experience with design synthesis, design lint, and related flows to take designs to high quality sign-off Familiarity with verification, emulation platforms and methodologies is a plus Experience with high speed I/O IP is a plus A lot of experience with logic that focuses on moving, storing, or managing data such as caches, buffers, crossbars, etc… is a plus This is a hybrid role that will require you to work from our Mountain View, CA office 3 days a week on Tuesday through Thursday Compensation The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation. Early Career - $120,000 - $275,000 + equity Mid Career - $175,000 - $450,000 + equity Senior Career - $275,000 - $600,000 + equity What We Offer A Stake in our success A cash/equity mix that fits your needs and option to do early exercise Health Pre-tax Health Savings Accounts with generous company contribution (even if you don’t) Time To Recharge 4 weeks paid time off (accrued), 12 company holidays, and 3 weeks remote/flexible work per year Support to Parents Up to 12 weeks of paid parental leave, regardless of your path to parenthood Learning & Development $1,500 yearly towards your professional development e. g. conferences, courses, and other learning opportunities Team Connection Team Lunches, quarterly off-sites, and regular town halls Financial Wellbeing 401K and/or Roth IRA, with 5% company contribution, even if you don’t! Flexible Spending Accounts Pre-tax spend accounts for medical, dental/vision, dependent care, parking, and transit expenses Commute On Us For those commuting up to 1 hour, put your rideshare cost on our company card and reclaim the drive-time to get work done! MatX E[x]tras $50 per month to use on the perks you care about most Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi expense reimbursement As part of our dedication to the diversity of our team and our focus on creating an inviting and inclusive work experience, MatX is committed to a policy of Equal Employment Opportunity and will not discriminate against an applicant or employee on the basis of race, color, religion, creed, national origin or ancestry, sex, gender, gender identity, gender expression, sexual orientation, age, physical or mental disability, medical condition, marital/domestic partner status, military and veteran status, genetic information or any other legally recognized protected basis under federal, state or local laws, regulations or ordinances. All candidates must be authorized to work in the United States and work from our offices in Mountain View Tuesdays-Thursdays. This position requires access to information that is subject to U. S. export controls. This offer of employment is contingent upon the applicants capacity to perform job functions in compliance with U. S. export control laws without obtaining a license from U. S. export control authorities. MatX does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to our hiring managers or People team and any resumes submitted are deemed to be the property of MatX.", "summaryDescription" : "Micro-Architect and RTL Designer at MatX. Skills: Micro-architecture, RTL Design, Silicon design. Contribute to silicon architecture-to-design methodology. Own subsystem or subsets", "postedDate" : "2026-06-16T01:21:01.510", "createdAt" : "2026-06-16T01:21:01.510", "lastUpdated" : "2026-06-16T11:17:44.757", "ingestTimestamp" : "2026-06-16T01:21:01.510", "mongoId" : "6a3086dbf292fd229c083e0b", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 200000, "salaryAnnualMax" : 300000, "salaryBand" : "200k+", "hasSalary" : true, "allSkills" : [ "Silicon micro-architecture", "Silicon design concepts", "Design synthesis", "Design lint", "Micro-architecture", "RTL Design", "Silicon design", "Chip design", "Design specifications", "Area closure", "Timing closure", "High-performance compute", "High-speed connectivity", "Memory management", "Caches", "Buffers", "Crossbars" ], "skillCount" : 17, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 1.0, "_score" : 680.4745, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a2cca1d74d8ee00a0a2245d", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "industry" : "Consulting", "salary" : { "min" : 21.0, "max" : 26.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Canada-British Columbia-Vancouver", "locations" : [ "Canada-British Columbia-Vancouver" ], "timestamp" : "2026-06-15T08:06:08.576", "fingerprint" : "ad37ad579b4ce8d6184bc1a6ba491fb6654d5d50cb4b55c7b01c1629c8cef992", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=785316", "externalId" : "785316", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Vancouver", "state" : "British Columbia", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "49.2608724,-123.1139520" } ], "locationText" : "Vancouver, British Columbia, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "Revit, Photoshop, Rhino, Grasshopper, Enscape", "professionalSkills" : [ "Design development", "Presentation graphics" ], "hardSkillsList" : [ "Model-making" ], "hardSkills" : [ { "name" : "Model-making", "level" : "intermediate" } ], "majorSkills" : "User experience, Interface design, Visual design, Design systems", "majorSkillsList" : [ "User experience", "Interface design", "Visual design", "Design systems" ], "coreResponsibilities" : "Perform assignments, Participate in architectural design, Develop alternative solutions, Develop presentation graphics, Follow through on design development, Collaborate with production staff", "teamCollaboration" : "Collaborative studios; Knowledge sharing; Teamwork", "domainKnowledge" : "Architecture; Social infrastructure; Mass timber; Institutional projects; Post-secondary institutions; Hospital campuses; Community centers; Affordable housing", "domainList" : [ "architecture", "social-infrastructure", "mass-timber", "institutional-projects", "post-secondary-institutions", "hospital-campuses", "community-centers", "affordable-housing" ], "domainSpecificKnowledge" : [ "Architecture", "Social infrastructure", "Mass timber", "Institutional projects", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing" ], "toolProficiency" : [ "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "communicationSkills" : "Presentation graphics", "continuousLearning" : "Tuition reimbursement", "qualificationsBasic" : "2 years completed toward degree, 3.0+ GPA", "qualificationsPreferred" : "Demonstrated knowledge of software packages, Experience working with Revit, Experience with physical model-making, Experience using Enscape and rendering", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At HDR, our employee-owners are fully engaged in creating a welcoming environment where each of us is valued and respected, a place where everyone is empowered to bring their authentic selves and novel ideas to work every day. As we foster a culture of inclusion throughout our company and within our communities, we constantly ask ourselves: What is our impact on the world? Watch Our Story: ' https://www.hdrinc.com/our-story' Each and every role throughout our organization makes a difference in our ability to change the world for the better. Read further to learn how you could help make great things possible not only in your community, but around the world. We believe architecture is more than designing buildings, it’s about providing solutions to societal challenges and creating stronger, more vibrant communities. As part of our Architecture practice at HDR, you’ll contribute to the design and delivery of spaces and experiences that advance community well-being around the world. From healing environments and learning spaces to research labs and civic landmarks and infrastructure, your work will directly influence how individuals experience the world around them. We bring together architects, planners, designers, and technical experts to solve complex design challenges with creativity, curiosity, and collaboration. From championing design excellence with an emphasis on resilience and sustainability to pioneering innovative building technologies, your contributions will leave a lasting impact on the built environment. This isn’t just a job, it’s a chance to drive meaningful change and help define the future of our communities. Our British Columbia offices, located in Vancouver, Victoria and Penticton specialize in design of institutional and public-facing projects including major social infrastructure projects, mass timber, and post-secondary institutions. We work in collaborative studios across offices, pairing our local knowledge and deep project experience with leading edge expertise from around the globe. We specialize in complex, medium-to-large scale projects that leave a significant legacy in our communities, such as hospital campuses, post-secondary facilities and housing, community centers, and affordable housing. In addition to project work, we host weekly design social events to share our expertise, project work and personal interests. We also host a range of sporting events and other social events such as architectural film screenings. Our staff actively teach at UBC's School of Architecture and Landscape Architecture and can plug you into broader industry and academic events during your time in Vancouver. We want to build a better future, so we bring our talents together to add value, promote growth and inspire positive change. HDR is a place where you can accomplish as much as you're willing to, in your work and in your career. We rally behind a good idea - and each other. Led by the strength of our values and a culture shaped by employee ownership, we network with each other, build on each other's contributions and collaborate to make great things possible. This position is full-time and based in our downtown Vancouver office, beginning in September 2026 for a duration of 4, 8, or 12 months. In the role of Design Co-op: Perform assignments under the direct supervision of Architects, Project Managers and other professionals Participate in the architectural design process, and develop alternative solutions and presentation graphics used to communicate concepts to clients or for agency approval Follow through on design development drawings and models, and collaborate with production staff for technical details and completion of construction drawings Other duties as needed Preferred Qualifications Demonstrated knowledge of software packages related to field of study/industry (particularly Revit, Photoshop, Rhino and Grasshopper) Must be a team player and enjoy working in an open studio environment where knowledge sharing, communication and teamwork determine success 2 years completed toward degree with 3.0+ GPA Experience working with Revit Experience with physical model-making Experience using Enscape and rendering We provide a comprehensive benefits package that promotes employee ownership, employee health, performance, and success, which includes medical, dental, vision, short and long-term disability, life insurance, an employee assistance program, paid time away, parental leave, paid holidays, a retirement savings plan with employer match, employee referral bonus and tuition reimbursement. The expected compensation range for this position depends upon skills, experience, education and geographical location. (Stated benefits are for full-time regular positions. Temporary and part-time roles eligible for limited benefits.) The hourly pay range for Vancouver: %2421.00- %2426.00", "summaryDescription" : "Design Co-op (Fall 2026) at HDR. Skills: User experience, Interface design, Visual design, Design systems. Perform assignments. Participate in architectural design", "createdAt" : "2026-06-14T02:17:02.817", "lastUpdated" : "2026-06-15T08:06:08.576", "ingestTimestamp" : "2026-06-14T02:17:02.817", "mongoId" : "6a2cca1d74d8ee00a0a2245d", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "Model-making", "User experience", "Interface design", "Visual design", "Design systems", "Design development", "Presentation graphics", "Architecture", "Social infrastructure", "Mass timber", "Institutional projects", "Post-secondary institutions", "Hospital campuses", "Community centers", "Affordable housing", "Revit", "Photoshop", "Rhino", "Grasshopper", "Enscape" ], "skillCount" : 20, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 669.363, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Architecture & Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "6a2ca35c74d8ee00a09ab63c", "title" : "Senior GNC Performance Engineer", "company" : "Relativity Space", "industry" : "Manufacturing", "salary" : { "min" : 148000.0, "max" : 203500.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Long Beach, California, United States", "locations" : [ "Long Beach", "California", "United States" ], "timestamp" : "2026-06-15T09:26:43.056", "fingerprint" : "38ddee0000b772b1304097359888cc341f527e700e4d4de43da1fac8f59dcfc0", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://boards.greenhouse.io/relativity/jobs/8589083002?gh_jid=8589083002", "externalId" : "8589083002", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Long Beach", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "33.7690164,-118.1916040" } ], "locationText" : "Long Beach, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Python, Julia, MATLAB", "professionalSkills" : [ "Design trade analyses", "End-to-end ownership", "Interdisciplinary design" ], "hardSkillsList" : [ "Simulation processes" ], "hardSkills" : [ { "name" : "Simulation processes", "level" : "intermediate" } ], "majorSkills" : "GNC Performance, Trajectory design, System simulation", "majorSkillsList" : [ "GNC Performance", "Trajectory design", "System simulation" ], "coreResponsibilities" : "Integrate design data into simulations, Develop software tooling, Optimize launch trajectories, Optimize orbital trajectories, Lead interdisciplinary design trade analyses, Inform critical decisions, Define vehicle design requirements, Define trajectory design requirements, Maintain vehicle design requirements, Maintain trajectory design requirements, Implement software tooling, Maintain software tooling, Improve software tooling, Establish cross-functional collaboration, Lead cross-functional collaboration", "teamCollaboration" : "Key design teams; Partner teams; Cross-functional collaboration", "domainKnowledge" : "Launch vehicle trajectory; Space systems; Customer missions; Orbital trajectories; Vehicle design; ConOps", "domainList" : [ "launch-vehicle-trajectory", "space-systems", "customer-missions", "orbital-trajectories", "vehicle-design", "conops" ], "domainSpecificKnowledge" : [ "Launch vehicle trajectory", "Space systems", "Customer missions", "Orbital trajectories", "Vehicle design", "ConOps" ], "problemSolvingSkills" : "Solve complex problems", "qualificationsBasic" : "2+ years relevant work experience, Degree in Engineering, Computer Science, Physics, or related field, Direct experience on rocketry, space systems, or complex hardware", "qualificationsPreferred" : "Familiarity with launch vehicle trajectory design, Leading contributor on complex multi-disciplinary engineering analysis projects, Prior work in a startup environment, Experience with advanced software development practices, Experience with Docker, Experience with CI/CD, Experience with dependency management", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At Relativity Space, we’re building rockets to serve today’s needs and tomorrow’s breakthroughs. Our Terran R vehicle will deliver customer payloads to orbit, meeting the growing demand for launch capacity. But that’s just the start. Achieving commercial success with Terran R will unlock new opportunities to advance science, exploration, and innovation, pioneering progress that reaches beyond the known. Joining Relativity means becoming part of something where autonomy, ownership, and impact exist at every level. Here, you're not just executing tasks; you're solving problems that haven’t been solved before, helping develop a rocket, a factory, and a business from the ground up. Whether you’re in propulsion, manufacturing, software, avionics, or a corporate function, you’ll collaborate across teams, shape decisions, and see your work come to life in record time. Relativity is a place where creativity and technical rigor go hand in hand, and your voice will help define the stories we’re writing together. Now is a unique moment in time where it’s early enough to leave your mark on the product, the process, and the culture, but far enough along that Terran R is tangible and picking up momentum. The most meaningful work of your career is waiting. Join us. About the Team: The Integrated Performance team owns the holistic view of how Terran R comes together, ensuring that every system on the vehicle and ground is capable of achieving our ambitious objectives. The team works across the full launch system, from trajectory design and aerodynamics to reliability analysis and beyond, with direct influence on all parts of the product lifecycle, from conceptual design to post-flight data review. Beyond analysis, team members engage hands-on with hardware and operations, with the mission and authority to drive meaningful programmatic change. With a unique organizational structure, the integrated performance team spans multiple technical domains and embeds directly with partner teams to solve the hardest multi-disciplinary problems. The team operates with a rare scale: large enough to support complex development, yet small enough that individual contributors have meaningful impact. About the Role: Closely collaborate with key design teams to integrate the latest design data into full simulations of customer missions Develop and leverage software tooling to optimize launch and orbital trajectories across key customer missions Lead interdisciplinary design trade analyses to inform critical decisions about the vehicle, mission trajectories, and ConOps Define and maintain high-level vehicle and trajectory design requirements to inform the overall design process Implement, maintain, and improve software tooling across a variety of languages, from core simulation capabilities to peripheral analysis utilities Establish and lead cross-functional collaboration with key teams across Vehicle Engineering About You: An undergraduate or graduate degree (BS/MS/PhD) in Engineering, Computer Science, Physics, or a related field 2+ years of relevant full-time work experience with demonstrated ability to solve complex problems from first principles Direct experience on rocketry, space systems, or equally complex hardware systems Strong proficiency in high-level programming languages (e. g. Python, Julia, MATLAB) and setting up complex simulation processes Ability to complete projects with end-to-end ownership and a high degree of independence Comfortable working in a fast-paced and intense startup environment Nice to haves but not required: Familiarity with launch vehicle trajectory design and optimization Have previously been a leading contributor on complex multi-disciplinary engineering analysis projects Prior work in a startup environment Experience working with advanced software development practices such as Docker, Continuous Integration/Continuous Deployment (CI/CD), and dependency management At Relativity Space, we are committed to transparency and fairness in our compensation practices. Actual compensation will be determined based on experience, qualifications, and other job-related factors. Compensation is only one part of our total rewards package. Relativity Space offers competitive salary and equity, a generous PTO and sick leave policy, parental leave, an annual learning and development stipend, and more! To see some of the benefits & perks we offer, please visit here. Hiring Range: $148,000—$203,500 USD We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. If you need a reasonable accommodation, please contact us at accommodations@relativityspace.com.", "summaryDescription" : "Senior GNC Performance Engineer at Relativity Space. Skills: GNC Performance, Trajectory design, System simulation. Integrate design data into simulations. Develop software tooling", "postedDate" : "2026-06-14T04:33:27.717", "createdAt" : "2026-06-14T04:33:27.717", "lastUpdated" : "2026-06-15T09:26:43.056", "ingestTimestamp" : "2026-06-14T04:33:27.717", "mongoId" : "6a2ca35c74d8ee00a09ab63c", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 148000, "salaryAnnualMax" : 203500, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Simulation processes", "GNC Performance", "Trajectory design", "System simulation", "Design trade analyses", "End-to-end ownership", "Interdisciplinary design", "Launch vehicle trajectory", "Space systems", "Customer missions", "Orbital trajectories", "Vehicle design", "ConOps" ], "skillCount" : 13, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 1.0, "_score" : 660.5792, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Aerospace", "llmIndustryConfidence" : 0.98 }, { "id" : "6a2c7ae874d8ee00a09475e6", "title" : "Senior System Engineer", "company" : "Gotion, Inc.", "industry" : "Manufacturing", "salary" : { "min" : 80000.0, "max" : 140000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Fremont, California, United States", "locations" : [ "Fremont", "California", "United States" ], "timestamp" : "2026-06-15T08:58:03.676", "fingerprint" : "d134718b15bafeb75a0bcdb87f1b1152b9afc636f1d8f0677971e5b7df4dcfed", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/gotion/jobs/7270449002", "externalId" : "7270449002", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Fremont", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.5482697,-121.9885710" } ], "locationText" : "Fremont, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Battery pack design, Battery module design, Battery management system, Battery performance model, Battery life model, Cell performance model, Cell test data", "professionalSkills" : [ "System requirements", "Customer requirements", "Design input", "Design review", "Project milestone", "Cell proposal", "Design proposal", "Drive profile", "Test report", "Design proposal", "Project matched pairs" ], "hardSkillsList" : [ "Battery system design", "BMS design", "Performance modeling", "Life modeling", "Thermal performance prediction", "Voltage prediction" ], "hardSkills" : [ { "name" : "Battery system design", "level" : "intermediate" }, { "name" : "BMS design", "level" : "intermediate" }, { "name" : "Performance modeling", "level" : "intermediate" }, { "name" : "Life modeling", "level" : "intermediate" }, { "name" : "Thermal performance prediction", "level" : "intermediate" }, { "name" : "Voltage prediction", "level" : "intermediate" } ], "majorSkills" : "Battery pack design, Battery module design, BMS performance, System requirements", "majorSkillsList" : [ "Battery pack design", "Battery module design", "BMS performance", "System requirements" ], "coreResponsibilities" : "Design battery pack/module system performance, Develop battery pack/module system performance, Release battery pack/module system performance, Define BMS performance, Define BMS function, Organize battery/module design review meetings, Work with battery cell team, Build up battery performance model, Build up battery life model, Predict battery performance through pack lifetime, Face/communicate with customer, Understand/transfer battery system requirements, Co-operate cell team, Recommend cell proposal, Organize battery system development team, Work out battery/module design proposal, Build up cell performance model, Predict cell voltage, Predict cell thermal performance, Plan battery system development validation, Report/explain battery system design proposal, Support product project matched pairs", "teamCollaboration" : "Battery design team; BMS team; Battery cell team; Battery system development team", "projectManagementSkills" : [ "Project milestone" ], "domainKnowledge" : "Electric vehicle; Energy storage; Lithium batteries; Battery pack systems; Battery module systems; Battery management systems; Battery performance; Battery life; Cell performance; Cell voltage; Cell thermal performance; Drive profile", "domainList" : [ "electric-vehicle", "energy-storage", "lithium-batteries", "battery-pack-systems", "battery-module-systems", "battery-management-systems", "battery-performance", "battery-life", "cell-performance", "cell-voltage", "cell-thermal-performance", "drive-profile" ], "domainSpecificKnowledge" : [ "Electric vehicle", "Energy storage", "Lithium batteries", "Battery pack systems", "Battery module systems", "Battery management systems", "Battery performance", "Battery life", "Cell performance", "Cell voltage", "Cell thermal performance", "Drive profile" ], "communicationSkills" : "Customer communication; Design proposal explanation", "documentationSkills" : "Test report", "innovationCreativity" : "Innovate in next generation technologies", "problemSolvingSkills" : "Root cause analysis", "qualificationsBasic" : "5+ years battery system design, Experience with battery pack/module system performance, Experience with BMS performance and function, Experience building battery performance model, Experience building battery life model, Experience predicting battery performance, Experience with battery cell team, Experience with battery system development team, Experience building cell performance model, Experience predicting cell voltage, Experience predicting cell thermal performance, Experience planning battery system development validation, Experience with test report, Experience explaining battery system design proposal, Experience organizing battery/module design review meeting, Experience supporting product project matched pairs", "qualificationsPreferred" : "Experience with electric vehicle technologies, Experience with energy storage technologies, Experience with lithium batteries", "workSiteFlexibility" : "Onsite", "rawDescription" : "Gotion Inc. is based in Silicon Valley, CA, currently building a Manufacturing facility in Manteno, IL and has R&D centers in Ohio, China, Japan and Europe. We innovate in the next generation electric vehicle and energy storage technologies (lithium batteries and related systems) with the aim to accelerate electrified transportation and achieve sustainable development. Gotion is powered by a leading power battery technology company that provides solutions for vehicles including the world's first mass commercial e-bus route. Gotion is a career destination - we are not simply attempting to just fill another job, but to pursue a dream of global green energy together! We offer outstanding opportunities to individuals seeking an exciting and challenging working environment. Everyone is highly valued and plays a vital role in the growth of our organization. The Senior System Engineer is responsible to design & develop & release battery pack/Module system performance and requirements. Lead battery design team to develop a battery system to meet the customer requirements. Battery management system (BMS) performance and function is also a part of battery system engineer’s responsibility, who need define and release BMS performance and function to BMS team as design input. Organize battery/Module design review meeting at every project milestone. Work with battery cell team to build up battery performance model and life model, predict battery performance through pack lifetime. Essential Duties and Responsibilities Face/communicate with customer to understand/ transfer battery system requirements. Co-operate cell team to recommend cell proposal for a particular battery system. Organize battery system development team to work out battery/module design proposal. Build up cell performance model through cell test data，and predict cell voltage，cell thermal performance under different drive profile provided by customer. Responsible for planning battery system development validation requirements and test Report/Explain battery system design proposal and plan to customer. Organize battery/Module design review meeting at every project milestone. Support product project matched pairs for reporting activity Base pay is one part of our total compensation package at Gotion, and is determined within a range. This provides you with the opportunity to progress as you grow and advance your career at Gotion. The base pay range for this role is shown below, and will depend on your skills, qualifications, experiences, and location. Expected Pay Range $80,000—$140,000 USD Gotion Inc. is proud to be an equal opportunity employer. We are dedicated to fostering a diverse workforce that reflects the communities we serve, cultivating a culture of inclusion and belonging, and ensuring equal employment opportunities for all. We provide equal opportunity to all individuals regardless of race, creed, color, religion, gender, sexual orientation, gender identity or expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related conditions (including breastfeeding), parental status, criminal histories consistent with legal requirements, or any other characteristic protected by law. At Gotion Inc., we strive to create an environment where everyone feels valued, respected, and empowered to thrive.", "summaryDescription" : "Senior System Engineer at Gotion, Inc.. Skills: Battery pack design, Battery module design, BMS performance, System requirements. Design battery pack/module system performance. Develop battery pack/module system performance", "postedDate" : "2026-06-14T03:06:21.966", "createdAt" : "2026-06-14T03:06:21.966", "lastUpdated" : "2026-06-15T08:58:03.676", "ingestTimestamp" : "2026-06-14T03:06:21.966", "mongoId" : "6a2c7ae874d8ee00a09475e6", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 80000, "salaryAnnualMax" : 140000, "salaryBand" : "75k-100k", "hasSalary" : true, "allSkills" : [ "Battery system design", "BMS design", "Performance modeling", "Life modeling", "Thermal performance prediction", "Voltage prediction", "Battery pack design", "Battery module design", "BMS performance", "System requirements", "Customer requirements", "Design input", "Design review", "Project milestone", "Cell proposal", "Design proposal", "Drive profile", "Test report", "Project matched pairs", "Electric vehicle", "Energy storage", "Lithium batteries", "Battery pack systems", "Battery module systems", "Battery management systems", "Battery performance", "Battery life", "Cell performance", "Cell voltage", "Cell thermal performance" ], "skillCount" : 30, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 1.0, "_score" : 660.06165, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Manufacturing", "llmIndustryConfidence" : 0.98 }, { "id" : "6a210e3e74d8ee00a0af66ea", "title" : "Silicon Validation Engineering Manager, Cloud", "industry" : "Technology", "salary" : { "min" : 220000.0, "max" : 320000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Manager in Technology in Sunnyvale, United States, adjusted for seniority and industry." }, "location" : "[Sunnyvale, CA, USA, [111 W Java Dr, Sunnyvale, CA 94089, USA], Sunnyvale, 94089, CA, US]", "locations" : [ "[Sunnyvale, CA, USA, [111 W Java Dr, Sunnyvale, CA 94089, USA], Sunnyvale, 94089, CA, US]" ], "timestamp" : "2026-06-16T11:13:04.901", "fingerprint" : "aebb91bc8b45750f04a5ba665ad9de0edb995ea50b203dab28a2276e746eb345", "source" : "google", "language" : "en", "externalId" : "133161664315826886", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Sunnyvale", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.3688301,-122.0363490" } ], "locationText" : "Sunnyvale, California, United States", "experienceLevel" : "Manager", "remoteFriendly" : false, "summaryDescription" : "Silicon Validation Engineering Manager, Cloud", "postedDate" : "2026-06-16T01:48:28.318", "createdAt" : "2026-06-16T01:48:28.318", "lastUpdated" : "2026-06-16T11:13:04.901", "ingestTimestamp" : "2026-06-16T01:48:28.318", "mongoId" : "6a210e3e74d8ee00a0af66ea", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 220000, "salaryAnnualMax" : 320000, "salaryBand" : "200k+", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Manager", "dataQualityScore" : 0.5555556, "_score" : 659.8883, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a21d8b774d8ee00a0d1d902", "title" : "System Performance Analysis Engineer, Silicon Co-Design Group", "company" : "Us To Advance Your Career", "salary" : { "min" : 550000.0, "max" : 950000.0, "currency" : "CNY", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior System Performance Analysis Engineer in Shanghai, China, adjusted for the technology industry and senior experience level." }, "location" : "China, Shanghai", "locations" : [ "China, Shanghai" ], "timestamp" : "2026-06-05T07:58:36.460", "fingerprint" : "7b8230a04a6ff4cd0a2b444725bf7459611a42b40a2a6d52d2e824d79a7baa74", "source" : "workday", "language" : "en", "applyUrl" : "https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/China-Shanghai/System-Performance-Analysis-Engineer--Silicon-Co-Design-Group_JR2019210", "externalId" : "JR2019210", "structuredLocations" : [ { "city" : "Shanghai", "country" : "China", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "31.2312707,121.4700152" } ], "locationText" : "Shanghai, China", "employmentType" : "FULL_TIME", "minimumEducation" : "BS", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "AI, Machine learning", "professionalSkills" : [ "Performance analysis", "Power management", "Product definition", "Data analysis", "System modeling", "Trend analysis", "Model verification", "Feature development", "Performance prediction", "Power management strategies", "Data collection", "Analysis automation", "Validation", "Characterization" ], "hardSkillsList" : [ "Digital design", "Low power design", "Control systems", "Power management techniques", "Timing analysis", "Architecture analysis" ], "hardSkills" : [ { "name" : "Digital design", "level" : "intermediate" }, { "name" : "Low power design", "level" : "intermediate" }, { "name" : "Control systems", "level" : "intermediate" }, { "name" : "Power management techniques", "level" : "intermediate" }, { "name" : "Timing analysis", "level" : "intermediate" }, { "name" : "Architecture analysis", "level" : "intermediate" } ], "majorSkills" : "Performance analysis, Power management, System modeling, AI integration", "majorSkillsList" : [ "Performance analysis", "Power management", "System modeling", "AI integration" ], "coreResponsibilities" : "Drive large-scale benchmarks, Perform competitive analysis, Perform comparative analysis, Design tools to automate product definitions, Design tools to automate data collection, Design tools to automate test case execution, Design tools to automate results analysis, Provide detailed data analysis, Develop methodologies to optimize HW/SW performance, Develop methodologies to optimize power management, Maximize Perf/Power, Maximize user-experience on AC power, Maximize user-experience on DC power, Partner with architecture teams, Partner with design teams, Research new architectural features, Optimize performance features, Optimize power features, Tackle multi-variable problems, Utilize AI techniques, Enhance performance prediction models, Enhance power management strategies, Leverage AI for advanced optimization, Accelerate analysis, Accelerate workflows, Generate scripts, Review scripts, Synthesize technical documentation, Explore solution spaces, Utilize machine learning algorithms, Predict power consumption, Predict performance, Implement AI-driven tools, Automate data collection, Automate analysis during validation, Automate analysis during characterization, Explore creative ways to integrate AI insights, Improve power metrics, Improve performance metrics", "teamCollaboration" : "Cross-functional leadership; Alignment across architecture teams; Alignment across silicon teams; Alignment across firmware teams; Alignment across software teams", "domainKnowledge" : "Datacenter systems; Client systems; GPU architecture; CPU architecture; SOC architecture; Low-power design methodologies", "domainList" : [ "datacenter-systems", "client-systems", "gpu-architecture", "cpu-architecture", "soc-architecture", "low-power-design-methodologies" ], "domainSpecificKnowledge" : [ "Datacenter systems", "Client systems", "GPU architecture", "CPU architecture", "SOC architecture", "Low-power design methodologies" ], "documentationSkills" : "Technical documentation", "innovationCreativity" : "Creative ways to integrate AI insights", "problemSolvingSkills" : "Multi-variable problems", "qualificationsBasic" : "BS or MS in EE/CE, 5+ years of experience, performance and power management focus, DVFS, power gating, clock policy, sequencing, throttling, control systems, boot/reset experience, EE fundamentals on digital design, low power design fundamentals, DVFS fundamentals, control systems fundamentals, power management techniques fundamentals, timing fundamentals, architecture fundamentals, Solid understanding of firmware/driver structures, Solid understanding of HW/SW interaction, problem-solving skills, collaboration skills, communication skills", "qualificationsPreferred" : "Hands-on lab experience, silicon bringup exposure, Demonstrated cross-functional leadership, System-level intuition, Experience with modeling and simulation tools, familiarity with latest advancements in AI, Contributions to open-source projects, Contributions to communities in low-power design methodologies", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "NVIDIA's GPUs and SOCs are the world leaders in performance and efficiency, and we are continually innovating in creative and unique ways to improve our ability to deliver extraordinary solutions in a wide range of sectors. We are seeking system performance analysis engineers who are passionate about what they do and are committed to making a difference in the world through their inventions. As part of Silicon Co-Design Group, we are responsible for productizing NVIDIA's chips into groundbreaking consumer, professional, server, mobile, and automotive solutions. **What You 'll Be Doing:** * Drive to perform large-scale benchmarks for competitive analysis and comparative analysis. * Design tools to automate product definitions, data collection, test case execution, and results analysis. Provide detailed data analysis of functionality, performance, and latency. * Develop methodologies to optimize HW/SW performance and power management to maximize Perf/Power and user-experience on AC and on DC power. Partner with the different architecture and design teams teams on improvement areas. * Research new architectural features for next generation GPU, CPU and SOC to optimize performance and power features development, and transcend product goals. * Tackle multi-variable problems via system level modeling, testing and characterization, trend analysis/projection, and model verification. Brings depth and expertise in product performance-per-watt feature development. * Utilize AI-driven techniques to enhance performance prediction models and power management strategies. **What We Need to See:** * BS pr MS in EE/CE, 5+ years of experience with a strong focus of performance and power management on one or two of below areas that optimize power for perf-per-watt efficiency in datacenter or client systems: DVFS, power gating, clock policy, sequencing, throttling, control systems, boot/reset. * Strong EE fundamentals on digital design, low power design, DVFS, control systems, power management techniques, timing, and architecture. * Solid understanding of firmware/driver structures and HW/SW interaction with different IPs, including their impact on power, latency, and reliability. * Hands-on lab experience (oscilloscopes, multimeters, logic analyzers) and silicon bringup exposure are a bonus. * Strong problem-solving, collaboration, and communication skills. * Leverage AI to perform advanced optimization accelerate analysis, workflows, generate and review scripts, synthesize technical documentation, and explore solution spaces faster. * Utilize machine learning algorithms to predict power consumption and performance based on workload characteristics. * Implement AI-driven tools for automating data collection and analysis during validation and characterization phases. * Explore creative ways to integrate AI insights into continuous improvement of power and performance metrics. **Ways to Stand Out from the Crowd:** * Demonstrated cross-functional leadership — experience driving alignment across architecture, silicon, firmware, and software teams on complex, ambiguous problems. * System-level intuition — the ability to reason about power and performance holistically, not just at the block level, and to translate architectural tradeoffs into clear engineering decisions. * Experience with modeling and simulation tools for performance validation at scale and familiarity with the latest advancements in AI and their applications in power and performance optimization. * Contributions to open-source projects or communities in low-power design methodologies. Our team is at the forefront of silicon innovation, advancing groundbreaking technologies. We offer a dynamic work environment where your contributions will directly impact the company's success. Join us to advance your career in a role where you can truly make a difference. With competitive salaries and a generous benefits package, we are widely considered one of the technology industry’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us, and due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you!", "summaryDescription" : "System Performance Analysis Engineer, Silicon Co-Design Group at Us To Advance Your Career. Skills: Performance analysis, Power management, System modeling, AI integration. Drive large-scale benchmarks. Perform competitive analysis", "postedDate" : "2026-06-04T23:56:47.738", "createdAt" : "2026-06-04T23:56:47.605", "lastUpdated" : "2026-06-05T07:58:36.460", "ingestTimestamp" : "2026-06-04T23:56:47.605", "mongoId" : "6a21d8b774d8ee00a0d1d902", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/China-Shanghai/System-Performance-Analysis-Engineer--Silicon-Co-Design-Group_JR2019210", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Digital design", "Low power design", "Control systems", "Power management techniques", "Timing analysis", "Architecture analysis", "Performance analysis", "Power management", "System modeling", "AI integration", "Product definition", "Data analysis", "Trend analysis", "Model verification", "Feature development", "Performance prediction", "Power management strategies", "Data collection", "Analysis automation", "Validation", "Characterization", "Datacenter systems", "Client systems", "GPU architecture", "CPU architecture", "SOC architecture", "Low-power design methodologies" ], "skillCount" : 27, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 1.0, "_score" : 658.1205, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true }, { "id" : "6a16291b58b93c861e959dbd", "title" : "Design Co-op (Fall 2026)", "company" : "HDR", "salary" : { "min" : 45000.0, "max" : 60000.0, "currency" : "CAD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for entry-level co-op positions in Canada, adjusted for London, Ontario's cost of living and the typical compensation for design roles in engineering and architecture firms." }, "location" : "Canada-Ontario-London", "locations" : [ "Canada-Ontario-London" ], "timestamp" : "2026-06-16T05:00:16.377", "fingerprint" : "a3c87dee383cbc9328b612cb317ed9d908e2c75b0118306ad9dfe6eb299b3dc3", "source" : "taleo", "language" : "en", "applyUrl" : "https://hdr.taleo.net/careersection/ex/jobdetail.ftl?job=783814", "externalId" : "783814", "industryFunction" : { }, "structuredLocations" : [ { "city" : "London", "state" : "Ontario", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "42.9836747,-81.2496068" } ], "locationText" : "London, Ontario, Canada", "employmentType" : "FULL_TIME", "communicationSkills" : "Communication skills", "problemSolvingSkills" : "Problem-solving skills", "qualificationsBasic" : "Currently enrolled in undergraduate or graduate program, Attention to detail, Problem-solving skills, Communication skills, Basic Microsoft Office skills, Commitment to employee-owned culture", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Required Qualifications Must be currently enrolled in an undergraduate or graduate program Attention to detail Must possess strong problem-solving and communication skills Basic Microsoft Office skills An attitude and commitment to being an active participant of our employee-owned culture is a must What We Believe HDR is our company. Together, we build on each other's life experiences and perspectives to make great things possible every day. This shapes our collaborative culture, encourages organizational trust and connects us closer to the clients and communities we serve. Our Commitment As employee owners, we all have a role in creating an inclusive environment where each of us is welcomed, valued, respected and empowered to bring our authentic selves to work every day. Our eight Employee Network Groups (Asian Pacific, Black, Hispanic/Latino(a), LGBTQ+, People with Disabilities, Veterans, Women, Young Professionals) help create a sense of belonging and foster a supportive environment where everyone is empowered to engage and contribute. Each group has an executive sponsor and is open to all employees. At HDR, the health and safety of our employees is of the upmost importance. In accordance with local safety, health, and environmental legislation, HDR is committed to developing, maintaining, and enforcing proactive safe work policies, procedures, and standards. In accordance with the Accessibility for Ontarians with Disabilities Act (AODA) and other applicable legislation, we are committed to meeting the accessibility needs of persons with disabilities. Candidates with disabilities may request reasonable accommodation throughout the recruitment and selection process by contacting our Human Resources team. HDR is a certified Living Wage Employer in Ontario, British Columbia, and Alberta. Canada-Ontario-London", "summaryDescription" : "Design Co-op (Fall 2026) at HDR", "createdAt" : "2026-06-14T21:30:56.505", "lastUpdated" : "2026-06-16T05:00:16.377", "ingestTimestamp" : "2026-06-14T21:30:56.505", "mongoId" : "6a16291b58b93c861e959dbd", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "30k-50k", "hasSalary" : false, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "product", "jobSubcategory" : "design", "seniorityLevel" : "Entry", "dataQualityScore" : 0.6666667, "_score" : 648.27576, "hasLocation" : true, "hasGeo" : true, "llmIndustryConfidence" : 0.85 }, { "id" : "6a305198f292fd229cf02ec7", "title" : "Lead Thermal System Engineer", "company" : "Scout Motors", "salary" : { "min" : 160000.0, "max" : 192500.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Charlotte, NC", "locations" : [ "Charlotte", "NC" ], "timestamp" : "2026-06-16T06:50:41.340", "fingerprint" : "c229fb74ba5016a388e3a9d5b62e38751de6c326fc940ca68fd93db4d90694ef", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/scoutmotors/jobs/5163181007", "externalId" : "5163181007", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Novi", "state" : "Michigan", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "42.4805900,-83.4754913" } ], "locationText" : "Novi, Michigan, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 8, "experienceMaxYears" : 15, "experienceLevel" : "Lead", "technicalSkills" : "CFD, HVAC, Thermal management, Battery thermal management, EV thermal systems, Thermal testing, Thermal modeling, Battery pack design, Thermal fluids, Heat transfer, Thermodynamics, ANSYS, STAR-CCM+, MATLAB, Simulink, Python", "professionalSkills" : [ "Product development", "Product validation" ], "hardSkillsList" : [ "CFD analysis", "Thermal system design", "Thermal testing", "Thermal modeling", "Battery thermal management", "EV thermal systems" ], "hardSkills" : [ { "name" : "CFD analysis", "level" : "intermediate" }, { "name" : "Thermal system design", "level" : "intermediate" }, { "name" : "Thermal testing", "level" : "intermediate" }, { "name" : "Thermal modeling", "level" : "intermediate" }, { "name" : "Battery thermal management", "level" : "intermediate" }, { "name" : "EV thermal systems", "level" : "intermediate" } ], "majorSkills" : "Thermal System Engineering, CFD Analysis, Battery Thermal Management", "majorSkillsList" : [ "Thermal System Engineering", "CFD Analysis", "Battery Thermal Management" ], "coreResponsibilities" : "Design and develop thermal systems, Develop and execute thermal system test plans, Perform CFD analysis, Develop thermal models, Validate thermal system designs, Support automotive product development, Support automotive validation activities, Collaborate with cross-functional teams, Troubleshoot thermal system issues, Document thermal system designs and test results", "teamCollaboration" : "Cross-functional teams", "domainKnowledge" : "Automotive thermal systems; EV battery systems; HVAC systems; Battery thermal management", "domainList" : [ "automotive-thermal-systems", "ev-battery-systems", "hvac-systems", "battery-thermal-management" ], "domainSpecificKnowledge" : [ "Automotive thermal systems", "EV battery systems", "HVAC systems", "Battery thermal management" ], "toolProficiency" : [ "ANSYS", "STAR-CCM+", "MATLAB", "Simulink" ], "documentationSkills" : "Document designs; Document test results", "problemSolvingSkills" : "Troubleshoot issues", "qualificationsBasic" : "Bachelor's degree in Engineering, 5+ years of experience, Experience with thermal systems, Experience with automotive thermal systems, Experience with CFD analysis, Experience with thermal management, Experience with HVAC systems, Experience with battery thermal management, Experience with electric vehicle thermal systems, Experience with thermal testing, Experience with thermal modeling, Experience with automotive product development, Experience with automotive validation", "qualificationsPreferred" : "Master's degree in Mechanical Engineering, Experience with battery pack design, Experience with thermal fluids, Experience with heat transfer, Experience with thermodynamics, Experience with automotive industry, Experience with EV battery systems, Experience with thermal simulation software, Experience with ANSYS, Experience with STAR-CCM+, Experience with MATLAB, Experience with Simulink, Experience with Python", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Here at Scout Motors, we're carrying forward the heritage of one of the most iconic American vehicles in history. A vehicle dating back to 1960. One that forged the path for future generations of rugged SUVs and trucks and will do so once again. But Scout is more than just a brand, it’s a legacy steeped in a culture of exploration, caretaking, and hard work. The Scout brand is all about respect. Respect for the past and the future by taking an iconic American brand that hasn’t been around for a while, electrifying it, digitizing it, and loading it with American innovation. Respect for communities by creating a company that stands for its people and its customers. Respect for both work and play, with vehicles that are equally at home at a camp site, a job site, or on a Tuesday commute. And respect for our customers by developing two powertrains that meet their requirements — an all-electric powertrain as well as the Harvester™ range extender powertrain which includes a built-in gas-powered generator with an estimated 500 miles of combined range. At Scout Motors, we empower our talented, inclusive, and entrepreneurial teams to innovate. What makes a Scout employee? Someone who is a visionary and a leader, who seeks new paths and shares lessons learned. A knowledgeable doer who collaborates across the company to build better. A go-getter with unrivaled passion. Join us at Scout Motors and be part of shaping the future of transportation. If you're ready to drive change and make history, apply now! What you’ll do At Scout Motors, you don't just design vehicles- you shape the future of the road. Our Engineering team is where bold ideas meet rigorous execution, building machines that are as durable and capable as the people who drive them. You'll work shoulder-to-shoulder with brilliant minds across disciplines, turning complex challenges into elegant, scalable solutions that meet the highest standards of safety, performance, and user experience. This is a place where your fingerprints are found on metal – where what you design gets built, driven, and remembered. If you're hungry to engineer something that matters, Scout Motors is where that ambition finds its highest gear. Become part of an iconic brand that is set to revolutionize the electric pick-up truck & rugged SUV marketplace by achieving the following: Thermal System Design: Lead the design and development of thermal management solutions for powertrain, and under hood thermal systems. Understanding of materials and applied to shielding techniques and protections. Help establish requirements where needed. Simulation and Analysis: Help establish detailed simulation and analysis to optimize the performance and efficiency of thermal components. Implement design improvements based on simulation results to enhance overall system reliability. Ensure all thermal safety related designs are fully characterized and understood. Team Leadership: Lead and mentor a team of thermal engineers to ensure high-performance and continuous improvement. Provide directions for exhaust systems and component protection. Foster a collaborative and innovative work environment. Prototyping and Testing: Oversee the prototyping and testing of thermal components to validate design performance. Perform and lead vehicle level testing (out west, or unknown locations supporting conditions) Analyze test data and implement necessary adjustments to improve system efficiency. Cross-Functional Collaboration: Work closely with drive/engine systems, power electronics engineers, control systems engineers, and software developers to integrate thermal solutions seamlessly. Collaborate with manufacturing teams to support the production and assembly of thermal components. Documentation and Reporting: Help prepare detailed design documentation, specifications, and reports for thermal system components. Safety voice for the company as related to thermal components. Experience with escalation of issues related. Location & Travel Expectations: This role will be based out of the Scout Motors location in Novi, Michigan. This role requires 4-5 days per week in the office, with regular in-person meetings and events. Applicants should expect that the role will require the ability to convene with Scout colleagues in person and travel to participate in events on behalf of the company from time to time. What you’ll bring We expect all Scout employees to have integrity, curiosity, resourcefulness, and strive to exhibit a positive attitude, as well as a growth mindset. You’ll be comfortable with change and flexible in a fast-paced, high-growth environment. You’ll take a collaborative approach to achieve ambitious goals. Here's what else you'll bring: Bachelor’s degree in mechanical engineering, or a related field. Master's degree preferred. Over 12 years of engineering experience. 8 years’ experience in thermal system design (engine/exhaust and component protection experience). Leadership experience, with a track record of successfully leading and developing engineering teams. Proficiency in simulation tools and analysis of thermal systems. Hands-on experience with prototyping and testing of thermal components. Strong analytical and problem-solving skills. Excellent communication and collaboration abilities. What you'll gain The benefits of joining Scout include the chance to build products and a company from the ground up. This is a chance to create something new and lasting – with an iconic brand at its foundation. In addition, Scout provides competitive compensation and benefits to support your physical, mental, and financial wellbeing. Program specifics are detailed in company policies and employee benefit guides, select highlights: Competitive insurance including: Medical, dental, vision and income protection plans 401(k) program with: An employer match and immediate vesting Generous Paid Time Off including: 20 days planned PTO, as accrued 40 hours of unplanned PTO and 14 company or floating holidays, annually Up to 16 weeks of paid parental leave for biological and adoptive parents of all genders Paid leave for circumstances related to bereavement, jury duty, voting time, or military leave Pay Transparency This is a full-time, exempt position eligible to receive a base salary and to participate in an annual performance bonus program. Final salary offered will be determined based on factors including but not limited to the candidate's skills and experience. The annual performance bonus program is preset and not candidate dependent. Initial base salary range = $160,000.00 - $192,500.00 Internal leveling code: IC7 Notice to applicants: To be considered for career opportunities at Scout Motors, applicants must be 18 years of age or older. Residing in San Francisco: Pursuant to the San Francisco Fair Chance Ordinance, Scout Motors will consider for employment qualified applicants with arrest and conviction records. Residing in Los Angeles: Scout Motors will consider for employment qualified applicants with criminal histories in a manner consistent with the Los Angeles Fair Chance Initiative for Hiring Ordinance. Residing in New York City: This role is not eligible for remote work in New York City. Equal Opportunity Scout Motors is committed to employing a diverse workforce and is proud to be an Equal Opportunity Employer. Qualified applicants will receive consideration without regard to race, color, religion, sex, national origin, age, sexual orientation, gender identity, gender expression, veteran status, disability, pregnancy, or any other characteristics protected by law. Scout Motors is committed to compliance with all applicable fair employment practice laws. If you require reasonable accommodation to complete a job application, pre-employment testing, or a job interview or to otherwise participate in the hiring process, please contact ScoutAccommodations@scoutmotors.com.", "summaryDescription" : "Lead Thermal System Engineer at Scout Motors. Skills: Thermal System Engineering, CFD Analysis, Battery Thermal Management. Design and develop thermal systems. Develop and execute thermal system test plans", "postedDate" : "2026-06-15T23:16:55.326", "createdAt" : "2026-06-15T23:16:55.326", "lastUpdated" : "2026-06-16T06:50:41.340", "ingestTimestamp" : "2026-06-15T23:16:55.326", "mongoId" : "6a305198f292fd229cf02ec7", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 160000, "salaryAnnualMax" : 192500, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "CFD analysis", "Thermal system design", "Thermal testing", "Thermal modeling", "Battery thermal management", "EV thermal systems", "Thermal System Engineering", "CFD Analysis", "Battery Thermal Management", "Product development", "Product validation", "Automotive thermal systems", "EV battery systems", "HVAC systems", "ANSYS", "STAR-CCM+", "MATLAB", "Simulink" ], "skillCount" : 18, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Lead", "dataQualityScore" : 1.0, "_score" : 646.7307, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Automotive", "llmIndustryConfidence" : 0.98 }, { "id" : "6a305f09f292fd229cf777fe", "title" : "Software Engineer (intern/co-op)", "company" : "Viggle AI", "industry" : "Engineering", "salary" : { "min" : 5000.0, "max" : 8000.0, "currency" : "CAD", "frequency" : "Yearly" }, "location" : "Toronto", "locations" : [ "Toronto" ], "timestamp" : "2026-06-16T10:44:04.846", "fingerprint" : "384ef9c4f581e20f24661a0834e2294b7f1baff7a154c31da43a22a58fd4c0d6", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/viggle/d181a1c3-a874-4a2d-a4b2-de8b94b6463b/application", "externalId" : "d181a1c3-a874-4a2d-a4b2-de8b94b6463b", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Toronto", "state" : "Ontario", "country" : "Canada", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "43.6534817,-79.3839347" } ], "locationText" : "Toronto, Ontario, Canada", "employmentType" : "FULL_TIME", "technicalSkills" : "React Native, React, Next.js, TypeScript, Three.js, WebGL, CV, GlTF, FBX, Unity, Unreal, React, Node.js, Go, Python, Rust, CUDA, PyTorch, Ray", "professionalSkills" : [ "Engineering judgment", "API design", "Distributed systems" ], "hardSkillsList" : [ "Pose estimation", "GPU orchestration", "Model optimization", "Data pipelines" ], "hardSkills" : [ { "name" : "Pose estimation", "level" : "intermediate" }, { "name" : "GPU orchestration", "level" : "intermediate" }, { "name" : "Model optimization", "level" : "intermediate" }, { "name" : "Data pipelines", "level" : "intermediate" } ], "majorSkills" : "GenAI, 3D graphics, ML infra, Distributed systems", "majorSkillsList" : [ "GenAI", "3D graphics", "ML infra", "Distributed systems" ], "coreResponsibilities" : "Own real work that ships", "domainKnowledge" : "GenAI; AI motion capture; 3D pipelines; 3D graphics; pose estimation; CV; glTF; FBX; game engines; generative 3D; multiplayer netcode; inference infra; distributed systems; inference serving; GPU orchestration; ML infra; model optimization; distributed training; data pipelines", "domainList" : [ "genai", "ai-motion-capture", "3d-pipelines", "3d-graphics", "pose-estimation", "cv", "gltf", "fbx", "game-engines", "generative-3d", "multiplayer-netcode", "inference-infra", "distributed-systems", "inference-serving", "gpu-orchestration", "ml-infra", "model-optimization", "distributed-training", "data-pipelines" ], "domainSpecificKnowledge" : [ "GenAI", "AI motion capture", "3D pipelines", "3D graphics", "pose estimation", "CV", "glTF", "FBX", "game engines", "generative 3D", "multiplayer netcode", "inference infra", "distributed systems", "inference serving", "GPU orchestration", "ML infra", "model optimization", "distributed training", "data pipelines" ], "toolProficiency" : [ "Three.js", "WebGL", "GlTF", "FBX", "Unity", "Unreal", "CUDA", "PyTorch", "Ray" ], "continuousLearning" : "Learning fast", "qualificationsBasic" : "React Native or React/Next.js + TypeScript, 3D graphics (Three.js/WebGL), Rigging/retargeting, Pose estimation/CV, GlTF/FBX, Game engines (Unity/Unreal) or WebGL, Multiplayer netcode, Go, Python, backend/distributed systems, Inference serving & GPU orchestration, API design, ML infra/MLOps, Model optimization, Distributed training & GPU orchestration (CUDA/PyTorch/Ray), Data pipelines", "qualificationsPreferred" : "Love for performance and polish, Experience with Python, Experience with Go/Python/Rust, Experience with CUDA/PyTorch/Ray", "remoteFriendly" : true, "rawDescription" : "\"Learning fast is an engineer’s superpower in the AI era.\" About Us Viggle AI is a startup backed by top-tier investors such as a16z and TSFV. We're at the forefront of the GenAI revolution, building the foundation model for the world — and the products that put it in everyone's hands, from first-time meme makers to professional studios. The result is one of the most loved creative platforms in AI: over 45 million users, one of the largest communities on Discord, and creators spanning Hollywood professionals to TikTokers. Behind it is a Toronto-based team that lives by one principle — serious tech, silly fun. About the job \"Learning fast is an engineer's superpower in the AI era.\" At Viggle, you won't be boxed into a role label. We hire for engineering judgment and the ability to learn fast — across our App, PINOC, Games, API, and the infrastructure behind them, the same person might touch a generation pipeline, a real-time rendering path, and the product surface a creator actually sees. As an intern or co-op, you'll own real work that ships, not side projects. What We're Looking For Tell us what you love building, and we'll find the surface that fits. Here's where you'd likely land: \uD83C\uDFAC Viggle App — Consumer, mobile & web The product 40M+ creators actually touch — fast generation flows and real-time editing. You: React Native or React/Next.js + TypeScript, with a love for performance and polish. \uD83E\uDDB4 PINOC — AI motion capture & 3D pipeline Turn any footage into skeletal animation, exported to FBX/GLB for real 3D pipelines. You: 3D graphics (Three.js/WebGL), rigging/retargeting, pose estimation/CV, glTF/FBX, Python. \uD83C\uDFAE Viggle Games — Real-time interactive 3D Playable, multiplayer experiences built on generative 3D, like Fight Anyone 3D. You: game engines (Unity/Unreal) or WebGL, multiplayer netcode, react, node. ⚙️ Viggle API — Developer platform & inference infra The platform other developers and AI agents build on — any motion in one call. You: Go, Python, backend/distributed systems, inference serving & GPU orchestration, API design, Go/Python/Rust. \uD83D\uDEE0️ Infrastructure & ML Systems — Training, inference & data The backbone behind every model — training, inference, and the data they learn from. You: ML infra/MLOps, model optimization, distributed training & GPU orchestration (CUDA/PyTorch/Ray), data pipelines. Not sure which track? That's fine — strong fundamentals of travel, and our engineers move across these areas as projects demand. Just tell us what you're best at and what you want to learn next.", "summaryDescription" : "Software Engineer (intern/co-op) at Viggle AI. Skills: GenAI, 3D graphics, ML infra, Distributed systems. Own real work that ships", "createdAt" : "2026-06-16T00:32:16.450", "lastUpdated" : "2026-06-16T10:44:04.846", "ingestTimestamp" : "2026-06-16T00:32:16.450", "mongoId" : "6a305f09f292fd229cf777fe", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "<30k", "hasSalary" : false, "allSkills" : [ "Pose estimation", "GPU orchestration", "Model optimization", "Data pipelines", "GenAI", "3D graphics", "ML infra", "Distributed systems", "Engineering judgment", "API design", "AI motion capture", "3D pipelines", "pose estimation", "CV", "glTF", "FBX", "game engines", "generative 3D", "multiplayer netcode", "inference infra", "distributed systems", "inference serving", "model optimization", "distributed training", "data pipelines", "Three.js", "WebGL", "GlTF", "Unity", "Unreal", "CUDA", "PyTorch", "Ray" ], "skillCount" : 33, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Entry", "dataQualityScore" : 0.7777778, "_score" : 645.0915, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 } ], "status" : 200, "message" : "OK", "pagination" : { "page" : 0, "limit" : 50, "totalCount" : 93284, "totalPages" : 1866, "hasNext" : true, "hasPrevious" : false } }

System Performance Analysis Engineer Silicon Co Design Group Jobs in Delhi

Silicon Design Verification Engineer

Silicon Design Verification Engineer ll

Silicon Emulation Engineer

Senior Software Engineer, System Acceleration, Silicon

Audio System Development Engineer, Silicon and Systems Group

Senior Physical Design Engineer, Cloud Silicon

Senior Silicon Physical Design STA Engineer

Silicon Design Verification Engineer, Google Cloud

Senior Silicon DFT Engineer

ASIC Digital Design Engineer II, Silicon Engineering

Senior Silicon Design Verification Engineer, Google Cloud

Staff Silicon Physical Design Engineer, Quantum AI

FPGA Prototyping Engineer, Silicon and Systems Group

Photonics Design Engineer

SDE-Audio, Silicon and Systems Group

Sr. Applied Scientist, Silicon and Systems Group

Silicon DFT Engineer III

Principal Power & Performance Validation Engineer

Design Co-op (Fall 2026)

Design Co-op (Fall 2026)

Principal Applied Scientist, Hardware Silicon and Systems Group

Design Co-op (Fall 2026)

Design Co-op (Fall 2026)

Design Co-op (Fall 2026)

Design Co-op (Fall 2026)

Design Co-op (Fall 2026)

Design Co-op (Fall 2026)

Design Co-op (Fall 2026)

Design Co-op (Fall 2026)

Applied Scientist, Silicon and Systems Group

Senior Design Verification Engineer

Staff -Power and Performance Validation Engineer

ASIC RTL Engineer III, Silicon

Silicon Validation Engineer, Google Cloud

Software Development Engineer - Silicon Development

Target System Analysis Analyst

Senior Silicon Engineer- P and D- (gCPU), Design Verification (multiple openings)

Staff Front-End CAD Engineer, Silicon

Software Engineer Manager II, Silicon Tools

Design Co-op (Fall 2026)

Staff Engineer, system design engineering

Micro-Architect and RTL Designer

Design Co-op (Fall 2026)

Senior GNC Performance Engineer

Senior System Engineer

Silicon Validation Engineering Manager, Cloud

System Performance Analysis Engineer, Silicon Co-Design Group

Design Co-op (Fall 2026)

Lead Thermal System Engineer

Software Engineer (intern/co-op)

Common Questions