{ "count" : 26314, "data" : [ { "id" : "69cf3f072beec4dd3d93425e", "title" : "Sr. Signal Integrity HDE, PCIe & Signal Integrity Team", "company" : "Amazon Data Services, Inc.", "industry" : "Hardware Development, Cloud Hardware Development, Cloud Computing", "salary" : { "min" : 159000.0, "max" : 215300.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Seattle, Washington, USA", "locations" : [ "Seattle, Washington, USA" ], "timestamp" : "2026-06-15T02:20:50.081", "fingerprint" : "405cc4b9b8478786f0b62823b0c4badbe56d0e53029101bfbea6eb95cddf8a6f", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/10381564/apply", "externalId" : "c86b2ca0-4829-4ca5-8530-01b32e56e0f4", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Seattle", "state" : "Washington", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "47.6038321,-122.3300620" } ], "locationText" : "Seattle, Washington, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "PCIe, DDR, USB, Allegro, CAM350, Ansys, Cadence Sigrity", "professionalSkills" : [ "Signal integrity analysis", "High-speed PCB design", "Electrical product design", "Interface design", "PCB design reviews", "Signal integrity simulation", "Power Integrity analysis", "Root cause analysis" ], "hardSkillsList" : [ "Signal integrity analysis", "High-speed PCB design", "Electrical product design", "Interface design", "PCB design reviews", "Signal integrity simulation", "Power Integrity analysis", "Root cause analysis" ], "softSkillsList" : [ "Team-driven", "Customer-obsessed" ], "hardSkills" : [ { "name" : "Signal integrity analysis", "level" : "intermediate" }, { "name" : "High-speed PCB design", "level" : "intermediate" }, { "name" : "Electrical product design", "level" : "intermediate" }, { "name" : "Interface design", "level" : "intermediate" }, { "name" : "PCB design reviews", "level" : "intermediate" }, { "name" : "Signal integrity simulation", "level" : "intermediate" }, { "name" : "Power Integrity analysis", "level" : "intermediate" }, { "name" : "Root cause analysis", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Team-driven" }, { "name" : "Customer-obsessed" } ], "majorSkills" : "Signal integrity, High-speed interfaces, PCB design", "majorSkillsList" : [ "Signal integrity", "High-speed interfaces", "PCB design" ], "coreResponsibilities" : "Own signal integrity of next-generation server components, Own signal integrity of next-generation server systems, Work on architecture of high-speed PCB designs, Work on development of high-speed PCB designs, Work on architecture of complex PCB designs, Work on development of complex PCB designs, Design server components, Design motherboards, Design graphics accelerators, Design programmable hardware, Optimize high-speed interfaces, Ensure robust system performance, Interact with interdisciplinary team of engineers, Design server hardware, Develop server hardware, Validate server hardware, Launch server hardware, Design server software, Develop server software, Validate server software, Launch server software", "teamCollaboration" : "Interdisciplinary team of engineers; People across AWS", "domainKnowledge" : "Signal integrity; High-speed interfaces; PCB design; Server hardware; Cloud computing", "domainList" : [ "signal-integrity", "high-speed-interfaces", "pcb-design", "server-hardware", "cloud-computing" ], "domainSpecificKnowledge" : [ "Signal integrity", "High-speed interfaces", "PCB design", "Server hardware", "Cloud computing" ], "toolProficiency" : [ "Allegro", "CAM350", "Ansys", "Cadence Sigrity" ], "continuousLearning" : "Ongoing events; Learning experiences; Knowledge-sharing; Mentorship", "innovationCreativity" : "Bold ideas", "problemSolvingSkills" : "Root cause analysis; Problem solving", "outcomesObjectives" : "Deliver highest standards for safety; Deliver highest standards for security; Provide seemingly infinite capacity; Provide lowest possible cost", "qualificationsBasic" : "Bachelor's degree or above in electrical engineering, computer engineering, or equivalent, 5+ years of experience performing signal integrity analysis, 5+ years of experience optimizing high-speed PCB designs for signal integrity, 10+ years of experience designing complex electrical products at volume, Experience in high-speed interface design (DDR, PCIe, USB, etc.), Experience with PCB design tools (Allegro, CAM350, or equivalent), Demonstrated ability to perform detailed PCB reviews, Experience with signal integrity simulation tools (Ansys, Cadence Sigrity, or similar)", "qualificationsPreferred" : "Master's degree or above in electrical engineering, computer engineering, or equivalent, Experience in server design for cloud or enterprise applications, Experience in Power Integrity analysis and optimization, Experience in thermal considerations, Experience in designing complex high-speed PCB design, Experience optimizing multi-layer PCB stack-up and routing, Experience in board root cause analysis and resolution, Experience focusing on signal integrity issues", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "AWS EC2 owns the design, planning, delivery, and operation of all AWS server instances. In other words, we’re the people who keep the cloud running. We support all AWS compute, storage, accelerator servers and ensure our customers have continual access to the innovation they rely on. We work on the most challenging problems, with thousands of variables impacting the supply chain — and we’re looking for talented people who want to help. You’ll join a diverse team of hardware engineers, software engineers, system engineers, technical program managers, and other vital roles. You’ll collaborate with people across AWS to help us deliver the highest standards for safety and security while providing seemingly infinite capacity at the lowest possible cost for our customers. And you’ll experience an inclusive culture that welcomes bold ideas and empowers you to own them to completion. Key job responsibilities AWS Hardware Engineering is looking for a customer-obsessed, team-driven technology leader to take our engineering of server hardware and software to the next level. As a hardware engineer on the PCIe and Signal Integrity team within the Core Components Organization, you will own the signal integrity of next-generation server components and systems. You will work on the architecture and development of high-speed, complex PCB designs for server components, including PCIe, motherboards, graphics, accelerators, and programmable hardware. Your expertise in signal integrity analysis and advanced PCB design techniques will be crucial for optimizing high-speed interfaces and ensuring robust system performance. You will interact with an interdisciplinary team of engineers to design, develop, validate, and launch a scale. At AWS we are changing the industry and want individuals who are ready for a challenge to reach beyond what is possible today. About the team Why AWS Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Inclusive Team Culture Here at AWS, it’s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness. Work/Life Balance We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud. Mentorship and Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Diverse Experiences Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Basic Qualifications: - Bachelor's degree or above in electrical engineering, computer engineering, or equivalent - 5+ years of experience performing signal integrity analysis and optimizing high-speed PCB designs for signal integrity. - 10+ years of experience designing complex electrical products at volume. - Experience in high-speed interface design (DDR, PCIe, USB, etc.) with emphasis on signal integrity. - Experience with PCB design tools (Allegro, CAM350, or equivalent) and demonstrated ability to perform detailed PCB reviews. - Experience with signal integrity simulation tools (Ansys, Cadence Sigrity, or similar). Preferred Qualifications: - Master's degree or above in electrical engineering, computer engineering, or equivalent - Experience in server design for cloud or enterprise applications. - Experience in Power Integrity analysis and optimization, including thermal considerations. - Experience in designing complex high-speed PCB design, optimizing multi-layer PCB stack-up and routing for high-speed interfaces. - Experience in board root cause analysis and resolution, particularly focusing on signal integrity issues. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. 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"name" : "Return loss", "level" : "intermediate" }, { "name" : "Crosstalk analysis", "level" : "intermediate" }, { "name" : "De-embedding", "level" : "intermediate" }, { "name" : "Fixture design", "level" : "intermediate" }, { "name" : "Lab automation", "level" : "intermediate" }, { "name" : "Measurement methodology", "level" : "intermediate" } ], "majorSkills" : "Signal integrity, High-speed interfaces, SI/PI simulation, Lab validation", "majorSkillsList" : [ "Signal integrity", "High-speed interfaces", "SI/PI simulation", "Lab validation" ], "coreResponsibilities" : "Develop high-speed signaling solutions, Validate high-speed signaling solutions, Optimize high-speed signaling solutions, Perform end-to-end signal integrity analysis, Analyze high-speed I/O interfaces, Optimize high-speed I/O interfaces, Analyze low-speed I/O interfaces, Optimize low-speed I/O interfaces, Perform time-domain simulations, Perform frequency-domain simulations, Support lab validation, Correlate simulation results, Identify margin gaps, Debug issues, Improve design methodology, Optimize I/O channel performance, Guide board layout, Guide stack-ups, Guide routing rules, Guide system design, Review schematics, Review layouts, Review simulation results, Review validation data, Prepare validation reports, Communicate measurement summaries, Communicate debug findings, Communicate technical recommendations", "teamCollaboration" : "Cross-functional technical communication; Collaborate with silicon teams; Collaborate with package teams; Collaborate with board teams; Collaborate with connector teams; Collaborate with cable teams; Collaborate with system design teams; Work with interconnect vendors; Work with ODMs; Internal teams; Senior technical stakeholders", "domainKnowledge" : "High-speed digital systems; Blade architectures; Rack-level architectures; Compute platforms; Silicon design; Package design; Interconnect design; Board design; System design; I/O channel performance; Board layout; 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"Package design", "Interconnect design", "Board design", "System design", "I/O channel performance", "Board layout", "Stack-ups", "Routing rules", "Backplane hardware", "Rack-level hardware", "Hyperscale environments", "Data center infrastructure", "Cloud infrastructure", "Compute hardware", "Board-to-board interconnects", "Cable interconnects", "SI/PI performance", "Thermal considerations", "Mechanical considerations" ], "toolProficiency" : [ "Ansys HFSS", "Keysight ADS", "Cadence Sigrity", "CST", "SPICE", "VNA", "TDR", "BERT", "Oscilloscopes", "Python", "MATLAB" ], "communicationSkills" : "Technical communication; Validation reports; Measurement summaries; Debug findings; Technical recommendations; Present technical findings", "documentationSkills" : "Validation reports", "problemSolvingSkills" : "Debug issues; Troubleshooting", "outcomesObjectives" : "Optimize I/O channel performance; Improve design methodology", "qualificationsBasic" : "Bachelor’s or Master’s degree, Experience in signal integrity, Hands-on measurement expertise, Experience measuring and analyzing S-parameters, Knowledge of high-speed interfaces, Experience with SI/PI simulation tools, Ability to correlate lab measurements, Communication skills", "qualificationsPreferred" : "Experience in hyperscale, Experience with blade architectures, Knowledge of thermal considerations, Experience with calibration, Experience using Python scripting", "workSiteFlexibility" : "Onsite", "rawDescription" : "About the Role We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design, with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication. Key Responsibilities End-to-end signal integrity analysis for blade- and rack-level system architectures. Analyze and optimize high-speed and low-speed I/O interfaces, including PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI, I2C, etc. and related interconnects. Perform time-domain and frequency-domain simulations using tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE, or similar. Support hands-on lab validation using VNA, TDR, BERT, and high-speed oscilloscopes. Correlate simulation results with lab measurements to identify margin gaps, debug issues, and improve design methodology. Collaborate with silicon, package, board, connector, cable, and system design teams to optimize I/O channel performance. Work with interconnect vendors and ODMs to guide board layout, stack-ups, routing rules, and system design decisions. Review schematics, layouts, simulation results, and validation data for blade, backplane, and rack-level hardware. Prepare and communicate clear validation reports, measurement summaries, debug findings, and technical recommendations to internal teams, vendors, and senior technical stakeholders. Required Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. Strong experience in signal integrity for high-speed digital systems. Hands-on measurement expertise using VNAs, TDRs, BERTs, and high-speed oscilloscopes. Experience measuring and analyzing S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and crosstalk. Knowledge of high-speed interfaces such as PCIe Gen4/5/6, Ethernet, DDR, SerDes, and related I/O technologies. Experience with SI/PI simulation tools such as HFSS, ADS, Sigrity, CST, SPICE, or equivalent. Ability to correlate lab measurements with simulations and use data to guide design decisions. Strong communication skills, including the ability to produce clear validation reports, present technical findings, and work effectively across multi-functional engineering teams. Preferred Qualifications Experience in hyperscale, data center, cloud infrastructure, or advanced compute hardware environments. Experience with blade, backplane, board-to-board, cable, or rack-level interconnect architectures. Knowledge of thermal and mechanical considerations that impact SI/PI performance. Experience with calibration, de-embedding, fixture design, lab automation, or measurement methodology development. Experience using Python, MATLAB, or similar scripting languages for simulation automation, measurement automation, and data analysis. Tools / Technologies Measurement: VNA, TDR, BERT, high-speed oscilloscopes Simulation: Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE Interfaces: PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI, high-speed interconnects Analysis: S-parameters, eye diagrams, jitter, timing margins, impedance control, crosstalk, insertion loss, return loss, de-embedding, measurement-to-simulation correlation Why Join Us This is an opportunity to work on complex, high-performance compute platforms while partnering with experienced technical leaders, ODMs, and interconnect vendors. You will play a key role in defining, measuring, validating, and optimizing next-generation system-level I/O performance. USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. 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Mentorship and Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Diverse Experiences Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Basic Qualifications: - Bachelor's degree or above in electrical engineering, computer engineering, or equivalent - 10+ years of experience in hardware development, designing complex electrical products at volume. - Experience with high-speed PCB designs (PCIe, DDR, USB, etc.) - Experience in identifying, root-causing and resolving high-speed interface hardware issues in large scale systems. - Experience in designing and building test hardware, writing test plans, test procedures and performing functional testing for design validation and verification. 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We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Inclusive Team Culture Here at AWS, it’s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness. Work/Life Balance We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud. Mentorship and Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Diverse Experiences Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Basic Qualifications: - Bachelor's degree or above in electrical engineering, computer engineering, or equivalent - 3+ years of experience in hardware development, designing complex electrical products at volume. - Experience with high-speed PCB designs (PCIe, DDR, USB, etc.) - Experience in identifying, root-causing hardware issues in large scale systems. - Experience in designing and building test hardware and test environments to validate designs. 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Mentorship and Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Diverse Experiences Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Basic Qualifications: - Bachelor's degree or above in electrical engineering, computer engineering, or equivalent - 3+ years of experience in hardware development, designing complex electrical products at volume. - Experience with high-speed PCB designs (PCIe, DDR, USB, etc.) - Experience in identifying, root-causing hardware issues in large scale systems. - Experience in designing and building test hardware and test environments to validate designs. Preferred Qualifications: - Master's degree in electrical engineering, computer engineering, or equivalent - Experience with high speed interconnect, including PCIe. - Experience in server hardware for cloud or enterprise applications. - Experience leading projects through the design lifecycle from collecting requirements, design, validation, launch and sustaining. - Experience writing test plans, test procedures and performing functional testing for design validation and verification. - Experience in systems design, operations, automation, and process improvement. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. 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0.95 }, { "id" : "69e1043f2beec4dd3def2457", "title" : "Signal/Power Integrity Eng", "company" : "Annapurna Labs", "industry" : "Hardware Development, Cloud Hardware Development, Cloud Computing", "salary" : { "min" : 136000.0, "max" : 184000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Austin, Texas, USA", "locations" : [ "Austin, Texas, USA" ], "timestamp" : "2026-06-15T03:50:20.760", "fingerprint" : "566047304ced0b38e02b9b94960a679a7f877934f1acca05f7f6570e470415ab", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/10387645/apply", "externalId" : "49b632bd-65e3-4792-8cd6-d532cec57972", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Austin", "state" : "Texas", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "30.2711286,-97.7436995" } ], "locationText" : "Austin, Texas, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 3, "experienceMaxYears" : 5, "experienceLevel" : "Mid", "technicalSkills" : "Hspice, Sigrity, HFSS, Microwave Studio, SerDes, Single-ended signal, Parallel bus", "professionalSkills" : [ "Signal integrity", "Power integrity", "Design leadership", "Data analysis" ], "hardSkillsList" : [ "Transmission line theory", "Electromagnetics", "Simulation tools", "PCB design", "Power delivery systems", "EMIR simulation" ], "softSkillsList" : [ "Innovation", "Mentoring" ], "hardSkills" : [ { "name" : "Transmission line theory", "level" : "intermediate" }, { "name" : "Electromagnetics", "level" : "intermediate" }, { "name" : "Simulation tools", "level" : "intermediate" }, { "name" : "PCB design", "level" : "intermediate" }, { "name" : "Power delivery systems", "level" : "intermediate" }, { "name" : "EMIR simulation", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Innovation" }, { "name" : "Mentoring" } ], "majorSkills" : "Signal integrity, Power integrity, ASIC design, High-speed digital design", "majorSkillsList" : [ "Signal integrity", "Power integrity", "ASIC design", "High-speed digital design" ], "coreResponsibilities" : "Define machine learning ASICs, Design machine learning ASICs, Validate machine learning ASICs, Participate in SI related topics, Create customized platforms, Solve challenging technical problems, Influence product decisions", "teamCollaboration" : "Collaborate across diverse teams; Cross-functional collaboration skills", "domainKnowledge" : "Machine learning ASICs; Advanced packaging technologies; PCB design; Power delivery systems; SOC power; High-speed digital design", "domainList" : [ "machine-learning-asics", "advanced-packaging-technologies", "pcb-design", "power-delivery-systems", "soc-power", "high-speed-digital-design" ], "domainSpecificKnowledge" : [ "Machine learning ASICs", "Advanced packaging technologies", "PCB design", "Power delivery systems", "SOC power", "High-speed digital design" ], "toolProficiency" : [ "Hspice", "Cadence", "HFSS", "Redhawk 3DIC", "Voltus" ], "continuousLearning" : "Knowledge-sharing; Mentorship", "innovationCreativity" : "Innovation; Innovative solutions", "problemSolvingSkills" : "Solve challenging technical problems", "outcomesObjectives" : "Create customized platforms; Deliver results that help customers change the world", "qualificationsBasic" : "Bachelor's degree in Electrical Engineering, 3+ years of experience using time domain and frequency domain tools, 3+ years of experience with PCB, Package, interposers, 3+ years of experience in Transmission line theory and Electromagnetics", "qualificationsPreferred" : "Master's degree in Electrical Engineering, Experience with die capacitors, Experience with SOC power, Experience with 3D/2.5D EMIR simulation tools, 5+ years of experience with high speed scopes and probing techniques", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Annapurna Labs designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world. We are seeking a SI/PI Engineer (Signal Integrity and Power Integrity) who will play a key role in the definition, design and validation of AWS next generation machine learning ASICs. As a member of our hardware team, you will have a meaningful opportunity to participate in the design and execution of all SI related topics, with the goal of creating and customized platforms that fit within AWS datacenter’s world leading technology. Key job responsibilities Our engineers collaborate across diverse teams, projects, and environments to have a firsthand impact on our global customer base. You’ll bring a passion for innovation, data, and hardware knowledge. You'll also solve challenging technical problems, often ones not solved before, at every layer of the design. This Signal Integrity Engineering role combines technical expertise with strategic design leadership. The ideal candidate will bring 3+ years of experience in signal and power integrity, with hands-on expertise in simulation tools like Hspice, Cadence, and HFSS. The role involves working with advanced packaging technologies, PCB design, and power delivery systems. Additional experience with die capacitors, SOC power, and 3D/2.5D EMIR simulation tools would be valuable. The position offers direct impact on product quality through innovative solutions for complex signal integrity challenges, requiring both technical depth and cross-functional collaboration skills. The engineer will work in a dynamic environment, influencing product decisions while solving cutting-edge challenges in high-speed digital design. A day in the life About the team Our team is dedicated to supporting new members. We have a broad mix of experience levels and tenures, and we’re building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind, code reviews. We care about your career growth and strive to assign projects that help our team members develop your engineering expertise so you feel empowered to take on more complex tasks in the future. Diverse Experiences AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. About AWS Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Inclusive Team Culture Here at AWS, it’s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness. Work/Life Balance We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud. Mentorship & Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Basic Qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, Systems Engineering, or related fields - - 3+ years of experience using time domain and frequency domain tools: Hspice, Sigrity, HFSS, or Microwave Studio - - 3+ years of experience with PCB, Package, interposers (COWOS) and Silicon Technologies - - 3 + years of experience in Transmission line theory and Electromagnetics and its application in SerDes, Single-ended signal and parallel bus interfaces. Preferred Qualifications: - Master's degree in Electrical Engineering - Experience with die capacitors, DTC caps and IPD caps - Experience with SOC power, integrated power Module - Experience with 3D/2.5D EMIR simulation tools: Redhawk 3DIC or Voltus - 5 + years of experience with high speed scopes and probing techniques Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits . USA, TX, Austin - 136,000.00 - 184,000.00 USD annually", "summaryDescription" : "Signal/Power Integrity Eng at Annapurna Labs. Skills: Signal integrity, Power integrity, ASIC design, High-speed digital design. Define machine learning ASICs. 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The team is dealing with the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives. The team’s work includes close work with the BackEnd team on integrating these interfaces to the Die, the package layout design of the BGA’s substrate, Signal and power integrity simulations, and working with the system team to come up with optimal pin-out and optimal PCB breakout schemes. We are looking for highly motivated Electrical Engineering graduates, or engineers with up to 3 years' experience in related fields, to join our growing team specializing in Signal Integrity and IC Package Design. The position offers a unique entry point into a diverse and multidisciplinary domain. Key job responsibilities As a SIP engineer, you will be involved in: • Work on advanced high-speed interfaces such as PCIe, DDR and Ethernet. • End-to-end solution of high-speed interfaces; from floor-planning at the DIE level, through Package and PCB routing, addressing both robust SI/PI considerations as well as optimizing layout routing. • Signal and power integrity modeling and simulation of high-speed interconnects using advanced SI/PI simulation tools. • Hands-on lab work involving oscilloscopes, spectrum analyzers, and other RF/mixed-signal measurement equipment, for advanced electrical characterization. You will undergo a comprehensive training program, providing you with the essential knowledge and skills required to succeed in this field. The work is multidisciplinary, bridging physical design, electromagnetic theory, and practical engineering challenges. Basic Qualifications: - BSc in Electrical Engineering or Electrical Engineering and Physics. Make sure to include a grade sheet with your CV, in a single PDF. - Strong foundations in physics and electromagnetics. Preferred Qualifications: - Communication, Electromagnetics, Signal processing, Microelectronics. - Previous experience with lab equipment (e.g oscilloscope, spectrum analyzer). - Familiarity with simulation/extraction tools (e.g. HFSS, Sigrity, HSpice). Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "Junior Signal and Power integrity Engineer at Annapurna Labs Ltd.. Skills: Signal Integrity, Power Integrity, IC Package Design. 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In other words, we’re the people who keep the cloud running. We support all AWS compute, storage, accelerator servers and ensure our customers have continual access to the innovation they rely on. We work on the most challenging problems, with thousands of variables impacting the supply chain — and we’re looking for talented people who want to help. You’ll join a diverse team of hardware engineers, software engineers, system engineers, technical program managers, and other vital roles. You’ll collaborate with people across AWS to help us deliver the highest standards for safety and security while providing seemingly infinite capacity at the lowest possible cost for our customers. And you’ll experience an inclusive culture that welcomes bold ideas and empowers you to own them to completion. Key job responsibilities AWS Hardware Engineering is looking for a customer-obsessed, team-driven technology leader to take our engineering of server hardware and software to the next level. As a System Development Engineer on the PCIe and Signal Integrity team within the Core Components Organization, you will work on next-generation high-speed designs for server components and systems. You will be responsible for the success of PCIe topology for EC2 servers, including retimer and switch firmware. You will work with an interdisciplinary team of engineers to design, develop, validate, launch, monitor and troubleshoot high throughput interfaces at scale. You will design and build environments to track fleet performance, qualify firmware, validate system designs and support debugging, and improve telemetry. At AWS we are changing the industry and want individuals who are ready for a challenge to reach beyond what is possible today. About the team Why AWS Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Inclusive Team Culture Here at AWS, it’s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness. Work/Life Balance We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud. Mentorship and Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Diverse Experiences Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Basic Qualifications: - 3+ years of non-internship professional software development experience - 3+ years of designing or architecting (design patterns, reliability and scaling) of new and existing systems experience - Experience programming with at least one modern language such as C++, C#, Java, Python, Golang, PowerShell, Ruby - BS degree in electrical, computer engineering or equivalent. - Experience in identifying, root-causing and resolving hardware/firmware/software issues in large scale systems. - Experience in writing and implementing functional and performance tests for manufacturing and in field coverage, including telemetry. Preferred Qualifications: - Master’s degree in electrical, software, computer engineering or equivalent. - Knowledge of engineering practices and patterns for the full software/hardware/networks development life cycle, including coding standards, code reviews, source control management, build processes, testing, certification, and livesite operations. - Experience with high speed interconnect, including PCIe. - Experience with developing qualification and manufacturing acceptance test plans, test procedures, and test environments. - Experience in systems design, operations, automation, and process improvement. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits . USA, WA, Seattle - 129,200.00 - 174,800.00 USD annually", "summaryDescription" : "System Development Eng, PCIe, AWS PCIe and Signal Integrity Team at Amazon Data Services, Inc.. Skills: PCIe topology, High-speed design, System validation. Design next-generation high-speed server components. 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In other words, we’re the people who keep the cloud running. We support all AWS compute, storage, accelerator servers and ensure our customers have continual access to the innovation they rely on. We work on the most challenging problems, with thousands of variables impacting the supply chain — and we’re looking for talented people who want to help. You’ll join a diverse team of hardware engineers, software engineers, system engineers, technical program managers, and other vital roles. You’ll collaborate with people across AWS to help us deliver the highest standards for safety and security while providing seemingly infinite capacity at the lowest possible cost for our customers. And you’ll experience an inclusive culture that welcomes bold ideas and empowers you to own them to completion. Key job responsibilities AWS Hardware Engineering is looking for a customer-obsessed, team-driven technology leader to take our engineering of server hardware and software to the next level. As a System Development Engineer on the PCIe and Signal Integrity team within the Core Components Organization, you will work on next-generation high-speed designs for server components and systems. You will be responsible for the success of PCIe topology for EC2 servers, including retimer and switch firmware. You will work with an interdisciplinary team of engineers to design, develop, validate, launch, monitor and troubleshoot high throughput interfaces at scale. You will design and build environments to track fleet performance, qualify firmware, validate system designs and support debugging, and improve telemetry. At AWS we are changing the industry and want individuals who are ready for a challenge to reach beyond what is possible today. About the team Why AWS Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Inclusive Team Culture Here at AWS, it’s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness. Work/Life Balance We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud. Mentorship and Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Diverse Experiences Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Basic Qualifications: - 3+ years of non-internship professional software development experience - 3+ years of designing or architecting (design patterns, reliability and scaling) of new and existing systems experience - Experience programming with at least one modern language such as C++, C#, Java, Python, Golang, PowerShell, Ruby - BS degree in electrical, computer engineering or equivalent. - Experience in identifying, root-causing and resolving hardware/firmware/software issues in large scale systems. - Experience in writing and implementing functional and performance tests for manufacturing and in field coverage, including telemetry. Preferred Qualifications: - Master’s degree in electrical, software, computer engineering or equivalent. - Knowledge of engineering practices and patterns for the full software/hardware/networks development life cycle, including coding standards, code reviews, source control management, build processes, testing, certification, and livesite operations. - Experience with high speed interconnect, including PCIe. - Experience with developing qualification and manufacturing acceptance test plans, test procedures, and test environments. - Experience in systems design, operations, automation, and process improvement. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. 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In other words, we’re the people who keep the cloud running. We support all AWS data centers and all of the servers, storage, networking, power, and cooling equipment that ensure our customers have continual access to the innovation they rely on. We work on the most challenging problems, with thousands of variables impacting the supply chain — and we’re looking for talented people who want to build. You’ll join a diverse team of software, hardware, and network engineers, supply chain specialists, security experts, operations managers, and other vital roles. You’ll collaborate with people across AWS to help us deliver the highest standards for safety and security while providing seemingly infinite capacity at the lowest possible cost for our customers. And you’ll experience an inclusive culture that welcomes bold ideas and empowers you to own them to completion. Do you enjoy solving complex problems and driving influential changes? Are you curious about the systems used to run the largest cloud computing infrastructures in the world? Do you thrive in a fast paced and ever-changing environment? If you answered YES to these questions, then our team is looking for you! The AWS Board Core Design & Services team drives system innovation in the servers used by all of Amazon Web Services, including EC2, S3 and CloudFront. Our engineers solve the hardest problems that fuse software, hardware, and the cloud. We take big bets on new concepts, enabling AWS services to continue to revolutionize the industry. What you will do: As a member of the AWS Board Core Design & Services team, you will own next-generation server components with a strong focus on digital circuit board design and signal integrity. You will have demonstrated results in the architecture and development of high-speed, complex PCB designs for server components, including motherboards, graphics, accelerators, and programmable hardware. Your expertise in signal integrity analysis and advanced PCB design techniques will be crucial for optimizing high-speed interfaces and ensuring robust system performance. You will interact with an interdisciplinary team of engineers to design, develop, validate, and launch at large scale. Why it matters: Public cloud IT services represent the majority of growth in the overall IT services market and will continue to do so for several years to come. The scale of AWS creates a unique opportunity for differentiated hardware that will directly benefit customers. Why you will love it: You will build next-generation hardware that powers the cloud. You will deliver improvements for our customers and have a direct impact on our bottom line. You will be part of a growing, fast paced, and fun team. You will have ownership for the implementation of your work. Key job responsibilities As a member of the AWS Board Core Design & Services team, you will own next-generation server components with a strong focus on digital circuit board design and signal integrity. You will have demonstrated results in the architecture and development of high-speed, complex PCB designs for server components, including motherboards, graphics, accelerators, and programmable hardware. Your expertise in signal integrity analysis and advanced PCB design techniques will be crucial for optimizing high-speed interfaces and ensuring robust system performance. You will interact with an interdisciplinary team of engineers to design, develop, validate, and launch at large scale. A day in the life Hardware engineers within AWS Board Core Design & Services team could be working in a variety of areas, few examples would be: hardware design and development; building the systems that validate hardware quality in manufacturing; monitoring and improving hardware reliability in data centers and platform. We cover everything from low level hardware to embedded software and systems that operate and monitor it. There is no blueprint for how to do what we do, which encourages our engineers to identify and develop simple solutions to complex problems. We encourage durable solutions that look around corners while taking into consideration our customer needs from a cost, performance, and reliability perspective. About the team Why AWS Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Utility Computing (UC) AWS Utility Computing (UC) provides product innovations — from foundational services such as Amazon’s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS’s services and features apart in the industry. As a member of the UC organization, you’ll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for their cloud services. Inclusive Team Culture Here at AWS, it’s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness. Work/Life Balance We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud. Mentorship and Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Diverse Experiences Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Basic Qualifications: - BS Electrical/Computer Engineering (or equivalent experience) - 7+ years of experience in embedded ARM, FPGA, and CPLD applications - 7+ years of hands-on experience with high-speed PCB design, including signal integrity analysis and optimization - Strong proficiency in PCB design tools (Allegro, CAM350, or equivalent) with demonstrated ability to perform detailed PCB reviews - 7+ years of experience in high-speed interface design (DDR, PCIe, USB, etc.) with emphasis on signal integrity - Proven track record in impedance control, stack-up design, and power integrity optimization - 7+ years of experience in board root cause analysis and resolution, particularly focusing on signal integrity issues - Experience with flash, I2C, SPI, UART, and ethernet interfaces Preferred Qualifications: - Master's degree in electrical engineering, computer engineering, or equivalent - 10+ years of experience in server design for cloud or enterprise applications - Advanced expertise in: - High-speed PCB design and signal integrity analysis - Complex motherboard and peripheral component design - Multi-layer PCB stack-up optimization - Advanced routing techniques for high-speed interfaces - EMI/EMC compliance and design considerations - Power delivery network (PDN) design and analysis - Proficiency with signal integrity simulation tools (Ansys, Cadence Sigrity, or similar) - Experience in designing for reuse across multiple products - Advanced knowledge of server technologies including: - Signal integrity optimization techniques - Power optimization - Thermal considerations - Mechanical constraints in PCB design - BIOS and BMC integration - High-speed networking interfaces - Experience with impedance-controlled board design and manufacturing processes - Strong expertise in component selection considering signal integrity requirements - Experience in design for large scale applications with emphasis on signal integrity - Experience working with interdisciplinary teams to execute complex PCB designs from concept to production Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $125,700/year in our lowest geographic market up to $219,900/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits . This position will remain posted until filled. Applicants should apply via our internal or external career site.", "summaryDescription" : "Hardware Development Engineer/Signal Integrity at Amazon Data Services, Inc.. Skills: Circuit board design, Signal integrity. Own next-generation server components. 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As a member of the UC organization, you’ll support the development and management of Compute, Database, Storage, Internet of Things (Iot), Platform, and Productivity Apps services in AWS. Within AWS UC, Amazon Dedicated Cloud (ADC) roles engage with AWS customers who require specialized security solutions for their cloud services. The SIP (Signal-Integrity & Packaging) team is part of Annapurna-Lab’s Chip development team. The team is dealing with the external electrical interfaces of the device, from their Signal/Power-integrity and electrical usage perspectives. The team’s work includes close work with the BackEnd team on integrating these interfaces to the Die, the package layout design of the BGA’s substrate, Signal and power integrity simulations, and working with the system team to come up with optimal pin-out and optimal PCB breakout schemes. We are looking for highly motivated Electrical Engineering graduates, or engineers with up to 3 years' experience in related fields, to join our growing team specializing in Signal Integrity and IC Package Design. The position offers a unique entry point into a diverse and multidisciplinary domain Key job responsibilities As a SIP engineer, you will be invoved in: • Work on cutting edge high-speed interfaces such as PCIe, DDR and Ethernet. • End-to-end solution of high-speed interfaces; from floor-planning at the DIE level, through Package and PCB routing, addressing both robust SI/PI considerations as well as optimizing layout routing. • Signal and power integrity modeling and simulation of high-speed interconnects using advanced SI/PI simulation tools. • Hands-on lab work involving oscilloscopes, spectrum analyzers, and other RF/mixed-signal measurement equipment, for advanced electrical characterization. You will undergo a comprehensive training program, providing you with the essential knowledge and skills required to succeed in this field. The work is multidisciplinary, bridging physical design, electromagnetic theory, and practical engineering challenges. About the team Diverse Experiences AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Why AWS? Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Inclusive Team Culture AWS values curiosity and connection. Our employee-led and company-sponsored affinity groups promote inclusion and empower our people to take pride in what makes us unique. Our inclusion events foster stronger, more collaborative teams. Our continual innovation is fueled by the bold ideas, fresh perspectives, and passionate voices our teams bring to everything we do. Mentorship & Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Work/Life Balance We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why flexible work hours and arrangements are part of our culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud. Basic Qualifications: - • BSc in Electrical Engineering or Electrical Engineering and Physics. Make sure to include a grade sheet with your CV, in a single PDF. - • Strong foundations in physics and electromagnetics Preferred Qualifications: - • Communication, Electromagnetics, Signal processing, Microelectrinics - • Previous experience with lab equipment (e.g oscilloscope, spectrum analyzer) is a strong advantage - • Familiarity with simulation/extraction tools (e.g. HFSS, Sigrity, HSpice) - an advantage Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. 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In other words, we’re the people who keep the cloud running. We support all AWS data centers and all of the servers, storage, networking, power, and cooling equipment that ensure our customers have continual access to the innovation they rely on. We work on the most challenging problems, with thousands of variables impacting the supply chain — and we’re looking for talented people who want to build. You’ll join a diverse team of software, hardware, and network engineers, supply chain specialists, security experts, operations managers, and other vital roles. You’ll collaborate with people across AWS to help us deliver the highest standards for safety and security while providing seemingly infinite capacity at the lowest possible cost for our customers. And you’ll experience an inclusive culture that welcomes bold ideas and empowers you to own them to completion. Do you enjoy solving complex problems and driving influential changes? Are you curious about the systems used to run the largest cloud computing infrastructures in the world? Do you thrive in a fast paced and ever-changing environment? If you answered YES to these questions, then our team is looking for you! The AWS Board Core Design & Services team drives system innovation in the servers used by all of Amazon Web Services, including EC2, S3 and CloudFront. Our engineers solve the hardest problems that fuse software, hardware, and the cloud. We take big bets on new concepts, enabling AWS services to continue to revolutionize the industry. What you will do: As a member of the AWS Board Core Design & Services team, you will own next-generation server components with a strong focus on digital circuit board design and signal integrity. You will have demonstrated results in the architecture and development of high-speed, complex PCB designs for server components, including motherboards, graphics, accelerators, and programmable hardware. Your expertise in signal integrity analysis and advanced PCB design techniques will be crucial for optimizing high-speed interfaces and ensuring robust system performance. You will interact with an interdisciplinary team of engineers to design, develop, validate, and launch at large scale. Why it matters: Public cloud IT services represent the majority of growth in the overall IT services market and will continue to do so for several years to come. The scale of AWS creates a unique opportunity for differentiated hardware that will directly benefit customers. Why you will love it: You will build next-generation hardware that powers the cloud. You will deliver improvements for our customers and have a direct impact on our bottom line. You will be part of a growing, fast paced, and fun team. You will have ownership for the implementation of your work. Key job responsibilities As a member of the AWS Board Core Design & Services team, you will own next-generation server components with a strong focus on digital circuit board design and signal integrity. You will have demonstrated results in the architecture and development of high-speed, complex PCB designs for server components, including motherboards, graphics, accelerators, and programmable hardware. Your expertise in signal integrity analysis and advanced PCB design techniques will be crucial for optimizing high-speed interfaces and ensuring robust system performance. You will interact with an interdisciplinary team of engineers to design, develop, validate, and launch at large scale. A day in the life Hardware engineers within AWS Board Core Design & Services team could be working in a variety of areas, few examples would be: hardware design and development; building the systems that validate hardware quality in manufacturing; monitoring and improving hardware reliability in data centers and platform. We cover everything from low level hardware to embedded software and systems that operate and monitor it. There is no blueprint for how to do what we do, which encourages our engineers to identify and develop simple solutions to complex problems. We encourage durable solutions that look around corners while taking into consideration our customer needs from a cost, performance, and reliability perspective. About the team Why AWS Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Utility Computing (UC) AWS Utility Computing (UC) provides product innovations — from foundational services such as Amazon’s Simple Storage Service (S3) and Amazon Elastic Compute Cloud (EC2), to consistently released new product innovations that continue to set AWS’s services and features apart in the industry. As a member of the UC organization, you’ll support the development and management of Compute, Database, Storage, Internet of Things (IoT), Platform, and Productivity Apps services in AWS, including support for customers who require specialized security solutions for their cloud services. Inclusive Team Culture Here at AWS, it’s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness. Work/Life Balance We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud. Mentorship and Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Diverse Experiences Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Basic Qualifications: - BS Electrical/Computer Engineering (or equivalent experience) - 5+ years of hands-on experience with high-speed PCB design, including signal integrity analysis and optimization - Strong proficiency in PCB design tools (Allegro, CAM350, or equivalent) with demonstrated ability to perform detailed PCB reviews - 5+ years of experience in high-speed interface design (DDR, PCIe, USB, etc.) with emphasis on signal integrity - Proven track record in impedance control, stack-up design, and power integrity optimization - 5+ years of experience in board root cause analysis and resolution, particularly focusing on signal integrity issues - Experience with flash, I2C, SPI, UART, and ethernet interfaces Preferred Qualifications: - Master's degree in electrical engineering, computer engineering, or equivalent - 7+ years of experience in server design for cloud or enterprise applications - Advanced expertise in: - High-speed PCB design and signal integrity analysis - Complex motherboard and peripheral component design - Multi-layer PCB stack-up optimization - Advanced routing techniques for high-speed interfaces - EMI/EMC compliance and design considerations - Power delivery network (PDN) design and analysis - Proficiency with signal integrity simulation tools (Ansys, Cadence Sigrity, or similar) - Experience in designing for reuse across multiple products - Advanced knowledge of server technologies including: - Signal integrity optimization techniques - Power optimization - Thermal considerations - Mechanical constraints in PCB design - BIOS and BMC integration - High-speed networking interfaces - Experience with impedance-controlled board design and manufacturing processes - Strong expertise in component selection considering signal integrity requirements - Experience in design for large scale applications with emphasis on signal integrity - Experience working with interdisciplinary teams to execute complex PCB designs from concept to production Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $125,700/year in our lowest geographic market up to $219,900/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits . This position will remain posted until filled. Applicants should apply via our internal or external career site.", "summaryDescription" : "Hardware Development Eng/Signal Integrity, AWS Board Core Design and Services Team at Amazon Data Services, Inc.. Skills: Signal integrity, PCB design, Server components. Own next-generation server components. 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The position has been", "summaryDescription" : "Senior Traffic Signal Technician/ Integrator at Wavetronix. Solve customer technical problems. Walk customers through installation", "createdAt" : "2026-06-14T01:22:50.286", "lastUpdated" : "2026-06-15T09:12:40.233", "ingestTimestamp" : "2026-06-14T01:22:50.286", "mongoId" : "69cfa44f2beec4dd3da0c964", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 85000, "salaryAnnualMax" : 125000, "salaryBand" : "75k-100k", "hasSalary" : true, "allSkills" : [ "Technical sales support", "Traffic signal systems" ], "skillCount" : 2, "jobCategory" : "sales", "jobSubcategory" : "revenue", "seniorityLevel" : "Senior", "dataQualityScore" : 0.8888889, "_score" : 615.21234, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.92 }, { "id" : "6a2c8c8374d8ee00a0975b5d", "title" : "Senior Signal Processing Engineer", "company" : "WHOOP", "industry" : "Sensor Intelligence", "salary" : { "min" : 150000.0, "max" : 215000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Boston, MA", "locations" : [ "Boston, MA" ], "timestamp" : "2026-06-16T06:54:43.709", "fingerprint" : "1dc53efc7a23be4a2afc3d8c4ff5361234abf473d8561d381e81f17e856c88be", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/whoop/07146ea6-838b-4b90-b645-4289985ebc6b/application", "externalId" : "07146ea6-838b-4b90-b645-4289985ebc6b", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Boston", "state" : "Massachusetts", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "42.3588336,-71.0578303" } ], "locationText" : "Boston, Massachusetts, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor's", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Signal processing, Embedded systems, Sensor fusion, Machine learning, Python, C++, MATLAB, ECG, IMU, Biometrics", "professionalSkills" : [ "Algorithm development", "Data analysis", "System design" ], "hardSkillsList" : [ "Algorithm implementation", "Data interpretation", "Biometric data analysis" ], "hardSkills" : [ { "name" : "Algorithm implementation", "level" : "intermediate" }, { "name" : "Data interpretation", "level" : "intermediate" }, { "name" : "Biometric data analysis", "level" : "intermediate" } ], "majorSkills" : "Signal processing, Machine learning, Embedded systems", "majorSkillsList" : [ "Signal processing", "Machine learning", "Embedded systems" ], "coreResponsibilities" : "Develop and implement signal processing algorithms, Develop and implement sensor fusion algorithms, Develop and implement machine learning algorithms, Process and analyze wearable sensor data, Optimize algorithms for embedded systems, Collaborate with hardware and software teams, Validate algorithms with real-world data, Contribute to system design and architecture", "teamCollaboration" : "Hardware teams; Software teams; Cross-functional teams", "domainKnowledge" : "Wearable sensors; Biometric data; ECG signal processing; IMU data analysis", "domainList" : [ "wearable-sensors", "biometric-data", "ecg-signal-processing", "imu-data-analysis" ], "domainSpecificKnowledge" : [ "Wearable sensors", "Biometric data", "ECG signal processing", "IMU data analysis" ], "toolProficiency" : [ "MATLAB", "Python", "C++" ], "communicationSkills" : "Technical communication", "documentationSkills" : "Algorithm documentation; Technical documentation", "problemSolvingSkills" : "Algorithm optimization; Data interpretation", "qualificationsBasic" : "Bachelor's degree in Electrical Engineering, 5+ years of experience in signal processing, Experience with embedded systems, Experience with sensor fusion algorithms, Experience with machine learning algorithms", "qualificationsPreferred" : "Master's degree or PhD, Experience with wearable sensor data, Experience with Python for data analysis, Experience with C++ for embedded systems", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At WHOOP, we're on a mission to unlock human performance and healthspan. WHOOP empowers members to perform at a higher level through a deeper understanding of their bodies and daily lives. WHOOP is seeking a Senior Signal Processing Engineer to join the Sensor Intelligence Group (SIG), a cross-functional team collaborating across WHOOP Labs, Firmware, and Data Science. This role is central to developing next-generation sensor processing to enable foundational health features at WHOOP. You’ll develop the edge signal processing underpinning WHOOP physiological insights and coaching, ultimately delivering meaningful and personalized feedback to millions of members. RESPONSIBILITIES: - - Lead the design and development of signal processing for real-time, edge inference on consumer products - Own the full lifecycle: prototyping, validation, productionization, and continuous improvement - Evaluate commercial solutions; create demos and inform build/buy decisions - Collaborate cross-functionally with hardware, software, and product teams to bring algorithms to WHOOP members - Mentor junior engineers and contribute to a high-performance, research-to-production culture QUALIFICATIONS: - - B.S. in Electrical Engineering or related field, M.S. or PhD preferred - 5+ years of experience developing and deploying real-time sensor signal processing algorithms (e.g., physiological, audio, motion, etc.) - Demonstrated experience deploying algorithms to consumer product embedded platforms (e.g. fixed-point DSPs or MCUs) - Strong foundation in signal processing fundamentals (e.g., filtering, spectral analysis, time-frequency methods) - Experience with system-level design and optimization to maximize product battery life - Proficiency in Python or MATLAB for algorithm prototyping and with C/C++ for deployment to embedded product platforms - Excellent communication skills, including the ability to present technical results to a diverse audience BONUS QUALIFICATIONS: - - Experience developing hybrid DSP/ML systems, with a focus on signal pre-processing and/or feature extraction - Knowledge of embedded systems, RTOS, or firmware development - Deep understanding of sensor physics or sensor fusion techniques - Knowledge of microcontroller libraries for efficient signal processing (e.g. CMSIS-DSP or CMSIS-NN) This role is based in the WHOOP office located in Boston, MA. The successful candidate must be prepared to relocate if necessary to work out of the Boston, MA office. Interested in the role, but don’t meet every qualification? We encourage you to still apply! At WHOOP, we believe there is much more to a candidate than what is written on paper, and we value character as much as experience. As we continue to build a diverse and inclusive environment, we encourage anyone who is interested in this role to apply. WHOOP is an Equal Opportunity Employer and participates in E-verify https://www.e-verify.gov/ to determine employment eligibility. It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability. The WHOOP compensation philosophy is designed to attract, motivate, and retain exceptional talent by offering competitive base salaries, meaningful equity, and consistent pay practices that reflect our mission and core values. At WHOOP, we view total compensation as the combination of base salary, equity, and benefits, with equity serving as a key differentiator that aligns our employees with the long-term success of the company and allows every member of our corporate team to own part of WHOOP and share in the company’s long-term growth and success. The U.S. base salary range for this full-time position is $150,000 - $215,000 Salary ranges are determined by role, level, and location. Within each range, individual pay is based on factors such as job-related skills, experience, performance, and relevant education or training. In addition to the base salary, the successful candidate will also receive benefits and a generous equity package. These ranges may be modified in the future to reflect evolving market conditions and organizational needs. While most offers will typically fall toward the starting point of the range, total compensation will depend on the candidate’s specific qualifications, expertise, and alignment with the role’s requirements.", "summaryDescription" : "Senior Signal Processing Engineer at WHOOP. Skills: Signal processing, Machine learning, Embedded systems. Develop and implement signal processing algorithms. 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Wavetronix is looking for an Applications Specialist who is eager to help solve customer technical", "summaryDescription" : "ITS Traffic Signal Technician/ Integrator (New England) at Wavetronix. Fulfill duties of Technical Sales Support. Solve customer technical issues", "createdAt" : "2026-06-14T21:54:10.830", "lastUpdated" : "2026-06-15T22:40:48.527", "ingestTimestamp" : "2026-06-14T21:54:10.830", "mongoId" : "6a257a3a74d8ee00a0187d9b", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 65000, "salaryAnnualMax" : 95000, "salaryBand" : "50k-75k", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "sales", "jobSubcategory" : "revenue", "seniorityLevel" : "Mid", "dataQualityScore" : 0.6666667, "_score" : 559.6168, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a3051ebf292fd229cf08fe6", "title" : "Revenue Integrity Specialist", "company" : "ConvenientMD", "salary" : { "min" : 60500.0, "max" : 84500.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level Revenue Integrity Specialist in Portsmouth, United States, adjusted for the healthcare industry and company size." }, "location" : "Portsmouth, New Hampshire, United States", "locations" : [ "Portsmouth", "New Hampshire", "United States" ], "timestamp" : "2026-06-16T07:25:36.452", "fingerprint" : "77c6e85ac53773c5a6f84faee68c5f22daef3b6e20d9782487c33302f32db393", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/convenientmd/jobs/5257954008", "externalId" : "5257954008", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Portsmouth", "state" : "New Hampshire", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "43.0751306,-70.7601826" } ], "locationText" : "Portsmouth, New Hampshire, United States", "experienceMinYears" : 2, "rawDescription" : "At ConvenientMD, we’re on a mission to make good health more convenient for all – working to improve how patients and providers experience healthcare in New England. To support this belief, we’re building a team of dedicated professionals who genuinely care about improving lives, are passionate about work that can make a difference, and are driven to learn from one another. The Opportunity The Revenue Integrity Specialist supports the accuracy, completeness, and timeliness of charge capture, coding, and billing processes across ConvenientMD service lines, including Urgent Care, Advanced Primary Care, and Laboratory services. This role supports operational revenue cycle workflows through charge review, billing issue resolution, claim validation, operational monitoring, and workflow support activities designed to ensure accurate claim submission, billing integrity, and reimbursement performance across front-end, mid-cycle, and back-end revenue cycle processes. The Revenue Integrity Specialist works collaboratively with clinical, coding, billing, operational, and revenue cycle teams to identify, investigate, and resolve issues impacting charge capture, claim accuracy, reimbursement, operational efficiency, and clean claim submission while supporting revenue integrity and operational improvement initiatives. Your Impact Collect, verify, and enter charge data related to patient services and procedures. Review clinical documentation to ensure services performed are accurately reflected in billing records. Confirm coding accuracy and alignment with CPT and ICD-10 standards. Investigate missing or incomplete charges and collaborate with clinical teams to resolve discrepancies. Maintain detailed documentation supporting billing accuracy and regulatory compliance. Monitor charge capture workflows to identify trends, gaps, or opportunities for improvement. Partner with billing and coding teams to support timely and accurate claims submission. Assist in educating clinical and administrative staff on charge capture workflows and best practices. Stay current on payer requirements, billing regulations, and coding updates. Generate reports and insights that support revenue integrity and operational improvement. Who You Are Healthcare revenue cycle experience: 2+ years of experience in healthcare revenue cycle, billing, charge capture, coding support, healthcare operations, or a related field Systems knowledge: Experience with EMR, billing, or revenue cycle systems Knowledge of payer requirements: Basic knowledge of CPT, HCPCS, ICD-10 coding concepts and payer billing requirements Revenue cycle knowledge: Knowledge of charge capture workflows and revenue cycle processes Analytical and problem-solving skills: Strong organizational, analytical, and problem-solving skills Investigative mindset: Ability to investigate issues, identify patterns, and support operational resolution Attention to detail: Strong attention to detail and ability to manage multiple priorities in a fast-paced environment Communication and collaboration skills: Effective communication and collaboration skills Why You'll Love Working With Us Collaborative team environment that encourages professional growth Urgent care services at no cost to our team members and their families Extensive benefit offerings including health, dental, and vision coverage, company paid short-term disability, and optional pet insurance 401k match after one year of service Access to our primary care (depending on location) Educational Alliance with Purdue University Global and reduced tuition rates for team members and their families Employer rewards and access to discounts offered on services and products such as hotels, travel, entertainment, restaurants, and more There's a job and then there's purposeful, transformative work. Our aim is to create a workplace where you can learn, grow, and continuously refine your skills. Applicants rarely meet every single job requirement, and we appreciate that many skills and backgrounds can make people successful in this role. We are committed to creating a strong sense of belonging for all team members, and our process is designed to prevent discrimination against applicants regardless of gender identity, sexual orientation, religion, ethnicity, age, disability status, or any other aspect which makes you unique. If you’re looking for a great next step, and want to feel good about what you do, we’d love to hear from you. It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.", "summaryDescription" : "Revenue Integrity Specialist at ConvenientMD", "postedDate" : "2026-06-15T23:21:39.234", "createdAt" : "2026-06-15T23:21:39.234", "lastUpdated" : "2026-06-16T07:25:36.452", "ingestTimestamp" : "2026-06-15T23:21:39.234", "mongoId" : "6a3051ebf292fd229cf08fe6", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 60500, "salaryAnnualMax" : 84500, "salaryBand" : "50k-75k", "hasSalary" : true, "allSkills" : [ ], "skillCount" : 0, "jobCategory" : "operations", "jobSubcategory" : "general", "seniorityLevel" : "Mid", "dataQualityScore" : 0.6666667, "_score" : 542.0861, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Healthcare", "llmIndustryConfidence" : 0.95 }, { "id" : "6a211e9c74d8ee00a0b35cc0", "title" : "Signal Integrity Engineer", "company" : "Jabil", "salary" : { "min" : 1300000.0, "max" : 2000000.0, "currency" : "TWD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior Signal Integrity Engineer in Sanchong, Taiwan, adjusted for the manufacturing industry and company size." }, "location" : "Sanchong", "locations" : [ "Sanchong", "Taiwan" ], "timestamp" : "2026-06-04T22:29:23.818", "fingerprint" : "7ec8f3cadeffc8d87684223ad480137d305c61aada73fe4eb02d926f3c8cee89", "source" : "workday", "language" : "en", "applyUrl" : "https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Sanchong/Signal-Integrity-Engineer_J2452077", "externalId" : "J2452077", "locationPoint" : "30.79508,106.08473", "structuredLocations" : [ { "city" : "Sanchong", "country" : "Taiwan", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "25.0614860,121.4881020" } ], "locationText" : "Sanchong, Taiwan", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "CAD", "professionalSkills" : [ "Technical solutions", "Cross functional design", "Project risk identification", "Design/VAVE process", "Design package", "Design reviews", "Design verification", "Supply chain interaction", "Supplier interaction", "Transfer to manufacturing", "Technical customer discussions" ], "hardSkillsList" : [ "Probability", "Statistics", "Geometry", "Trigonometry", "Mathematical modeling" ], "softSkillsList" : [ "Mentoring" ], "hardSkills" : [ { "name" : "Probability", "level" : "intermediate" }, { "name" : "Statistics", "level" : "intermediate" }, { "name" : "Geometry", "level" : "intermediate" }, { "name" : "Trigonometry", "level" : "intermediate" }, { "name" : "Mathematical modeling", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Mentoring" } ], "majorSkills" : "Signal Integrity", "majorSkillsList" : [ "Signal Integrity" ], "coreResponsibilities" : "Meet Design Engineer III requirements, Be a Subject Matter Expert, Represent Jabil in customer discussions, Work with Project Managers in quoting, Provide technical input to solve risks, Support development of design/VAVE processes, Provide design package to PDM system, Provide VAVE proposal to customer, Participate in design/VAVE engineering, Mentor design engineers and technicians, Provide onsite technical support, Stay abreast of latest technology", "teamCollaboration" : "Cross functional teams; Cross functional project teams", "projectManagementSkills" : [ "Project timelines" ], "domainKnowledge" : "Manufacturing production", "domainList" : [ "manufacturing-production" ], "domainSpecificKnowledge" : [ "Manufacturing production" ], "communicationSkills" : "Present technical solutions; Respond to questions", "documentationSkills" : "Requirements documentation; Design documentation; Procedure manuals", "problemSolvingSkills" : "Solve technical problems; Overcome hurdles; Define problems; Collect data; Establish facts; Draw conclusions; Interpret technical instructions; Develop mathematical models", "specialRequirements" : "Onsite technical support", "qualificationsBasic" : "Bachelors degree in Engineering, 7-8 years of related experience, 2 years experience as a Design Engineer III", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At Jabil (NYSE: JBL), we are proud to be a trusted partner for the world's top brands, offering comprehensive engineering, supply chain, and manufacturing solutions. With 60 years of experience across industries and a vast network of over 100 sites worldwide, Jabil combines global reach with local expertise to deliver both scalable and customized solutions. Our commitment extends beyond business success as we strive to build sustainable processes that minimize environmental impact and foster vibrant and diverse communities around the globe. **JOB SUMMARY** A Sr. Engineer will have a defined area of expertise either in a particular competency or industry. They will have mastered technology specific to their area of competence. Will be able to convey technical solutions to other engineers and to business personnel. Will have a good understanding of multiple CAD packages and cross functional design implications. Capable of being the lead engineer involved in a cross functional team. They will be able to drive cross functional project teams in solving technical problems and overcoming hurdles that may affect project timelines. Will have previous experience of releasing a product into a manufacturing production environment. **ESSENTIAL DUTIES AND RESPONSIBILITIES** · Meet the requirements of Design Engineer III · Would be considered a SME (Subject Matter Expert) in their field of competency. · Will represent Jabil Design Services in technical customer discussions / meetings. · Work with Project Managers and Lead Design Engineer in the quoting process · Provide technical input to help identify and solve project risks that may affect overall project plans and schedules. · Is expected to support the development and utilization of processes for design/VAVE. · At the appropriate process phase gates, provide a complete design package to be entered into our PDM system consisting of requirements and design documentation, databases, BOM’s, etc. /provide complete VAVE proposal to be submitted to the customer consisting of detailed proposals, models/simulations/schematics, BOM’s etc. · Participate in all elements of design/VAVE engineering including design reviews and design verification, supply chain & supplier interaction, transfer to design/manufacturing. · Mentoring design engineers I,II & III, technicians and ECAD designers · Provide onsite technical support for all manufacturing builds including engineering prototypes, NPI & production releases. · Stay abreast of the latest technology and techniques to provide designs that are competitive and cost effective. · May perform other duties and responsibilities as assigned. **JOB QUALIFICATIONS** **KNOWLEDGE REQUIREMENTS** LANGUAGE SKILLS Ability to read, analyze, and interpret general business periodicals, professional journals, technical procedures, or governmental regulations. Ability to write reports, business correspondence, and procedure manuals. Ability to effectively present information and respond to questions from groups of managers, clients, customers, and the general public. MATHEMATICAL SKILLS Ability to work with mathematical concepts such as probability and statistics, and fundamentals of plane and solid geometry and trigonometry. Ability to apply concepts such as fractions, percentages, ratios, and proportions to practical situations. REASONING ABILITY Ability to define problems, collect data, establish facts, and draw valid conclusions. Ability to interpret an extensive variety of technical instructions in mathematical or diagram form and deal with several abstract and concrete variables. Ability to develop mathematical models of physical reality and solve them, then implement the results. **EDUCATION & EXPERIENCE REQUIREMENTS** · Bachelors degree in Engineering from an accredited four-year college or university · Minimum of 7-8 years of related experience and/or training · Minimum of 2 years experience as a Design Engineer III · Specific requirements as defined by the market sector · Or an equivalent combination of education, training or experience. BE AWARE OF FRAUD: When applying for a job at Jabil you will be contacted via correspondence through our official job portal with a jabil.com e-mail address; direct phone call from a member of the Jabil team; or direct e-mail with a jabil.com e-mail address. Jabil does not request payments for interviews or at any other point during the hiring process. Jabil will not ask for your personal identifying information such as a social security number, birth certificate, financial institution, driver’s license number or passport information over the phone or via e-mail. If you believe you are a victim of identity theft, contact your local police department. Any scam job listings should be reported to whatever website it was posted in. **Jabil, including its subsidiaries, is an equal opportunity employer and considers qualified applicants for employment without regard to race, color, religion, national origin, sex, sexual orientation, gender identity, age, disability, genetic information, veteran status, or any other characteristic protected by law.** # **Accessibility Accommodation** If you are a qualified individual with a disability, you have the right to request a reasonable accommodation if you are unable or limited in your ability to use or access Jabil.com/Careers site as a result of your disability. You can request a reasonable accommodation by sending an e-mail to Always_Accessible@Jabil.com with the nature of your request and contact information. Please do not direct any other general employment related questions to this e-mail. Please note that only those inquiries concerning a request for reasonable accommodation will be responded to. #whereyoubelong", "summaryDescription" : "Signal Integrity Engineer at Jabil. Skills: Signal Integrity. Meet Design Engineer III requirements. Be a Subject Matter Expert", "postedDate" : "2026-06-04T10:57:56.287", "createdAt" : "2026-06-04T10:57:55.972", "lastUpdated" : "2026-06-04T22:29:23.818", "ingestTimestamp" : "2026-06-04T10:57:55.972", "mongoId" : "6a211e9c74d8ee00a0b35cc0", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Sanchong/Signal-Integrity-Engineer_J2452077", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Probability", "Statistics", "Geometry", "Trigonometry", "Mathematical modeling", "Mentoring", "Signal Integrity", "Technical solutions", "Cross functional design", "Project risk identification", "Design/VAVE process", "Design package", "Design reviews", "Design verification", "Supply chain interaction", "Supplier interaction", "Transfer to manufacturing", "Technical customer discussions", "Project timelines", "Manufacturing production" ], "skillCount" : 20, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 1.0, "_score" : 506.38342, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true }, { "id" : "6a2c946d74d8ee00a098a699", "title" : "Traffic / ITS Signal Technician", "company" : "Olsson", "industry" : "Consulting", "salary" : { "min" : 65000.0, "max" : 95000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level Traffic/ITS Signal Technician in Colorado Springs, USA, adjusted for industry and company size." }, "location" : "Colorado Springs", "locations" : [ "Colorado Springs" ], "certifications" : [ "IMSA Traffic Signal Level II", "IMSA Traffic Signal Level III" ], "timestamp" : "2026-06-15T07:55:05.907", "fingerprint" : "1a82620968f88c3bfa20ae98efc9da97cecdedce2aba61e70d2a4d3b2c02a138", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/olsson/jobs/5254919008", "externalId" : "5254919008", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Colorado Springs", "state" : "Colorado", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "38.8339578,-104.8253480" } ], "locationText" : "Colorado Springs, Colorado, United States", "employmentType" : "FULL_TIME", "technicalSkills" : "ITS technology, Fiber optic network", "professionalSkills" : [ "Application engineering", "Estimating" ], "hardSkillsList" : [ "Traffic signal operations", "Repair and maintenance", "Solid-state electronics", "Electrical power systems", "Traffic control procedures", "Signal timings" ], "hardSkills" : [ { "name" : "Traffic signal operations", "level" : "intermediate" }, { "name" : "Repair and maintenance", "level" : "intermediate" }, { "name" : "Solid-state electronics", "level" : "intermediate" }, { "name" : "Electrical power systems", "level" : "intermediate" }, { "name" : "Traffic control procedures", "level" : "intermediate" }, { "name" : "Signal timings", "level" : "intermediate" } ], "majorSkills" : "Traffic signal controllers, ITS technology", "majorSkillsList" : [ "Traffic signal controllers", "ITS technology" ], "coreResponsibilities" : "Handle technical questions, Provide field services, Troubleshoot traffic management systems, Provide traffic management solutions, Maintain ITS technology understanding, Oversee installation of cabinets, Oversee turn on of cabinets, Oversee maintenance of cabinets, Oversee testing of cabinets, Support field operations, Provide optimized systems, Represent company on-site, Make critical decisions, Assist with application engineering, Assist with estimating, Configure traffic signal controllers, Integrate devices, Develop strategies for signal timings, Modify traffic signal cabinets", "teamCollaboration" : "Collaborate with engineers; Collaborate with technicians", "domainKnowledge" : "Traffic signal equipment; Mechanical principles; Electrical principles; Electronic principles; Traffic signal systems; Traffic control device installation; Traffic control device repair", "domainList" : [ "traffic-signal-equipment", "mechanical-principles", "electrical-principles", "electronic-principles", "traffic-signal-systems", "traffic-control-device-installation", "traffic-control-device-repair" ], "domainSpecificKnowledge" : [ "Traffic signal equipment", "Mechanical principles", "Electrical principles", "Electronic principles", "Traffic signal systems", "Traffic control device installation", "Traffic control device repair" ], "toolProficiency" : [ "NEMA cabinets", "CALTRANS cabinets", "ATC cabinets" ], "problemSolvingSkills" : "Troubleshooting; Providing solutions", "specialRequirements" : "70% field work, Work in diverse weather, Lift and carry 50 lbs", "qualificationsBasic" : "5-10 years experience, Interpret design plans, Knowledge of MUTCD, Valid driver's license, Lift and carry 50 lbs, IMSA Traffic Signal Level II certification, Pass IMSA Level III within 6 months", "qualificationsPreferred" : "IMSA Traffic Signal Level III certification", "workSiteFlexibility" : "Flexible", "rawDescription" : "Company Description We are Olsson. We engineer and design solutions that improve the world around us. As a company, we promise to always be responsive, transparent, and focused on results – for our people, our clients, and our company. We’re a people-centric firm, so it’s no surprise our greatest asset is our people. The impact this creates is an environment that encourages our people to grow and be creative with their talents. This approach builds a culture that is uniquely Olsson. It allows us to grow our people as we grow our business. This, in turn, creates a lasting impact on the world around us. Job Description Olsson has an exciting opportunity for a Traffic/ITS Signal Technician to join our Traffic/Technology team! This role is ideal for a candidate eager to collaborate with and provide support for traffic engineers and technicians in executing services and project work in the field. Key Responsibilities Include: Handling technical questions from clients and team members, providing field services on across diverse projects. Your role will involve both troubleshooting and providing solutions that enhance our clients' traffic management systems. Maintaining a superior hands-on understanding of ITS technology. This involves overseeing the installation, turn on, maintenance, and testing of traffic signal cabinets. You will support field operations for integration projects, providing systems that are not only operational but also optimized for performance. Representing the company on-site, where you will be making critical decisions in real-time, and assisting with application engineering and estimating. Configuring traffic signal controllers for optimal performance, integrating various devices within NEMA, CALTRANS, and ATC cabinets. Your work will extend to developing strategies for signal timings, which are key in managing traffic flow efficiently. Modifying traffic signal cabinets according to pre-engineered designs or specific customer requirements. This task requires accuracy to provide a product that adheres to standards and fulfills the operational needs of the traffic system. This role involves spending an estimated 70% of the time working in the field, often in diverse weather conditions. Qualifications You are passionate about: Working collaboratively with others. Having ownership in the work you do. Using your talents to positively affect communities. You bring to the team: Strong communication skills. Ability to contribute and work well on a team. Familiarity with programming traffic signal controllers and analyzing signal operations. Knowledge of mechanical, electrical, and electronic basic principles as applied to traffic signal equipment. Practical knowledge of fiber optic network integration for signal systems. 5-10 years of experience in traffic signal operations including the repair and maintenance of solid-state electronics and electrical power systems. Ability to interpret design plans for quality assurance in traffic system installations. Knowledge of standard traffic control procedures/guidelines relating to traffic control device installation and/or repair as set forth in the MUTCD. Valid driver's license with a good driving history. Must be able to lift and carry up to 50 lbs. IMSA Traffic Signal Level II certification. Ability to pass IMSA Traffic Signal Level III certification within 6 months. #LI-DNP Actual compensation will vary based on factors such as experience, qualifications, geographic location, skills, education, and internal equity. Colorado Pay Range $55,907—$106,000 USD Additional Information Olsson specializes in engineering and design, client advisory services, planning, field services, and environmental. Improving the world has been our mindset from the very beginning, back when Olsson first opened for business in 1956. And it will be our mindset for years to come. As an Olsson employee, you will: Receive a competitive 401(k) match Be empowered to build your career with tailored development paths Have the possibility for flexible work arrangements Engage in work that has a positive impact on communities Participate in a wellness program promoting balanced lifestyles In addition, full-time employees will receive our traditional benefits package (health care, vision, dental, paid time off, etc.) and the opportunity to participate in a bonus system that rewards performance. Olsson is an Equal Opportunity Employer. We encourage qualified minority, female, veteran, and disabled candidates to apply and be considered for open positions. We do not discriminate against any applicant for employment or any employee because of race, color, religion, national origin, sex, sexual orientation, gender identity, gender, disability, age, military status, or other protected status. Olsson understands the importance of privacy and is committed to protecting job applicants’ personal information. Pursuant to the California Consumer Privacy Act, as amended by the California Privacy Rights Act (collectively, the “CCPA”), this notice explains Olsson’s practices regarding the collection, use, and disclosure of personal information for job applicants residing in California. Please read this Notice carefully to understand our privacy practices. For more information about the types of information we collect and how we use it in connection with your general access and use of our website, please review our general California Privacy Notice here.", "summaryDescription" : "Traffic / ITS Signal Technician at Olsson. Skills: Traffic signal controllers, ITS technology. Handle technical questions. Provide field services", "postedDate" : "2026-06-14T03:45:59.571", "createdAt" : "2026-06-14T03:45:59.571", "lastUpdated" : "2026-06-15T07:55:05.907", "ingestTimestamp" : "2026-06-14T03:45:59.571", "mongoId" : "6a2c946d74d8ee00a098a699", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 65000, "salaryAnnualMax" : 95000, "salaryBand" : "50k-75k", "hasSalary" : true, "allSkills" : [ "Traffic signal operations", "Repair and maintenance", "Solid-state electronics", "Electrical power systems", "Traffic control procedures", "Signal timings", "Traffic signal controllers", "ITS technology", "Application engineering", "Estimating", "Traffic signal equipment", "Mechanical principles", "Electrical principles", "Electronic principles", "Traffic signal systems", "Traffic control device installation", "Traffic control device repair", "IMSA Traffic Signal Level II", "IMSA Traffic Signal Level III", "NEMA cabinets", "CALTRANS cabinets", "ATC cabinets" ], "skillCount" : 22, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.8888889, "_score" : 502.00668, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Engineering", "llmIndustryConfidence" : 0.95 }, { "id" : "6a16375958b93c861e98f607", "title" : "Signal Integrity Engineer", "company" : "Hewlett Packard Enterprise", "salary" : { "min" : 71500.0, "max" : 164400.0, "currency" : "USD", "frequency" : "yearly" }, "location" : "Spring, Texas, United States of America", "locations" : [ "Spring, Texas, United States of America" ], "timestamp" : "2026-05-27T03:41:30.553", "fingerprint" : "28a25bcd1aacde4ed5ce3a4dea3d29275849226849fcf2277f1d05b398d168d4", "source" : "workday", "language" : "en", "applyUrl" : "https://hpe.wd5.myworkdayjobs.com/WFMathpe/job/Spring-Texas-United-States-of-America/Signal-Integrity-Engineer_1206371-2", "externalId" : "1206371", "locationPoint" : "30.07994,-95.41716", "structuredLocations" : [ { "city" : "Spring", "state" : "Texas", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite" } ], "locationText" : "Spring, Texas, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelor’s or Master’s degree in Electrical Engineering or related field", "experienceMinYears" : 2, "experienceMaxYears" : 5, "experienceLevel" : "Mid", "technicalSkills" : "PCIe, DDR, Ethernet, USB, SAS/SATA, Keysight ADS, Cadence Sigrity, Ansys HFSS, Mentor HyperLynx, oscilloscopes, TDR, VNA", "professionalSkills" : [ "Signal integrity", "Power integrity", "High-speed digital design", "PCB design", "PCB layout", "Hardware design", "Electrical performance" ], "hardSkillsList" : [ "Signal integrity analysis", "Power integrity analysis", "Simulation tools", "Measurement equipment" ], "hardSkills" : [ { "name" : "Signal integrity analysis", "level" : "intermediate" }, { "name" : "Power integrity analysis", "level" : "intermediate" }, { "name" : "Simulation tools", "level" : "intermediate" }, { "name" : "Measurement equipment", "level" : "intermediate" } ], "majorSkills" : "Signal Integrity, Power Integrity, High-speed digital design", "majorSkillsList" : [ "Signal Integrity", "Power Integrity", "High-speed digital design" ], "coreResponsibilities" : "Perform SI/PI analysis, Collaborate with engineers, Optimize design for SI, Generate simulation models, Define PCB design rules, Develop test plans, Perform SI/PI lab measurements, Troubleshoot SI/PI issues, Document analysis results, Communicate findings, Stay current with industry trends", "teamCollaboration" : "Work closely with hardware design; PCB layout; mechanical; manufacturing teams; Collaborate with hardware and PCB layout engineers; communicate findings and recommendations to cross-functional teams", "domainKnowledge" : "Server hardware design; Storage hardware design; Networking hardware design", "domainList" : [ "server-hardware-design", "storage-hardware-design", "networking-hardware-design" ], "domainSpecificKnowledge" : [ "Server hardware design", "Storage hardware design", "Networking hardware design" ], "toolProficiency" : [ "Keysight ADS", "Cadence Sigrity", "Ansys HFSS", "Mentor HyperLynx", "oscilloscopes", "TDR", "VNA" ], "communicationSkills" : "communication skills; communicate findings", "documentationSkills" : "Document analysis results; design guidelines", "continuousLearning" : "Stay current with industry trends; emerging technologies", "problemSolvingSkills" : "problem-solving skills; Troubleshoot and resolve SI/PI issues", "outcomesObjectives" : "ensure products meet stringent electrical performance standards", "qualificationsBasic" : "Bachelor’s or Master’s degree in Electrical Engineering or related field, 2-5 years experience, Solid understanding of high-speed digital design concepts, transmission line theory, electromagnetic fundamentals, Hands-on experience with SI/PI simulation tools, Experience with high-speed measurement instruments", "qualificationsPreferred" : "Experience in PCB design and layout, Experience in server, storage, or networking hardware design", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Signal Integrity Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. **Who We Are:** Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. **Job Description:** **_Job Description:_** As a Signal Integrity Engineer at Hewlett Packard Enterprise (HPE), you will play a critical role in the design, analysis, and validation of high-speed digital and analog circuits for next-generation server, storage, and networking products. You will work closely with hardware design, PCB layout, mechanical, and manufacturing teams to ensure that our products meet stringent electrical performance standards. _**Responsibilities:**_ * Perform signal integrity (SI) and power integrity (PI) analysis for high-speed digital interfaces (e.g., PCIe, DDR, Ethernet, USB, SAS/SATA, etc.) using simulation tools. * Collaborate with hardware and PCB layout engineers to optimize design for signal integrity, including stack-up definition, trace routing, via design, and connector selection. * Generate simulation models and perform pre- and post-layout simulations to identify and address potential SI/PI issues. * Define and review PCB design rules and guidelines to ensure compliance with HPE and industry standards. * Develop test plans and perform SI/PI lab measurements and validation using oscilloscopes, VNAs, TDRs, and other high-speed measurement equipment. * Troubleshoot and resolve SI/PI issues during product development and validation phases. * Document analysis results, design guidelines, and best practices; communicate findings and recommendations to cross-functional teams. * Stay current with industry trends and emerging technologies related to signal integrity, power integrity, and high-speed design. _**Education and Experience Required:**_ * Bachelor’s or Master’s degree in Electrical Engineering or related field. * Typically 2-5 years experience. * Solid understanding of high-speed digital design concepts, transmission line theory, and electromagnetic fundamentals. * Hands-on experience with SI/PI simulation tools (e.g., Keysight ADS, Cadence Sigrity, Ansys HFSS, Mentor HyperLynx, etc.). * Experience with high-speed measurement instruments (oscilloscopes, TDR, VNA, etc.). * Experience in PCB design and layout is a plus. * Strong analytical, problem-solving, and communication skills. * Experience in server, storage, or networking hardware design is desirable. **What We Can Offer You:** **Health & Wellbeing** We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing. **Personal & Professional Development** We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division. **Unconditional Inclusion** We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. **Let 's Stay Connected:** Follow [@HPECareers](http://instagram.com/hpecareers) on Instagram to see the latest on people, culture and tech at HPE. #unitedstates ### ### #compute **Job:** Engineering **Job Level:** TCP_02 \"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. – United States of America: Annual Salary USD 71,500 - 164,400 in Texas The listed salary range reflects base salary. Variable incentives may also be offered.\" Information about employee benefits offered in the US can be found at [https://myhperewards.com/main/new-hire-enrollment.html](https://myhperewards.com/main/new-hire-enrollment.html) HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: [Equal Employment Opportunity](https://hr.ext.hpe.com/Equal-employment-opportunity-policy.pdf). **Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.** HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories. **No Fees Notice & Recruitment Fraud Disclaimer** **** _It has come to HPE’s attention that there has been an increase in recruitment fraud whereby scammer impersonate HPE or HPE-authorized recruiting agencies and offer fake employment opportunities to candidates. These scammers often seek to obtain personal information or money from candidates._ _Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors **will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.** The credentials of any hiring agency that claims to be working with HPE for recruitment of talent should be verified by candidates and candidates shall be solely responsible to conduct such verification. Any candidate/individual who relies on the erroneous representations made by fraudulent employment agencies does so at their own risk, and HPE disclaims liability for any damages or claims that may result from any such communication._", "summaryDescription" : "Signal Integrity Engineer at Hewlett Packard Enterprise. Skills: Signal Integrity, Power Integrity, High-speed digital design. Perform SI/PI analysis. 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equipment" ], "softSkillsList" : [ "analytical", "problem-solving", "communication skills" ], "hardSkills" : [ { "name" : "Signal Integrity (SI)", "level" : "intermediate" }, { "name" : "Power Integrity (PI)", "level" : "intermediate" }, { "name" : "PCB layout optimization", "level" : "intermediate" }, { "name" : "stack-up definition", "level" : "intermediate" }, { "name" : "trace routing", "level" : "intermediate" }, { "name" : "via design", "level" : "intermediate" }, { "name" : "connector selection", "level" : "intermediate" }, { "name" : "simulation model generation", "level" : "intermediate" }, { "name" : "pre- and post-layout simulations", "level" : "intermediate" }, { "name" : "PCB design rules and guidelines", "level" : "intermediate" }, { "name" : "SI/PI lab measurements", "level" : "intermediate" }, { "name" : "validation", "level" : "intermediate" }, { "name" : "oscilloscopes", "level" : "intermediate" }, { "name" : "VNAs", "level" : "intermediate" }, { "name" : "TDRs", "level" : "intermediate" }, { "name" : "high-speed measurement equipment", "level" : "intermediate" } ], "softSkills" : [ { "name" : "analytical" }, { "name" : "problem-solving" }, { "name" : "communication skills" } ], "majorSkills" : "Signal Integrity (SI), Power Integrity (PI), high-speed digital interfaces analysis, SI/PI simulation tools, SI/PI lab measurements and validation", "majorSkillsList" : [ "Signal Integrity (SI)", "Power Integrity (PI)", "high-speed digital interfaces analysis", "SI/PI simulation tools", "SI/PI lab measurements and validation" ], "coreResponsibilities" : "Perform signal integrity (SI) and power integrity (PI) analysis for high-speed digital interfaces, Collaborate with hardware and PCB layout engineers to optimize design for signal integrity, Generate simulation models and perform pre- and post-layout simulations, Define and review PCB design rules and guidelines, Develop test plans and perform SI/PI lab measurements and validation, Troubleshoot and resolve SI/PI issues during product development and validation phases, Document analysis results, design guidelines, and best communicate findings and recommendations, Stay current with industry trends and emerging technologies related to signal integrity, power integrity, and high-speed design", "teamCollaboration" : "Work closely with hardware design, PCB layout, mechanical, and manufacturing teams; Collaborate with hardware and PCB layout engineers to optimize design for signal integrity; communicate findings and recommendations to cross-functional teams", "domainKnowledge" : "server, storage, and networking products; high-speed digital design; transmission line theory; electromagnetic fundamentals; server, storage, or networking hardware design", "domainList" : [ "server", "storage", "and-networking-products", "high-speed-digital-design", "transmission-line-theory", "electromagnetic-fundamentals", "or-networking-hardware-design" ], "domainSpecificKnowledge" : [ "server, storage, and networking products", "high-speed digital design", "transmission line theory", "electromagnetic fundamentals", "server, storage, or networking hardware design" ], "toolProficiency" : [ "Keysight ADS", "Cadence Sigrity", "Ansys HFSS", "Mentor HyperLynx", "oscilloscopes", "TDR", "VNA" ], "communicationSkills" : "communication skills; communicate findings and recommendations to cross-functional teams", "documentationSkills" : "Document analysis results, design guidelines", "continuousLearning" : "Stay current with industry trends and emerging technologies related to signal integrity, power integrity, and high-speed design; Personal & Professional Development programs", "problemSolvingSkills" : "analytical; problem-solving; Troubleshoot and resolve SI/PI issues", "outcomesObjectives" : "ensure that our products meet stringent electrical performance standards", "qualificationsBasic" : "Bachelor’s or Master’s degree in Electrical Engineering or related field, Solid understanding of high-speed digital design concepts, transmission line theory, and electromagnetic fundamentals, Hands-on experience with SI/PI simulation tools (e.g. , Keysight ADS, Cadence Sigrity, Ansys HFSS, Mentor HyperLynx, etc.), Experience with high-speed measurement instruments (oscilloscopes, TDR, VNA, etc.), analytical, problem-solving, and communication skills", "qualificationsPreferred" : "Experience in PCB design and layout is a plus, Experience in server, storage, or networking hardware design is desirable", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Signal Integrity Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. **Who We Are:** Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. **Job Description:** **_Job Description:_** As a Signal Integrity Engineer at Hewlett Packard Enterprise (HPE), you will play a critical role in the design, analysis, and validation of high-speed digital and analog circuits for next-generation server, storage, and networking products. You will work closely with hardware design, PCB layout, mechanical, and manufacturing teams to ensure that our products meet stringent electrical performance standards. _**Responsibilities:**_ * Perform signal integrity (SI) and power integrity (PI) analysis for high-speed digital interfaces (e.g., PCIe, DDR, Ethernet, USB, SAS/SATA, etc.) using simulation tools. * Collaborate with hardware and PCB layout engineers to optimize design for signal integrity, including stack-up definition, trace routing, via design, and connector selection. * Generate simulation models and perform pre- and post-layout simulations to identify and address potential SI/PI issues. * Define and review PCB design rules and guidelines to ensure compliance with HPE and industry standards. * Develop test plans and perform SI/PI lab measurements and validation using oscilloscopes, VNAs, TDRs, and other high-speed measurement equipment. * Troubleshoot and resolve SI/PI issues during product development and validation phases. * Document analysis results, design guidelines, and best practices; communicate findings and recommendations to cross-functional teams. * Stay current with industry trends and emerging technologies related to signal integrity, power integrity, and high-speed design. _**Education and Experience Required:**_ * Bachelor’s or Master’s degree in Electrical Engineering or related field. * Typically 2-5 years experience. * Solid understanding of high-speed digital design concepts, transmission line theory, and electromagnetic fundamentals. * Hands-on experience with SI/PI simulation tools (e.g., Keysight ADS, Cadence Sigrity, Ansys HFSS, Mentor HyperLynx, etc.). * Experience with high-speed measurement instruments (oscilloscopes, TDR, VNA, etc.). * Experience in PCB design and layout is a plus. * Strong analytical, problem-solving, and communication skills. * Experience in server, storage, or networking hardware design is desirable. **What We Can Offer You:** **Health & Wellbeing** We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing. **Personal & Professional Development** We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division. **Unconditional Inclusion** We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. **Let 's Stay Connected:** Follow [@HPECareers](http://instagram.com/hpecareers) on Instagram to see the latest on people, culture and tech at HPE. #unitedstates ### ### #compute **Job:** Engineering **Job Level:** TCP_02 \"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. – United States of America: Annual Salary USD 71,500 - 164,400 in Texas The listed salary range reflects base salary. Variable incentives may also be offered.\" Information about employee benefits offered in the US can be found at [https://myhperewards.com/main/new-hire-enrollment.html](https://myhperewards.com/main/new-hire-enrollment.html) HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: [Equal Employment Opportunity](https://hr.ext.hpe.com/Equal-employment-opportunity-policy.pdf). **Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.** HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories. **No Fees Notice & Recruitment Fraud Disclaimer** **** _It has come to HPE’s attention that there has been an increase in recruitment fraud whereby scammer impersonate HPE or HPE-authorized recruiting agencies and offer fake employment opportunities to candidates. These scammers often seek to obtain personal information or money from candidates._ _Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors **will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.** The credentials of any hiring agency that claims to be working with HPE for recruitment of talent should be verified by candidates and candidates shall be solely responsible to conduct such verification. Any candidate/individual who relies on the erroneous representations made by fraudulent employment agencies does so at their own risk, and HPE disclaims liability for any damages or claims that may result from any such communication._", "summaryDescription" : "Signal Integrity Engineer at Hewlett Packard Enterprise. Skills: Signal Integrity (SI), Power Integrity (PI), high-speed digital interfaces analysis, SI/PI simulation tools, SI/PI lab measurements and validation. Perform signal integrity (SI) and power integrity (PI) analysis for high-speed digital interfaces. Collaborate with hardware and PCB layout engineers to optimize design for signal integrity", "postedDate" : "2026-05-05T22:04:50.061", "createdAt" : "2026-05-17T22:04:50.025", "lastUpdated" : "2026-05-18T03:16:57.382", "ingestTimestamp" : "2026-05-17T22:04:50.025", "mongoId" : "6a0a160d1663d49372b4de3c", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://hpe.wd5.myworkdayjobs.com/ACJobSite/job/Spring-Texas-United-States-of-America/Signal-Integrity-Engineer_1206371-1", "salaryAnnualMin" : 71500, "salaryAnnualMax" : 164400, "salaryBand" : "50k-75k", "hasSalary" : true, "allSkills" : [ "Signal Integrity (SI)", "Power Integrity (PI)", "PCB layout optimization", "stack-up definition", "trace routing", "via design", "connector selection", "simulation model generation", "pre- and post-layout simulations", "PCB design rules and guidelines", "SI/PI lab measurements", "validation", "oscilloscopes", "VNAs", "TDRs", "high-speed measurement equipment", "analytical", "problem-solving", "communication skills", "high-speed digital interfaces analysis", "SI/PI simulation tools", "SI/PI lab measurements and validation", "high-speed digital design concepts", "transmission line theory", "electromagnetic fundamentals", "server, storage, or networking hardware design", "server, storage, and networking products", "high-speed digital design", "Keysight ADS", "Cadence Sigrity", "Ansys HFSS", "Mentor HyperLynx", "TDR", "VNA" ], "skillCount" : 34, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 1.0, "_score" : 480.0576, "daysOld" : 12, "hasLocation" : true, "hasGeo" : false }, { "id" : "6a16375958b93c861e98f605", "title" : "Signal Integrity Engineer", "company" : "Hewlett Packard Enterprise", "industry" : "edge-to-cloud", "salary" : { "min" : 174000.0, "max" : 352500.0, "currency" : "USD", "frequency" : "yearly" }, "location" : "Sunnyvale, California, United States of America", "locations" : [ "Sunnyvale, California, United States of America" ], "timestamp" : "2026-05-27T03:39:58.528", "fingerprint" : "3fb642195bc1f9d64ac021949db98a14d0eff21944dd40236bbe18b6b8d6f34c", "source" : "workday", "language" : "en", "applyUrl" : "https://hpe.wd5.myworkdayjobs.com/WFMathpe/job/Sunnyvale-California-United-States-of-America/Signal-Integrity-Engineer_1206501-1", "externalId" : "1206501", "industryFunction" : { }, "locationPoint" : "-36.8882,174.63019", "structuredLocations" : [ { "city" : "Sunnyvale", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "hybrid" } ], "locationText" : "Sunnyvale, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 10, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "ASIC PAM4 SerDes, system-level signal, power Integrity analysis, channel analysis, clocking, I/O timing, on-die power integrity, system-level power integrity, CPM model, PDN optimization, PCB design, COM, serial links, MATLAB, PLL design", "professionalSkills" : [ "Signal Integrity analysis", "high speed ASIC PAM4 SerDes", "networking product design", "serial channels", "coefficient tuning", "TP1A measurements", "system clocks", "PCB Stack-up design" ], "hardSkillsList" : [ "Signal Integrity analysis", "ASIC PAM4 SerDes", "power Integrity analysis", "channel analysis", "clocking", "I/O timing", "on-die power integrity", "system-level power integrity", "CPM model", "PDN optimization", "PCB design", "COM", "serial links", "MATLAB", "PLL design" ], "hardSkills" : [ { "name" : "Signal Integrity analysis", "level" : "intermediate" }, { "name" : "ASIC PAM4 SerDes", "level" : "intermediate" }, { "name" : "power Integrity analysis", "level" : "intermediate" }, { "name" : "channel analysis", "level" : "intermediate" }, { "name" : "clocking", "level" : "intermediate" }, { "name" : "I/O timing", "level" : "intermediate" }, { "name" : "on-die power integrity", "level" : "intermediate" }, { "name" : "system-level power integrity", "level" : "intermediate" }, { "name" : "CPM model", "level" : "intermediate" }, { "name" : "PDN optimization", "level" : "intermediate" }, { "name" : "PCB design", "level" : "intermediate" }, { "name" : "COM", "level" : "intermediate" }, { "name" : "serial links", "level" : "intermediate" }, { "name" : "MATLAB", "level" : "intermediate" }, { "name" : "PLL design", "level" : "intermediate" } ], "majorSkills" : "Signal Integrity, ASIC PAM4 SerDes, power Integrity analysis, PCB design", "majorSkillsList" : [ "Signal Integrity", "ASIC PAM4 SerDes", "power Integrity analysis", "PCB design" ], "coreResponsibilities" : "Perform COM analysis, Develop ASIC PAM4 SerDes channel simulation models, Correlate ASIC PAM4 SerDes simulation results, Perform PCB timing analysis, ASIC PAM4 SerDes parametric tuning, Perform SI DVT measurements", "teamCollaboration" : "Work with an experienced signal integrity team; work with component and ASIC vendors; work with board engineers and layout designers; Provide technical assessment of projects to SI management team; collaborate with people across geography and in a matrix organization", "projectManagementSkills" : [ "Capable of working on several projects simultaneously" ], "domainKnowledge" : "high speed ASIC PAM4 SerDes; networking product design; serial channels; system clocks; PLL design", "domainList" : [ "high-speed-asic-pam4-serdes", "networking-product-design", "serial-channels", "system-clocks", "pll-design" ], "domainSpecificKnowledge" : [ "high speed ASIC PAM4 SerDes", "networking product design", "serial channels", "system clocks", "PLL design" ], "toolProficiency" : [ "Ansys HFSS", "SIwave ADS", "Allegro", "Sigrity", "MATLAB", "oscilloscopes", "Vector Network Analyzers", "Time Domain Reflectometers", "Spectrum Analyzers", "phase noise Analyzers" ], "communicationSkills" : "Good oral and written communication skills", "documentationSkills" : "develop and document all layout/SI design rules and checklists", "continuousLearning" : "Personal & Professional Development programs; reach any career goals; knowledge expert in your field; apply your skills to another division", "problemSolvingSkills" : "provide solutions for ASIC PAM4 SerDes and channel performance issues", "qualificationsBasic" : "Signal Integrity analysis experience, Bachelor’s degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering, 56G/112G ASIC PAM4 SerDes technologies", "qualificationsPreferred" : "Master’s degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering, 200G ASIC PAM4 experience, serial channels up to 200G line rates for coefficient tuning, TP1A measurements, Ansys HFSS, SIwave ADS, Allegro, Sigrity, MATLAB, oscilloscopes, Vector Network Analyzers, Time Domain Reflectometers, Spectrum Analyzers, phase noise Analyzers, lab debug skills, debug and provide solutions for ASIC PAM4 SerDes and channel performance issues, Design implementation for system clocks, PLL design and debug, PCB Stack-up design using 2-d field solvers", "remoteFriendly" : true, "workSiteFlexibility" : "Onsite", "rawDescription" : "Signal Integrity Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. **Who We Are:** Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. **Job Description:** Work with an experienced signal integrity team with many years of experience performing high speed ASIC PAM4 SerDes and system-level signal and power Integrity analysis for cutting edge networking product design. Team members are industry experts with hands-on experience with high-speed ASIC PAM4 SerDes, channel analysis, clocking, I/O timing, on-die power integrity, system-level power integrity, CPM model and PDN optimization, PCB design for SI and PI. **Key Responsibilities:** * Perform COM (channel margin analysis) to provide design trade-offs amongst ASIC package, board, and connectors. Develop ASIC PAM4 SerDes channel simulation models and correlate to test structures. * Correlate ASIC PAM4 SerDes simulation results with Measurements and work with component and ASIC vendors to improve model accuracy. * Perform PCB timing analysis, work with board engineers and layout designers to implement all design SI rules, develop and document all layout/SI design rules and checklists. * ASIC PAM4 SerDes parametric tuning to improve design margins of serial links. * Perform SI DVT measurements on boards and correlate simulations with DVT measurements. Provide technical assessment of projects to SI management team. **Basic Requirements:** * Typically, 10 + years of Signal Integrity analysis experience with a bachelor’s degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering. * Typically, 8 + years of Signal Integrity analysis experience with a master’s degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering. * Experience with 56G/112G ASIC PAM4 SerDes technologies is required. * 200G ASIC PAM4 experience desired. * Hands-on experience in serial channels up to 200G line rates for coefficient tuning, TP1A measurements. **Preferred Skills:** * Proficient with CAD tools such as Ansys HFSS, SIwave ADS, Allegro, Sigrity and MATLAB. * Proficient with lab equipment such as oscilloscopes, Vector Network Analyzers, Time Domain Reflectometers, Spectrum Analyzers, phase noise Analyzers. Good lab debug skills a plus. * Strong capabilities to debug and provide solutions for ASIC PAM4 SerDes and channel performance issues. * Design implementation for system clocks and solid understanding of PLL design and debug. * PCB Stack-up design using 2-d field solvers. **Knowledge and Skills:** * Good oral and written communication skills. * Team player able to collaborate with people across geography and in a matrix organization. * Capable of working on several projects simultaneously. **What We Can Offer You:** **Health & Wellbeing** We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing. **Personal & Professional Development** We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division. **Unconditional Inclusion** We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. **Let 's Stay Connected:** Follow [@HPECareers](http://instagram.com/hpecareers) on Instagram to see the latest on people, culture and tech at HPE. #unitedstates ### ### #networking **Job:** Engineering **Job Level:** TCP_05 \"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. – United States of America: Annual Salary USD 174,000 - 352,500 in California The listed salary range reflects base salary. Variable incentives may also be offered.\" Information about employee benefits offered in the US can be found at [https://myhperewards.com/main/new-hire-enrollment.html](https://myhperewards.com/main/new-hire-enrollment.html) HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: [Equal Employment Opportunity](https://hr.ext.hpe.com/Equal-employment-opportunity-policy.pdf). **Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.** HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories. **No Fees Notice & Recruitment Fraud Disclaimer** **** _It has come to HPE’s attention that there has been an increase in recruitment fraud whereby scammer impersonate HPE or HPE-authorized recruiting agencies and offer fake employment opportunities to candidates. These scammers often seek to obtain personal information or money from candidates._ _Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors **will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.** The credentials of any hiring agency that claims to be working with HPE for recruitment of talent should be verified by candidates and candidates shall be solely responsible to conduct such verification. Any candidate/individual who relies on the erroneous representations made by fraudulent employment agencies does so at their own risk, and HPE disclaims liability for any damages or claims that may result from any such communication._", "summaryDescription" : "Signal Integrity Engineer at Hewlett Packard Enterprise. Skills: Signal Integrity, ASIC PAM4 SerDes, power Integrity analysis, PCB design. Perform COM analysis. Develop ASIC PAM4 SerDes channel simulation models", "postedDate" : "2026-05-06T03:32:22.969", "createdAt" : "2026-05-27T03:32:22.943", "lastUpdated" : "2026-05-27T03:39:58.528", "ingestTimestamp" : "2026-05-27T03:32:22.943", "mongoId" : "6a16375958b93c861e98f605", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://hpe.wd5.myworkdayjobs.com/WFMathpe/job/Sunnyvale-California-United-States-of-America/Signal-Integrity-Engineer_1206501-1", "salaryAnnualMin" : 174000, "salaryAnnualMax" : 352500, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "Signal Integrity analysis", "ASIC PAM4 SerDes", "power Integrity analysis", "channel analysis", "clocking", "I/O timing", "on-die power integrity", "system-level power integrity", "CPM model", "PDN optimization", "PCB design", "COM", "serial links", "MATLAB", "PLL design", "Signal Integrity", "high speed ASIC PAM4 SerDes", "networking product design", "serial channels", "coefficient tuning", "TP1A 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"source" : "workday", "language" : "en", "applyUrl" : "https://hpe.wd5.myworkdayjobs.com/ACJobSite/job/Sunnyvale-California-United-States-of-America/Signal-Integrity-Engineer_1206501", "externalId" : "1206501", "industryFunction" : { }, "locationPoint" : "-36.8882,174.63019", "structuredLocations" : [ { "city" : "Sunnyvale", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite" } ], "locationText" : "Sunnyvale, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 10, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "ASIC PAM4 SerDes, system-level signal and power Integrity analysis, channel analysis, clocking, I/O timing, on-die power integrity, system-level power integrity, CPM model, PDN optimization, PCB design for SI and PI, COM (channel margin analysis), serial links, system clocks, PLL design, PCB Stack-up design, 2-d field solvers", "professionalSkills" : [ "design trade-offs", "model accuracy", "design SI rules", "layout/SI design rules and checklists", "parametric tuning", "technical assessment of projects", "debugging and provide solutions for ASIC PAM4 SerDes and channel performance issues" ], "hardSkillsList" : [ "Signal Integrity analysis", "high speed ASIC PAM4 SerDes", "system-level signal and power Integrity analysis", "channel analysis", "clocking", "I/O timing", "on-die power integrity", "system-level power integrity", "CPM model and PDN optimization", "PCB design for SI and PI", "COM (channel margin analysis)", "ASIC PAM4 SerDes channel simulation models", "correlate to test structures", "correlate ASIC PAM4 SerDes simulation results with Measurements", "PCB timing analysis", "implement all design SI rules", "develop and document all layout/SI design rules and checklists", "ASIC PAM4 SerDes parametric tuning", "SI DVT measurements on boards", "correlate simulations with DVT measurements", "serial channels up to 200G line rates for coefficient tuning", "TP1A measurements", "Design implementation for system clocks", "solid understanding of PLL design and debug", "PCB Stack-up design using 2-d field solvers" ], "softSkillsList" : [ "Team player", "collaborate with people across geography and in a matrix organization", "Capable of working on several projects simultaneously", "Unconditional Inclusion", "celebrate individual uniqueness", "flexibility to manage our work and personal needs" ], "hardSkills" : [ { "name" : "Signal Integrity analysis", "level" : "intermediate" }, { "name" : "high speed ASIC PAM4 SerDes", "level" : "intermediate" }, { "name" : "system-level signal and power Integrity analysis", "level" : "intermediate" }, { "name" : "channel analysis", "level" : "intermediate" }, { "name" : "clocking", "level" : "intermediate" }, { "name" : "I/O timing", "level" : "intermediate" }, { "name" : "on-die power integrity", "level" : "intermediate" }, { "name" : "system-level power integrity", "level" : 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200G line rates for coefficient tuning", "level" : "intermediate" }, { "name" : "TP1A measurements", "level" : "intermediate" }, { "name" : "Design implementation for system clocks", "level" : "intermediate" }, { "name" : "solid understanding of PLL design and debug", "level" : "intermediate" }, { "name" : "PCB Stack-up design using 2-d field solvers", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Team player" }, { "name" : "collaborate with people across geography and in a matrix organization" }, { "name" : "Capable of working on several projects simultaneously" }, { "name" : "Unconditional Inclusion" }, { "name" : "celebrate individual uniqueness" }, { "name" : "flexibility to manage our work and personal needs" } ], "majorSkills" : "Signal Integrity analysis, high speed ASIC PAM4 SerDes, system-level signal and power Integrity analysis, channel analysis, clocking, I/O timing, on-die power integrity, system-level power integrity, CPM model and PDN optimization, PCB design for SI and PI", "majorSkillsList" : [ "Signal Integrity analysis", "high speed ASIC PAM4 SerDes", "system-level signal and power Integrity analysis", "channel analysis", "clocking", "I/O timing", "on-die power integrity", "system-level power integrity", "CPM model and PDN optimization", "PCB design for SI and PI" ], "coreResponsibilities" : "Perform COM (channel margin analysis) to provide design trade-offs amongst ASIC package, board, and connectors, Develop ASIC PAM4 SerDes channel simulation models and correlate to test structures, Correlate ASIC PAM4 SerDes simulation results with Measurements and work with component and ASIC vendors to improve model accuracy, Perform PCB timing analysis, work with board engineers and layout designers to implement all design SI rules, develop and document all layout/SI design rules and checklists, ASIC PAM4 SerDes parametric tuning to improve design margins of serial links, Perform SI DVT measurements on boards and correlate simulations with DVT measurements, Provide technical assessment of projects to SI management team", "teamCollaboration" : "Work with an experienced signal integrity team; work with component and ASIC vendors; work with board engineers and layout designers; collaborate with people across geography and in a matrix organization", "projectManagementSkills" : [ "Capable of working on several projects simultaneously" ], "domainKnowledge" : "high speed ASIC PAM4 SerDes; networking product design; 56G/112G ASIC PAM4 SerDes technologies; 200G ASIC PAM4; serial channels up to 200G line rates; system clocks; PLL design", "domainList" : [ "high-speed-asic-pam4-serdes", "networking-product-design", "56g-112g-asic-pam4-serdes-technologies", "200g-asic-pam4", "serial-channels-up-to-200g-line-rates", "system-clocks", "pll-design" ], "domainSpecificKnowledge" : [ "high speed ASIC PAM4 SerDes", "networking product design", "56G/112G ASIC PAM4 SerDes technologies", "200G ASIC PAM4", "serial channels up to 200G line rates", "system clocks", "PLL design" ], "toolProficiency" : [ "Ansys HFSS", "SIwave ADS", "Allegro", "Sigrity", "MATLAB", "oscilloscopes", "Vector Network Analyzers", "Time Domain Reflectometers", "Spectrum Analyzers", "phase noise Analyzers" ], "communicationSkills" : "Good oral and written communication skills", "documentationSkills" : "develop and document all layout/SI design rules and checklists", "continuousLearning" : "Personal & Professional Development: We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division.", "innovationCreativity" : "Our culture thrives on finding new and better ways to accelerate what’s next.; We make bold moves, together, and are a force for good.", "problemSolvingSkills" : "capabilities to debug and provide solutions for ASIC PAM4 SerDes and channel performance issues", "specialRequirements" : "Onsite with an expectation that you will primarily work from an HPE office.", "outcomesObjectives" : "turn insights into outcomes at the speed required to thrive in today’s complex world; improve model accuracy; improve design margins of serial links", "qualificationsBasic" : "10 + years of Signal Integrity analysis experience with a bachelor’s degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering, 8 + years of Signal Integrity analysis experience with a master’s degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering, Experience with 56G/112G ASIC PAM4 SerDes technologies is required, Hands-on experience in serial channels up to 200G line rates for coefficient tuning, TP1A measurements", "qualificationsPreferred" : "200G ASIC PAM4 experience desired, Good lab debug skills a plus", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Signal Integrity Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. **Who We Are:** Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. **Job Description:** Work with an experienced signal integrity team with many years of experience performing high speed ASIC PAM4 SerDes and system-level signal and power Integrity analysis for cutting edge networking product design. Team members are industry experts with hands-on experience with high-speed ASIC PAM4 SerDes, channel analysis, clocking, I/O timing, on-die power integrity, system-level power integrity, CPM model and PDN optimization, PCB design for SI and PI. **Key Responsibilities:** * Perform COM (channel margin analysis) to provide design trade-offs amongst ASIC package, board, and connectors. Develop ASIC PAM4 SerDes channel simulation models and correlate to test structures. * Correlate ASIC PAM4 SerDes simulation results with Measurements and work with component and ASIC vendors to improve model accuracy. * Perform PCB timing analysis, work with board engineers and layout designers to implement all design SI rules, develop and document all layout/SI design rules and checklists. * ASIC PAM4 SerDes parametric tuning to improve design margins of serial links. * Perform SI DVT measurements on boards and correlate simulations with DVT measurements. Provide technical assessment of projects to SI management team. **Basic Requirements:** * Typically, 10 + years of Signal Integrity analysis experience with a bachelor’s degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering. * Typically, 8 + years of Signal Integrity analysis experience with a master’s degree in Electrical engineering, Computer engineering, Microwave, and/or RF engineering. * Experience with 56G/112G ASIC PAM4 SerDes technologies is required. * 200G ASIC PAM4 experience desired. * Hands-on experience in serial channels up to 200G line rates for coefficient tuning, TP1A measurements. **Preferred Skills:** * Proficient with CAD tools such as Ansys HFSS, SIwave ADS, Allegro, Sigrity and MATLAB. * Proficient with lab equipment such as oscilloscopes, Vector Network Analyzers, Time Domain Reflectometers, Spectrum Analyzers, phase noise Analyzers. Good lab debug skills a plus. * Strong capabilities to debug and provide solutions for ASIC PAM4 SerDes and channel performance issues. * Design implementation for system clocks and solid understanding of PLL design and debug. * PCB Stack-up design using 2-d field solvers. **Knowledge and Skills:** * Good oral and written communication skills. * Team player able to collaborate with people across geography and in a matrix organization. * Capable of working on several projects simultaneously. **What We Can Offer You:** **Health & Wellbeing** We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing. **Personal & Professional Development** We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division. **Unconditional Inclusion** We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. **Let 's Stay Connected:** Follow [@HPECareers](http://instagram.com/hpecareers) on Instagram to see the latest on people, culture and tech at HPE. #unitedstates ### ### #networking **Job:** Engineering **Job Level:** TCP_05 \"The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. – United States of America: Annual Salary USD 174,000 - 352,500 in California The listed salary range reflects base salary. Variable incentives may also be offered.\" Information about employee benefits offered in the US can be found at [https://myhperewards.com/main/new-hire-enrollment.html](https://myhperewards.com/main/new-hire-enrollment.html) HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: [Equal Employment Opportunity](https://hr.ext.hpe.com/Equal-employment-opportunity-policy.pdf). **Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities.** HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories. **No Fees Notice & Recruitment Fraud Disclaimer** **** _It has come to HPE’s attention that there has been an increase in recruitment fraud whereby scammer impersonate HPE or HPE-authorized recruiting agencies and offer fake employment opportunities to candidates. These scammers often seek to obtain personal information or money from candidates._ _Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors **will never charge any candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process.** The credentials of any hiring agency that claims to be working with HPE for recruitment of talent should be verified by candidates and candidates shall be solely responsible to conduct such verification. Any candidate/individual who relies on the erroneous representations made by fraudulent employment agencies does so at their own risk, and HPE disclaims liability for any damages or claims that may result from any such communication._", "summaryDescription" : "Signal Integrity Engineer at Hewlett Packard Enterprise. Skills: Signal Integrity analysis, high speed ASIC PAM4 SerDes, system-level signal and power Integrity analysis, channel analysis, clocking, I/O timing, on-die power integrity, system-level power integrity, CPM model and PDN optimization, PCB design for SI and PI. Perform COM (channel margin analysis) to provide design trade-offs amongst ASIC package, board, and connectors. Develop ASIC PAM4 SerDes channel simulation models and correlate ", "postedDate" : "2026-05-05T22:23:02.713", "createdAt" : "2026-05-17T22:23:02.678", "lastUpdated" : "2026-05-18T02:14:47.073", "ingestTimestamp" : "2026-05-17T22:23:02.678", "mongoId" : "6a0a160d1663d49372b4de3a", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://hpe.wd5.myworkdayjobs.com/ACJobSite/job/Sunnyvale-California-United-States-of-America/Signal-Integrity-Engineer_1206501", "salaryAnnualMin" : 174000, "salaryAnnualMax" : 352500, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "Signal Integrity analysis", "high speed ASIC PAM4 SerDes", "system-level signal and power Integrity analysis", "channel analysis", "clocking", "I/O timing", "on-die power integrity", "system-level power integrity", "CPM model and PDN optimization", "PCB design for SI and PI", "COM (channel margin analysis)", "ASIC PAM4 SerDes channel simulation models", "correlate to test structures", "correlate ASIC PAM4 SerDes simulation results with Measurements", "PCB timing analysis", "implement all design SI rules", "develop and document all layout/SI design rules and checklists", "ASIC PAM4 SerDes parametric tuning", "SI DVT measurements on boards", "correlate simulations with DVT measurements", "serial channels up to 200G line rates for coefficient tuning", "TP1A measurements", "Design implementation for system clocks", "solid understanding of PLL design and debug", "PCB Stack-up design using 2-d field solvers", "Team player", "collaborate with people across geography and in a matrix organization", "Capable of working on several projects simultaneously", "Unconditional Inclusion", "celebrate individual uniqueness", "flexibility to manage our work and personal needs", "design trade-offs", "model accuracy", "design SI rules", "layout/SI design rules and checklists", "parametric tuning", "technical assessment of projects", "debugging and provide solutions for ASIC PAM4 SerDes and channel performance issues", "networking product design", "56G/112G ASIC PAM4 SerDes technologies", "200G ASIC PAM4", "serial channels up to 200G line rates", "system clocks", "PLL design", "Ansys HFSS", "SIwave ADS", "Allegro", "Sigrity", "MATLAB", "oscilloscopes", "Vector Network Analyzers", "Time Domain Reflectometers", "Spectrum Analyzers", "phase noise Analyzers" ], "skillCount" : 54, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 1.0, "_score" : 473.46487, "daysOld" : 12, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "edge-to-cloud" }, { "id" : "68e6b1d770f0b99d58d669f2", "title" : "Applied Scientist, Account Integrity, Account Integrity", "company" : "Amazon.com Services LLC", "industry" : "Machine Learning Science, Applied Science, selling partner services", "salary" : { "min" : 136000.0, "max" : 223400.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "San Diego, California, USA", "locations" : [ "San Diego, California, USA" ], "timestamp" : "2026-06-15T09:37:23.227", "fingerprint" : "580f360978ec40640fa54e3d5fb4521191eed620b5bf202b436244613dfae3e0", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/3103192/apply", "externalId" : "72e34cde-1108-4820-a310-1f36f2a12385", "industryFunction" : { }, "structuredLocations" : [ { "city" : "San Diego", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "32.7174202,-117.1627720" } ], "locationText" : "San Diego, California, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "Master's", "technicalSkills" : "Machine learning, Generative AI, Python, Java, C++", "professionalSkills" : [ "Risk management", "Data analysis", "Model development", "Model validation", "Model implementation", "Business reporting" ], "hardSkillsList" : [ "Statistical analysis", "Algorithmic systems", "Risk modeling" ], "hardSkills" : [ { "name" : "Statistical analysis", "level" : "intermediate" }, { "name" : "Algorithmic systems", "level" : "intermediate" }, { "name" : "Risk modeling", "level" : "intermediate" } ], "majorSkills" : "Machine learning, Risk management, Data analysis", "majorSkillsList" : [ "Machine learning", "Risk management", "Data analysis" ], "coreResponsibilities" : "Use statistical and machine learning techniques, Create scalable risk management systems, Analyze and understand business data, Design, development and evaluation of models, Drive real-time model implementations, Create new features, Optimize risk management operations, Establish scalable, efficient, automated processes, Track general business activity, Provide clear, compelling management reporting, Research and implement novel approaches", "teamCollaboration" : "Software engineering teams; Operations staff", "domainKnowledge" : "Account integrity; Customer trust; Risk mitigation", "domainList" : [ "account-integrity", "customer-trust", "risk-mitigation" ], "domainSpecificKnowledge" : [ "Account integrity", "Customer trust", "Risk mitigation" ], "communicationSkills" : "Management reporting", "innovationCreativity" : "Innovate and simplify", "problemSolvingSkills" : "Solve real world problems", "qualificationsBasic" : "Master's degree and 4+ years experience, PhD, Experience programming in Java, C++, Python, Communicate effectively and respectfully", "qualificationsPreferred" : "PhD preferred, Specific ML framework experience, Cloud platform certs", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Do you want to join an innovative team of scientists who use machine learning and statistical techniques to help Amazon provide the best customer experience by protecting Amazon customers from hackers and bad actors? Do you want to build advanced algorithmic systems that help manage the trust and safety of millions of customer every day? Are you excited by the prospect of analyzing and modeling terabytes of data and create state-of-art algorithms to solve real world problems? Do you like to innovate and simplify? If yes, then you may be a great fit to join the Amazon Account Integrity team. The Amazon Account Integrity team works to ensure that customers are protected from bad actors trying to access their accounts. Our greatest challenge is protecting customer trust without unjustly harming good customers. To strike the right balance, we invest in mechanisms which allow us to accurately identify and mitigate risk, and to quickly correct and learn from our mistakes. This strategy includes continuously evolving enforcement policies, iterating our Machine Learning risk models, and exercising high‐judgement decision‐making where we cannot apply automation. Key job responsibilities - Use statistical and machine learning techniques and Generative AI to create scalable risk management systems - Analyzing and understanding large amounts of Amazon’s historical business data for specific instances of risk or broader risk trends - Design, development and evaluation of highly innovative models for risk management - Working closely with software engineering teams to drive real-time model implementations and new feature creations - Working closely with operations staff to optimize risk management operations - Establishing scalable, efficient, automated processes for large scale data analyses, model development, model validation and model implementation - Tracking general business activity and providing clear, compelling management reporting on a regular basis - Research and implement novel machine learning and statistical approaches Basic Qualifications: - PhD, or Master's degree and 4+ years of CS, CE, ML or related field experience - Experience programming in Java, C++, Python or related language - Experience in any of the following areas: algorithms and data structures, parsing, numerical optimization, data mining, parallel and distributed computing, high-performance computing Preferred Qualifications: - Experience using Unix/Linux - Experience in professional software development Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $136,000/year in our lowest geographic market up to $223,400/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits . This position will remain posted until filled. Applicants should apply via our internal or external career site.", "summaryDescription" : "Applied Scientist, Account Integrity, Account Integrity at Amazon.com Services LLC. Skills: Machine learning, Risk management, Data analysis. Use statistical and machine learning techniques. Create scalable risk management systems", "postedDate" : "2026-06-14T02:20:48.712", "createdAt" : "2026-06-14T02:20:48.712", "lastUpdated" : "2026-06-15T09:37:23.227", "ingestTimestamp" : "2026-06-14T02:20:48.712", "mongoId" : "68e6b1d770f0b99d58d669f2", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/3103192/apply", "salaryAnnualMin" : 136000, "salaryAnnualMax" : 223400, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Statistical analysis", "Algorithmic systems", "Risk modeling", "Machine learning", "Risk management", "Data analysis", "Model development", "Model validation", "Model implementation", "Business reporting", "Account integrity", "Customer trust", "Risk mitigation" ], "skillCount" : 13, "jobCategory" : "engineering", "jobSubcategory" : "data", "seniorityLevel" : "Senior", "dataQualityScore" : 0.8888889, "_score" : 456.2313, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "6a2c682b74d8ee00a0902805", "title" : "Senior Data Integrity Engineer", "company" : "Pearl", "industry" : "Engineering", "salary" : { "min" : 145000.0, "max" : 205000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Senior Data Integrity Engineer in the US, adjusted for seniority and the healthcare industry." }, "location" : "United States - Remote", "locations" : [ "United States - Remote" ], "timestamp" : "2026-06-15T21:29:19.965", "fingerprint" : "503ed15b28fa49980e20dbf0528870ac6236e41725dce9db3ad0632d0b34d4cc", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/pearl/35aa130a-4fcd-4749-ab9d-e82d69679a03/application", "externalId" : "35aa130a-4fcd-4749-ab9d-e82d69679a03", "industryFunction" : { }, "structuredLocations" : [ { "country" : "United States", "continent" : "na", "workMode" : "remote" } ], "locationText" : "United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Node.js, TypeScript, AWS Lambda, PostgreSQL, Snowflake", "professionalSkills" : [ "Production systems", "Data quality", "Vendor relationships" ], "hardSkillsList" : [ "Data validation", "Data transformation", "Data reconciliation" ], "hardSkills" : [ { "name" : "Data validation", "level" : "intermediate" }, { "name" : "Data transformation", "level" : "intermediate" }, { "name" : "Data reconciliation", "level" : "intermediate" } ], "majorSkills" : "Data integrity, Data quality monitoring, Vendor data management", "majorSkillsList" : [ "Data integrity", "Data quality monitoring", "Vendor data management" ], "coreResponsibilities" : "Analyze vendor data, Identify omissions, Identify inaccuracies, Identify inconsistencies, Build automated data quality monitoring, Build alerting systems, Design systems, Implement systems, Measure precision, Measure recall, Improve precision, Improve recall, Quantify data issues, Prioritize by product impact, Track improvement, Own vendor data quality relationships, Work with data providers, Drive upstream fixes, Detect stale data connections, Detect broken data connections, Reduce manual overhead, Write application code, Validate incoming data, Transform incoming data, Reconcile incoming data, Programmatic detection systems, Programmatic correction systems, Communicate findings, Translate data problems", "teamCollaboration" : "Engineering; Product; Leadership", "domainKnowledge" : "Dental imagery; Dental insurance; Clinical decisions; Insurance data; Regulated data", "domainList" : [ "dental-imagery", "dental-insurance", "clinical-decisions", "insurance-data", "regulated-data" ], "domainSpecificKnowledge" : [ "Dental imagery", "Dental insurance", "Clinical decisions", "Insurance data", "Regulated data" ], "toolProficiency" : [ "Cursor", "Claude Code" ], "communicationSkills" : "Structured reporting; Formal SLAs", "continuousLearning" : "Ongoing training; Development opportunities", "problemSolvingSkills" : "Root cause analysis; Troubleshooting", "outcomesObjectives" : "Make the data right; Make recommendations more trustworthy", "qualificationsBasic" : "Senior-level engineering skills, Node.js proficiency, SQL skills, Product mindset, Self-directed problem finder, Comfortable owning vendor relationships, Enthusiastic about agentic software development", "qualificationsPreferred" : "TypeScript experience is a plus, Healthcare or insurance domain knowledge is a plus", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "ABOUT PEARL Pearl is shaping the future of dentistry with a suite of AI solutions developed to establish higher standards of quality and care for patients worldwide. Since 2019, our team has engineered FDA-cleared computer vision capabilities for the interpretation of 2D and 3D dental imagery — industry-leading capabilities which clinicians, practice owners, labs, and insurers use to elevate the efficiency, accuracy, and consistency of dental care around the world. At Pearl, we believe AI isn’t just what we build—it’s how we build. We’re looking for engineers who embrace AI-powered development tools to amplify their output and ship better software, faster. THE ROLE Dental insurance is messy. Every payer has different rules, different data formats, and different ideas about what they’ll cover and when. We’re building AI that cuts through that complexity so dentists can focus on patients instead of navigating insurance. Our product sits at the intersection of clinical decisions and insurance data — and the quality of our recommendations lives or dies on the quality of that data. The data is high-cardinality, spans multiple domains, and comes from vendors with varying levels of reliability. Fields are missing. Values contradict each other. Connections go stale. We want to catch these problems before our customers ever feel them — and unlock new value by trusting the data enough to build on it. We need someone who owns this problem end to end. Not as a side project for the engineering team, but as the job. Think of it as detective work backed by engineering. You’ll trace bad recommendations back to their source, build systems that catch problems before customers do, and hold vendors accountable for the data they send us. Some days that’s writing code, some days it’s writing a report for a vendor call — but the mission is always the same: make the data right. This role has a direct line from your work to the product getting smarter. Every data problem you solve makes our recommendations more trustworthy — and dentists notice. WHAT YOU’LL DO - Analyze incoming vendor data across every domain we integrate with to identify omissions, inaccuracies, and inconsistencies — the data is complex, and the problems are often subtle - Build automated data quality monitoring and alerting — design and implement systems that catch problems before they reach our customers - Measure and improve the precision and recall of our recommendations — quantify the impact of data issues, prioritize by product impact, and track improvement over time - Own vendor data quality relationships — work directly with data providers through structured reporting, regular syncs, and formal SLAs to drive upstream fixes - Proactively detect stale or broken data connections and find ways to reduce the manual overhead required to keep them healthy - Write application code to validate, transform, and reconcile incoming data — not just queries, but programmatic detection and correction systems - Communicate findings to engineering, product, and leadership — translate data problems into product impact that drives prioritization WHAT YOU'LL NEED TO SUCCEED - Senior-level engineering skills — you’re a strong programmer, not an analyst who can script. You can build production systems, not just notebooks - Node.js proficiency — TypeScript experience is a plus. Our stack is Node, AWS Lambda, PostgreSQL, with Snowflake available for analytical workloads - Strong SQL skills — you’ll live in PG and Snowflake, exploring large datasets to find patterns in what’s missing or wrong - Product mindset — you think about data quality in terms of “what does this do to the user’s experience,” not just “is this field populated.” You’ll need to understand our product deeply to do this job well - Self-directed problem finder — you don’t wait to be told what’s broken. You dig, you notice, you quantify, and you propose the fix - Comfortable owning vendor relationships — you’ll be on calls with data providers, writing up findings, pushing for fixes. This requires clarity, persistence, and professionalism - Enthusiastic about agentic software development — you actively use tools like Cursor and Claude Code to multiply your output. This isn’t optional or aspirational; it’s how you work today NICE TO HAVE Healthcare or insurance domain knowledge is a plus, not a requirement — if you’ve worked with complex, regulated data where accuracy has real consequences, great. If not, you need the curiosity and capacity to learn fast WHAT WE OFFER - Competitive compensation and benefits - Ongoing training and development opportunities - Flexible, uncapped PTO - Remote work environment", "summaryDescription" : "Senior Data Integrity Engineer at Pearl. Skills: Data integrity, Data quality monitoring, Vendor data management. Analyze vendor data. Identify omissions", "createdAt" : "2026-06-14T17:41:13.905", "lastUpdated" : "2026-06-15T21:29:19.965", "ingestTimestamp" : "2026-06-14T17:41:13.905", "mongoId" : "6a2c682b74d8ee00a0902805", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 145000, "salaryAnnualMax" : 205000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Data validation", "Data transformation", "Data reconciliation", "Data integrity", "Data quality monitoring", "Vendor data management", "Production systems", "Data quality", "Vendor relationships", "Dental imagery", "Dental insurance", "Clinical decisions", "Insurance data", "Regulated data", "Cursor", "Claude Code" ], "skillCount" : 16, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Senior", "dataQualityScore" : 0.8888889, "_score" : 456.07394, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "Healthcare", "llmIndustryConfidence" : 0.95 }, { "id" : "69e1043a2beec4dd3def1d6f", "title" : "System Development Eng, PCIe, AWS PCIe and Signal Integrity Team", "company" : "Amazon Data Services, Inc.", "industry" : "Hardware Development, System Development Engineering, Cloud Computing", "salary" : { "min" : 129000.0, "max" : 174800.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Seattle, Washington, USA", "locations" : [ "Seattle, Washington, USA" ], "timestamp" : "2026-06-15T00:56:55.130", "fingerprint" : "f11f62f5a5f0b1ffe9cbeb85308bf1abf0d4ddab3e4fec1b389a9be57d69db32", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/10391631/apply", "externalId" : "26ac8548-c212-4781-a2eb-1ff14da46b35", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Seattle", "state" : "Washington", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "47.6038321,-122.3300620" } ], "locationText" : "Seattle, Washington, United States", "employmentType" : "FULL_TIME", "technicalSkills" : "PCIe, Firmware, High-speed interfaces, C++, C#, Java, Python, Golang, PowerShell, Ruby, AWS", "professionalSkills" : [ "System design", "Hardware engineering", "Software engineering", "Signal integrity", "Process improvement" ], "hardSkillsList" : [ "Telemetry improvement", "Firmware qualification", "System validation" ], "softSkillsList" : [ "Team-driven", "Customer-obsessed", "Bold ideas" ], "hardSkills" : [ { "name" : "Telemetry improvement", "level" : "intermediate" }, { "name" : "Firmware qualification", "level" : "intermediate" }, { "name" : "System validation", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Team-driven" }, { "name" : "Customer-obsessed" }, { "name" : "Bold ideas" } ], "majorSkills" : "PCIe topology, Signal integrity, High-speed design, Firmware development", "majorSkillsList" : [ "PCIe topology", "Signal integrity", "High-speed design", "Firmware development" ], "coreResponsibilities" : "Design server hardware and software, Develop next-generation high-speed designs, Manage PCIe topology for EC2 servers, Develop retimer and switch firmware, Design, develop, validate high throughput interfaces, Build environments to track fleet performance, Qualify firmware, Validate system designs, Support debugging, Improve telemetry", "teamCollaboration" : "Interdisciplinary team of engineers; Collaborate with people across AWS", "domainKnowledge" : "Server components; Server systems; High-speed interconnect; PCIe; Signal integrity", "domainList" : [ "server-components", "server-systems", "high-speed-interconnect", "pcie", "signal-integrity" ], "domainSpecificKnowledge" : [ "Server components", "Server systems", "High-speed interconnect", "PCIe", "Signal integrity" ], "continuousLearning" : "Knowledge-sharing; Mentorship; Career-advancing resources", "innovationCreativity" : "Bold ideas", "problemSolvingSkills" : "Root-causing issues; Troubleshoot issues", "outcomesObjectives" : "Deliver highest standards for safety; Provide infinite capacity at lowest cost", "qualificationsBasic" : "3+ years software development experience, 3+ years system design experience, Experience with C++, C#, Java, Python, Golang, PowerShell, or Ruby, BS degree in electrical or computer engineering, Experience resolving hardware/firmware/software issues, Experience writing functional and performance tests", "qualificationsPreferred" : "Master's degree in engineering, Knowledge of full software/hardware/networks development lifecycle, Experience with high speed interconnect, Experience with PCIe, Experience developing test plans and procedures, Experience in systems design, operations, automation", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "AWS EC2 owns the design, planning, delivery, and operation of all AWS server instances. In other words, we’re the people who keep the cloud running. We support all AWS compute, storage, accelerator servers and ensure our customers have continual access to the innovation they rely on. We work on the most challenging problems, with thousands of variables impacting the supply chain — and we’re looking for talented people who want to help. You’ll join a diverse team of hardware engineers, software engineers, system engineers, technical program managers, and other vital roles. You’ll collaborate with people across AWS to help us deliver the highest standards for safety and security while providing seemingly infinite capacity at the lowest possible cost for our customers. And you’ll experience an inclusive culture that welcomes bold ideas and empowers you to own them to completion. Key job responsibilities AWS Hardware Engineering is looking for a customer-obsessed, team-driven technology leader to take our engineering of server hardware and software to the next level. As a System Development Engineer on the PCIe and Signal Integrity team within the Core Components Organization, you will work on next-generation high-speed designs for server components and systems. You will be responsible for the success of PCIe topology for EC2 servers, including retimer and switch firmware. You will work with an interdisciplinary team of engineers to design, develop, validate, launch, monitor and troubleshoot high throughput interfaces at scale. You will design and build environments to track fleet performance, qualify firmware, validate system designs and support debugging, and improve telemetry. At AWS we are changing the industry and want individuals who are ready for a challenge to reach beyond what is possible today. About the team Why AWS Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses. Inclusive Team Culture Here at AWS, it’s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness. Work/Life Balance We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud. Mentorship and Career Growth We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional. Diverse Experiences Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying. Basic Qualifications: - 3+ years of non-internship professional software development experience - 3+ years of designing or architecting (design patterns, reliability and scaling) of new and existing systems experience - Experience programming with at least one modern language such as C++, C#, Java, Python, Golang, PowerShell, Ruby - BS degree in electrical, computer engineering or equivalent. - Experience in identifying, root-causing and resolving hardware/firmware/software issues in large scale systems. - Experience in writing and implementing functional and performance tests for manufacturing and in field coverage, including telemetry. Preferred Qualifications: - Master’s degree in electrical, software, computer engineering or equivalent. - Knowledge of engineering practices and patterns for the full software/hardware/networks development life cycle, including coding standards, code reviews, source control management, build processes, testing, certification, and livesite operations. - Experience with high speed interconnect, including PCIe. - Experience with developing qualification and manufacturing acceptance test plans, test procedures, and test environments. - Experience in systems design, operations, automation, and process improvement. Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits . USA, WA, Seattle - 129,200.00 - 174,800.00 USD annually", "summaryDescription" : "System Development Eng, PCIe, AWS PCIe and Signal Integrity Team at Amazon Data Services, Inc.. Skills: PCIe topology, Signal integrity, High-speed design, Firmware development. Design server hardware and software. Develop next-generation high-speed designs", "postedDate" : "2026-04-14T00:00:00.000", "createdAt" : "2026-06-13T09:29:16.762", "lastUpdated" : "2026-06-15T00:56:55.130", "ingestTimestamp" : "2026-06-13T09:29:16.762", "mongoId" : "69e1043a2beec4dd3def1d6f", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/10391631/apply", "salaryAnnualMin" : 129000, "salaryAnnualMax" : 174800, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Telemetry improvement", "Firmware qualification", "System validation", "Team-driven", "Customer-obsessed", "Bold ideas", "PCIe topology", "Signal integrity", "High-speed design", "Firmware development", "System design", "Hardware engineering", "Software engineering", "Process improvement", "Server components", "Server systems", "High-speed interconnect", "PCIe" ], "skillCount" : 18, "jobCategory" : "other", "dataQualityScore" : 0.8888889, "_score" : 453.53235, "daysOld" : 62, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Cloud Computing" }, { "id" : "6a0eceda58b93c861eee0065", "title" : "Senior Signal and Power Integrity Engineer", "company" : "NVIDIA", "industry" : "artificial intelligence", "salary" : { "min" : 136000.0, "max" : 264500.0, "currency" : "USD", "frequency" : "yearly" }, "location" : "US, CA, Santa Clara", "locations" : [ "US, CA, Santa Clara", "United States of America" ], "timestamp" : "2026-05-21T11:57:27.454", "fingerprint" : "83fa432ccecc05884c270dd04af9e0f0abe409d9e3a8f796f915d8e43647be90", "source" : "workday", "language" : "en", "applyUrl" : "https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-Signal-and-Power-Integrity-Engineer_JR2016926", "externalId" : "JR2016926", "industryFunction" : { }, "locationPoint" : "45.16105,12.2989", "structuredLocations" : [ { "city" : "Santa Clara", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite" }, { "workMode" : "remote" } ], "locationText" : "Santa Clara, California, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "BS/MS in Electrical Engineering (or equivalent experience)", "experienceMinYears" : 4, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB, HFSS, Sigrity, Hspice, Cadence Allegro PCB designer, Constraints Manager, NRZ, PAM4", "professionalSkills" : [ "SI/PI design", "PCB stack up design", "material selection", "design guide implementation", "layout review", "post-layout analysis", "Power delivery network (PDN) analysis", "system-level signal integrity simulation", "PKG/PCB material characterization", "model correlation", "high-volume PCB manufacturing impacts on channel signal integrity", "package design", "interface timing budgets", "system modeling", "high-speed transmitter design", "receiver design", "equalization schemes" ], "hardSkillsList" : [ "Electromagnetics", "channel components", "transmission line theory", "TDR & VNA measurement" ], "softSkillsList" : [ "love a challenge", "diverse team" ], "hardSkills" : [ { "name" : "Electromagnetics", "level" : "intermediate" }, { "name" : "channel components", "level" : "intermediate" }, { "name" : "transmission line theory", "level" : "intermediate" }, { "name" : "TDR & VNA measurement", "level" : "intermediate" } ], "softSkills" : [ { "name" : "love a challenge" }, { "name" : "diverse team" } ], "majorSkills" : "Signal Integrity (SI), Power Integrity (PI)", "majorSkillsList" : [ "Signal Integrity (SI)", "Power Integrity (PI)" ], "coreResponsibilities" : "Lead board/system SI design activities, PCB stack up design, material selection, design guide implementation, layout review, post-layout analysis, System-level signal integrity simulation of PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB and other interfaces, Analyze and optimize Power delivery network (PDN) on PCBs, TDR & VNA measurement for PKG/PCB material characterization and model correlation", "teamCollaboration" : "Work closely with Package and PCB Design teams crafting solutions for system SI/PI performance.; Work with Application Engineering supporting customer board designs.", "domainKnowledge" : "high speed electrical interfaces; electromagnetics; channel components; transmission line theory; Power delivery network (PDN); high-volume PCB manufacturing; package design; interface timing budgets; system modeling; high-speed transmitter design; receiver design; equalization schemes; NRZ; PAM4", "domainList" : [ "high-speed-electrical-interfaces", "electromagnetics", "channel-components", "transmission-line-theory", "power-delivery-network-pdn", "high-volume-pcb-manufacturing", "package-design", "interface-timing-budgets", "system-modeling", "high-speed-transmitter-design", "receiver-design", "equalization-schemes", "nrz", "pam4" ], "domainSpecificKnowledge" : [ "high speed electrical interfaces", "electromagnetics", "channel components", "transmission line theory", "Power delivery network (PDN)", "high-volume PCB manufacturing", "package design", "interface timing budgets", "system modeling", "high-speed transmitter design", "receiver design", "equalization schemes", "NRZ", "PAM4" ], "toolProficiency" : [ "HFSS", "Sigrity", "Hspice", "Cadence Allegro PCB designer", "Constraints Manager", "PCB stack up designer tools", "TDR", "VNA" ], "innovationCreativity" : "NVIDIA has continuously reinvented itself over two decades.; Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing.; More recently, GPU deep learning ignited modern AI — the next era of computing.; NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world.; This is our life’s work, to amplify human imagination and intelligence.; This is a dynamic team working with state of the art, unique technology.; help move the needle!", "problemSolvingSkills" : "hard to solve; that only we can tackle", "outcomesObjectives" : "have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.", "qualificationsBasic" : "BS/MS in Electrical Engineering (or equivalent experience), minimum 4 years of experience as a SI/PI engineer, Good understanding of electromagnetics, channel components and transmission line theory, Experience with design and implementation of one or more high speed electrical interfaces, such as PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB etc., Hands on experience with HFSS, Sigrity, Hspice or similar industry standard simulation tools, Experienced with Cadence Allegro PCB designer and Constraints Manager and or other PCB stack up designer tools., Understanding of impacts of high-volume PCB manufacturing on channel signal integrity", "qualificationsPreferred" : "Expertise in one or more of the high-speed interface SI/PI designs on any industry standard system platforms., Exposure to package design, interface timing budgets and system modeling, Familiarity with high-speed transmitter, receiver design and various equalization schemes, Familiarity with various signaling schemes like NRZ, PAM4 is a plus.", "remoteFriendly" : true, "workSiteFlexibility" : "No", "rawDescription" : "We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle! This position offers the opportunity to have real impact in a multifaceted, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. **What you 'll be doing:** * Lead board/system SI design activities, PCB stack up design, material selection, design guide implementation, layout review, and post-layout analysis. * System-level signal integrity simulation of PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB and other interfaces. * Analyze and optimize Power delivery network (PDN) on PCBs. * Work closely with Package and PCB Design teams crafting solutions for system SI/PI performance. * Work with Application Engineering supporting customer board designs. * TDR & VNA measurement for PKG/PCB material characterization and model correlation **What we need to see:** * BS/MS in Electrical Engineering (or equivalent experience) with minimum 4 years of experience as a SI/PI engineer * Good understanding of electromagnetics, channel components and transmission line theory * Experience with design and implementation of one or more high speed electrical interfaces, such as PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB etc. * Hands on experience with HFSS, Sigrity, Hspice or similar industry standard simulation tools * Experienced with Cadence Allegro PCB designer and Constraints Manager and or other PCB stack up designer tools. * Understanding of impacts of high-volume PCB manufacturing on channel signal integrity **Ways to stand out from the crowd:** * Expertise in one or more of the high-speed interface SI/PI designs on any industry standard system platforms. * Exposure to package design, interface timing budgets and system modeling * Familiarity with high-speed transmitter, receiver design and various equalization schemes * Familiarity with various signaling schemes like NRZ, PAM4 is a plus. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and [benefits](https://www.nvidia.com/en-us/benefits/). Applications for this job will be accepted at least until May 3, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.", "summaryDescription" : "Senior Signal and Power Integrity Engineer at NVIDIA. Skills: Signal Integrity (SI), Power Integrity (PI). Lead board/system SI design activities. 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characterization", "model correlation", "high-volume PCB manufacturing impacts on channel signal integrity", "package design", "interface timing budgets", "system modeling", "high-speed transmitter design", "receiver design", "equalization schemes", "high speed electrical interfaces", "electromagnetics", "Power delivery network (PDN)", "high-volume PCB manufacturing", "NRZ", "PAM4", "HFSS", "Sigrity", "Hspice", "Cadence Allegro PCB designer", "Constraints Manager", "PCB stack up designer tools", "TDR", "VNA" ], "skillCount" : 39, "jobCategory" : "engineering", "seniorityLevel" : "senior", "dataQualityScore" : 1.0, "_score" : 447.95142, "daysOld" : 22, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "artificial intelligence" }, { "id" : "69e104412beec4dd3def2806", "title" : "Sr. Thermal Scientist/Engineer, Product Integrity, Hardware - Product Integrity", "company" : "Amazon.com Services LLC", "industry" : "Research Science, Applied Science, alexa and amazon devices", "salary" : { "min" : 167100.0, "max" : 226100.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Bellevue, Washington, USA", "locations" : [ "Bellevue, Washington, USA" ], "timestamp" : "2026-06-15T03:56:31.338", "fingerprint" : "1bc26eaac79b7869f31d1fdc18091efb0f195f6cb8f587a82a5b749125ef6fcc", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/10386488/apply", "externalId" : "9306adc5-f4af-4093-9f69-c19162cd1396", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Bellevue", "state" : "Washington", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "47.6144219,-122.1923370" } ], "locationText" : "Bellevue, Washington, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Python, Matlab, CFD", "professionalSkills" : [ "Thermal performance optimization", "Concept design", "Product architecture", "System validation", "Manufacturing release", "Electronic assemblies analysis", "Simulation", "Experimentation", "Material knowledge", "Heat spreader solutions", "Analytical analyses", "Statistical analyses", "Hardware design", "Algorithmic solutions", "Design guidelines development" ], "hardSkillsList" : [ "Thermal analysis", "Thermal testing", "Statistical analysis", "Tolerance analysis", "Manufacturing processes", "Design for Manufacturability", "Design for Assembly" ], "softSkillsList" : [ "Leadership", "Meticulousness" ], "hardSkills" : [ { "name" : "Thermal analysis", "level" : "intermediate" }, { "name" : "Thermal testing", "level" : "intermediate" }, { "name" : "Statistical analysis", "level" : "intermediate" }, { "name" : "Tolerance analysis", "level" : "intermediate" }, { "name" : "Manufacturing processes", "level" : "intermediate" }, { "name" : "Design for Manufacturability", "level" : "intermediate" }, { "name" : "Design for Assembly", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Leadership" }, { "name" : "Meticulousness" } ], "majorSkills" : "Thermal science, Thermal engineering, CFD simulation, Product integrity", "majorSkillsList" : [ "Thermal science", "Thermal engineering", "CFD simulation", "Product integrity" ], "coreResponsibilities" : "Establish temperature thresholds, Apply scientific expertise, Develop innovative analysis, Develop innovative tests, Evaluate thermal solution requirements, Optimize thermal solution requirements, Use simulation tools, Analyze product design, Optimize product design, Validate design modifications, Resolve thermal issues, Use programming languages for analysis, Use programming languages for automation, Drive validation of hardware, Drive optimization of hardware, Drive implementation of hardware, Improve product risks, Improve customer risks, Design tests, Execute tests, Validate analytical models, Identify risks, Assess design margins, Track business activity, Provide management reports, Develop design guidelines, Apply design guidelines", "teamCollaboration" : "Multidisciplinary group; Engineering teams; Cross-functional teams", "domainKnowledge" : "Consumer electronics; Low Earth Orbit satellites; Broadband connectivity; Electronic assemblies; Heat spreaders; Injection molding; Sheet metal forming; Die casting", "domainList" : [ "consumer-electronics", "low-earth-orbit-satellites", "broadband-connectivity", "electronic-assemblies", "heat-spreaders", "injection-molding", "sheet-metal-forming", "die-casting" ], "domainSpecificKnowledge" : [ "Consumer electronics", "Low Earth Orbit satellites", "Broadband connectivity", "Electronic assemblies", "Heat spreaders", "Injection molding", "Sheet metal forming", "Die casting" ], "toolProficiency" : [ "Star-CCM+", "FloTherm XT/EFD", "Creo Systems", "JMP", "ReliaSoft" ], "communicationSkills" : "Clear reports; Compelling reports", "innovationCreativity" : "Innovative solutions; Creative developments", "problemSolvingSkills" : "Problem solving", "specialRequirements" : "International travel", "qualificationsBasic" : "PhD or Master's degree, 7+ years industry/academic research, 7+ years CFD thermal simulation, 7+ years Star-CCM+, FloTherm XT/EFD, Geometric tolerances experience, Statistical tolerance analysis experience, Python and Matlab for analysis, Manufacturing processes experience, DFM and DFA experience", "qualificationsPreferred" : "Consumer electronics enclosure materials design, PhD in mechanical engineering, Creo Systems knowledge, Matlab or other engineering tools, Statistical analysis tools experience, 2+ years ML model building", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "As a Sr. Applied Scientist, you will be responsible for assessing and optimizing the thermal performance of our new and emerging category of devices - Amazon Leo customer terminals. AMZ Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to un-served and under-served communities around the world. The team is a multidisciplinary group of engineers and scientists engaged in a fast paced mission to deliver new products. The team faces a challenging task of balancing cost, schedule, and performance requirements. You should be comfortable collaborating in a fast-paced and often uncertain environment, and contributing to innovative solutions, while demonstrating leadership, technical competence, and meticulousness. Your deliverables will include development of thermal solutions, concept design, feature development, product architecture and system validation through to manufacturing release. You will support creative developments through application of analysis and testing of complex electronic assemblies using advanced simulation and experimentation tools and techniques. Key job responsibilities In this role, you will: - Establish temperature thresholds for device and component level considering reliability requirements and use conditions - Apply domain scientific expertise towards developing innovative analysis and tests to study viability of concepts, materials or designs - Evaluate and optimize thermal solution requirements of electronics products - Use simulation tools like Star-CCM+ or FloTherm XT/EFD for analysis and optimization of product design - Validate design modifications for thermal concerns using simulation and actual prototypes - Leverage intimate knowledge of various materials and heat spreaders solutions to resolve thermal issues - Use of programming languages like Python and Matlab for analytical/statistical analyses and automation - Work closely with engineering teams to drive validation, optimization and implementation of hardware design or software algorithmic solutions to improve product and customer risks - Design and execute of tests using statistical tools to validate analytical models, identify risks and assess design margins - Track general business activity including device health in development phase and in field, and provide clear, compelling reports to management on a regular basis - Develop and apply design guidelines based on project learnings About the team Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have produced devices like Fire tablets, Fire TV and Amazon Echo. What will you help us create? Basic Qualifications: - PhD, or Master's degree and 7+ years of industry or academic research experience - 7+ years of experience using CFD thermal simulation software in consumer electronics - 7+ years of experience using Star-CCM+, FloTherm XT/EFD or comparable tool - Experience using geometric tolerances and statistical tolerance analysis techniques - Use of programming languages like Python and Matlab for analytical/statistical analyses and automation - Experience in manufacturing processes such as injection molding, sheet metal forming and die casting, Design for Manufacturability (DFM) and Design for Assembly (DFA) Preferred Qualifications: - Demonstrated design experience with consumer electronics enclosure materials - PhD in mechanical engineering or related field - Creo Systems knowledge, Experience with Matlab or other engineering tools for modeling systems - Demonstrated experience with statistical analysis tools like JMP and ReliaSoft - This position may require international travel - Experience in mentoring, leading and coaching - 2+ years of experience of building machine learning models for business application Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits . USA, CA, Sunnyvale - 192,200.00 - 260,000.00 USD annually USA, WA, Bellevue - 167,100.00 - 226,100.00 USD annually", "summaryDescription" : "Sr. Thermal Scientist/Engineer, Product Integrity, Hardware - Product Integrity at Amazon.com Services LLC. Skills: Thermal science, Thermal engineering, CFD simulation, Product integrity. Establish temperature thresholds. Apply scientific expertise", "postedDate" : "2026-06-13T08:00:38.564", "createdAt" : "2026-06-13T08:00:38.564", "lastUpdated" : "2026-06-15T03:56:31.338", "ingestTimestamp" : "2026-06-13T08:00:38.564", "mongoId" : "69e104412beec4dd3def2806", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/10386488/apply", "salaryAnnualMin" : 167100, "salaryAnnualMax" : 226100, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "Thermal analysis", "Thermal testing", "Statistical analysis", "Tolerance analysis", "Manufacturing processes", "Design for Manufacturability", "Design for Assembly", "Leadership", "Meticulousness", "Thermal science", "Thermal engineering", "CFD simulation", "Product integrity", "Thermal performance optimization", "Concept design", "Product architecture", "System validation", "Manufacturing release", "Electronic assemblies analysis", "Simulation", "Experimentation", "Material knowledge", "Heat spreader solutions", "Analytical analyses", "Statistical analyses", "Hardware design", "Algorithmic solutions", "Design guidelines development", "Consumer electronics", "Low Earth Orbit satellites", "Broadband connectivity", "Electronic assemblies", "Heat spreaders", "Injection molding", "Sheet metal forming", "Die casting", "Star-CCM+", "FloTherm XT/EFD", "Creo Systems", "JMP", "ReliaSoft" ], "skillCount" : 41, "jobCategory" : "other", "dataQualityScore" : 1.0, "_score" : 447.83063, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Consumer Electronics" }, { "id" : "69dde4492beec4dd3d9a32dd", "title" : "ITS Analyst I- Traffic Signal Crew", "company" : "TxDOT", "industry" : "Government", "salary" : { "min" : 54278.0, "max" : 87046.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "UST-Texas-Beaumont-Beaumont District Headquarters", "locations" : [ "UST-Texas-Beaumont-Beaumont District Headquarters", "Yearly", "Exempt,
Beaumont District Headquarters (20DISTHQ)
8350 EASTEX FREEWAY
Beaumont, 77708

, Beaumont District Headquarters" ], "timestamp" : "2026-06-16T00:57:09.400", "fingerprint" : "2512cf652bdc1de15e33b33959da3ebc5b89f9efebcfed09bd852df7dc1e4625", "source" : "taleo", "language" : "en", "applyUrl" : "https://fa009.taleo.net/careersection/ex/jobdetail.ftl?job=43722", "externalId" : "43722", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Beaumont", "state" : "Texas", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "30.0829344,-94.0984277" } ], "locationText" : "Beaumont, Texas, United States", "technicalSkills" : "ITS", "professionalSkills" : [ "System design", "Traffic flow" ], "hardSkillsList" : [ "Traffic signal systems" ], "hardSkills" : [ { "name" : "Traffic signal systems", "level" : "intermediate" } ], "majorSkills" : "Intelligent Transportation Systems, Traffic signal design", "majorSkillsList" : [ "Intelligent Transportation Systems", "Traffic signal design" ], "coreResponsibilities" : "Design automated systems, Refine automated systems, Implement automated systems, Steward technology for Operations Center", "teamCollaboration" : "Public partners; Private partners", "domainKnowledge" : "Intelligent Transportation Systems", "domainList" : [ "intelligent-transportation-systems" ], "domainSpecificKnowledge" : [ "Intelligent Transportation Systems" ], "outcomesObjectives" : "Keep traffic flowing; Keep communities moving", "qualificationsBasic" : "5+ years ITS experience", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "TxDOT's Beaumont District is looking for an ITS Analyst I to join us in our Traffic Signal Department. If you’re driven by the challenge of shaping smarter, safer, and more connected transportation networks, this role puts you at the center of that mission. As a key contributor to our Intelligent Transportation Systems (ITS) initiatives, you’ll design, refine, and implement the automated systems that keep traffic flowing and communities moving. You’ll work independently on meaningful technical projects, collaborate with public and private partners, and help steward the technology that powers our Intelligent Transportation Operations Center. It’s a chance to turn complex data and infrastructure into real-world impact. Salary Plan/Grade: ITS Analyst I (B21): $54,278 - $87,046/yearly Physical Work Location: 8350 Eastex Freeway, Beaumont TX, 77708 54,278.00 87,046.00", "summaryDescription" : "ITS Analyst I- Traffic Signal Crew at TxDOT. Skills: Intelligent Transportation Systems, Traffic signal design. Design automated systems. Refine automated systems", "createdAt" : "2026-06-14T20:49:32.015", "lastUpdated" : "2026-06-16T00:57:09.400", "ingestTimestamp" : "2026-06-14T20:49:32.015", "mongoId" : "69dde4492beec4dd3d9a32dd", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 54278, "salaryAnnualMax" : 87046, "salaryBand" : "50k-75k", "hasSalary" : true, "allSkills" : [ "Traffic signal systems", "Intelligent Transportation Systems", "Traffic signal design", "System design", "Traffic flow" ], "skillCount" : 5, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Entry", "dataQualityScore" : 0.6666667, "_score" : 446.43002, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Government", "llmIndustryConfidence" : 0.92 }, { "id" : "6a216de574d8ee00a0c0c31e", "title" : "Signal Integrity Engineer - MTS", "company" : "Signal Integrity Engineer", "industry" : "Semiconductor", "salary" : { "min" : 155000.0, "max" : 340000.0, "currency" : "USD", "frequency" : "yearly" }, "location" : "Boise, ID - Front Street - Office", "locations" : [ "Boise, ID - Front Street - Office", "United States of America" ], "timestamp" : "2026-06-05T06:22:00.489", "fingerprint" : "ff1532eb4a47b928c04fe378eda5a6ed383c326a55d0ba9e1b0a881a16e4e1da", "source" : "workday", "language" : "en", "applyUrl" : "https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Front-Street---Office/Signal-Integrity-Engineer---MTS_JR100241", "externalId" : "JR100241", "industryFunction" : { }, "locationPoint" : "43.6135,-116.20345", "structuredLocations" : [ { "city" : "Boise", "state" : "Idaho", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "43.6166163,-116.2008860" } ], "locationText" : "Boise, Idaho, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "PhD", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "Signal Integrity, Power Integrity, Mixed-signal Circuit Design, Matlab, HFSS, HSPICE, SPECTRE, ADS", "professionalSkills" : [ "Interconnect exploration", "Signaling development", "Channel improvement", "Circuit power reduction", "Data encoding", "Channel equalization", "Interconnect technologies", "Interface standardization", "Customer engagement", "Partner engagement", "Methodology improvement" ], "hardSkillsList" : [ "Signal Integrity", "Power Integrity", "Mixed-signal Circuit Design", "Time domain simulation", "Frequency domain simulation", "Lab measurement" ], "softSkillsList" : [ "Mentoring" ], "hardSkills" : [ { "name" : "Signal Integrity", "level" : "intermediate" }, { "name" : "Power Integrity", "level" : "intermediate" }, { "name" : "Mixed-signal Circuit Design", "level" : "intermediate" }, { "name" : "Time domain simulation", "level" : "intermediate" }, { "name" : "Frequency domain simulation", "level" : "intermediate" }, { "name" : "Lab measurement", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Mentoring" } ], "majorSkills" : "Signal Integrity, Power Integrity, High speed design, Interconnect technologies", "majorSkillsList" : [ "Signal Integrity", "Power Integrity", "High speed design", "Interconnect technologies" ], "coreResponsibilities" : "Drive high end high performance high speed product, Drive power designs for products, Handle Interconnect and signaling exploration, Handle development for future performance scaling, Engage in future performance scaling through sophisticated signaling, Engage in future performance scaling through package /, Engage in circuit power reduction, Engage in data encoding, Engage in channel equalization, Engage in new interconnect technologies, Handle traditional interface standardization efforts, Engage through JEDEC standards bodies, Engage through close customer / partner engagements, Improve modeling and methodology, Mentor junior team members, Share knowledge", "teamCollaboration" : "Multiple disciplines; Multiple organizations; Signal Integrity; Circuit Design; Chip Design; Packaging R&D; System Integration; Product Engineering", "domainKnowledge" : "HBM; GDDR; LPDDR; DDR5/DDR6; PCIeGen7; Sophisticated signaling; Interconnect technologies; Interface standardization", "domainList" : [ "hbm", "gddr", "lpddr", "ddr5-ddr6", "pciegen7", "sophisticated-signaling", "interconnect-technologies", "interface-standardization" ], "domainSpecificKnowledge" : [ "HBM", "GDDR", "LPDDR", "DDR5/DDR6", "PCIeGen7", "Sophisticated signaling", "Interconnect technologies", "Interface standardization" ], "toolProficiency" : [ "HFSS", "HSPICE", "SPECTRE", "ADS", "Oscilloscopes", "TDR", "Vector Network Analyzer" ], "communicationSkills" : "Convey vital details; Convey sophisticated issues; Convey solutions; Written formats; Verbal formats", "innovationCreativity" : "Innovative solutions", "problemSolvingSkills" : "Identify gaps; Identify opportunities", "qualificationsBasic" : "PhD w/5 years industry experience, MSEE w/10 years industry experience, Signal and Power Integrity Background, Mixed-signal Circuit Design Background, Hands on knowledge of 3D E. M. field solvers, Hands on knowledge of Matlab, Hands on knowledge of time and frequency domain simulation tools, Hands on knowledge of HFSS, Hands on knowledge of HSPICE, Hands on knowledge of SPECTRE, Hands on knowledge of ADS, Solid understanding of lab measurement equipment, Solid understanding of Oscilloscopes, Solid understanding of TDR, Solid understanding of Vector Network Analyzer (VNA)", "qualificationsPreferred" : "Pro-active, Transformational, Communicator", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Signal Integrity team, drives the high end high performance high speed product signaling and power designs for products like HBM, GDDR, LPDRAM, DDR5/DDR6, PCIeGen7 and sophisticated signaling development! We handle the Interconnect and signaling exploration and development to proactively engage in future performance scaling through sophisticated signaling techniques and package / channel improvement, including circuit power reduction, data encoding, channel equalization, new interconnect technologies, etc! Traditional interface standardization efforts through JEDEC and similar standards bodies and through close customer / partner engagements. Modeling and methodology improvement within the larger SI group and throughout Micron where applicable. Active mentoring of junior team members through informal one-on-one collaboration and through more formal department-level and corporate-level knowledge sharing opportunities. We are encouraged to engage across multiple disciplines and organizations (e.g., Signal Integrity, Circuit and Chip Design, Packaging R&D and System Integration and Product Engineering). **Minimum Qualifications:** · PhD w/5 years of industry experience or MSEE w/10 years of industry experience · Strong Signal and Power Integrity Background Strong Mixed-signal Circuit Design Background · Hands on knowledge of 3D E.M. field solvers, Matlab, time and frequency domain simulation tools like HFSS, HSPICE, SPECTRE, ADS, etc. · Solid understanding of lab measurement equipment such as Oscilloscopes, TDR, Vector Network Analyzer (VNA), etc. ## **Preferred Qualifications:** Successful candidates for this position will demonstrate: · Pro-active – identify gaps and opportunities and address them with minimal direction. · Transformational – think “outside-the-box” and yet offer innovative solutions within a set of practical constraints. · Communicator – clearly convey vital details of sophisticated issues and corresponding solutions in both written and verbal formats. The US base salary range that Micron Technology estimates it could pay for this full-time position is: $155,000.00 - $340,000.00 a year Additional compensation may include benefits, bonuses and equity. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target base pay for new hire salaries of the position across all US locations. Within the range, individual pay is determined by work location and additional job-related factors, including knowledge, skills, experience, tenure and relevant education or training. The pay scale is subject to change depending on business needs. Your recruiter can share more about the specific salary range for your preferred location during the hiring process. Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on _[micron.com/careers/benefits](https://www.micron.com/careers/benefits)_. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your _**[**right to work click here.**](http://www.justice.gov/crt/worker-information)**_ To learn more about Micron, please visit _[micron.com/careers](https://www.micron.com/careers)_ US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at _[hrsupport_na @micron.com](mailto:hrsupport_na@micron.com)_ or 1-800-336-8918 (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert**:** Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.", "summaryDescription" : "Signal Integrity Engineer - MTS at Signal Integrity Engineer. Skills: Signal Integrity, Power Integrity, High speed design, Interconnect technologies. Drive high end high performance high speed product. Drive power designs for products", "postedDate" : "2026-05-18T18:23:04.100", "createdAt" : "2026-06-04T18:23:04.012", "lastUpdated" : "2026-06-05T06:22:00.489", "ingestTimestamp" : "2026-06-04T18:23:04.012", "mongoId" : "6a216de574d8ee00a0c0c31e", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Front-Street---Office/Signal-Integrity-Engineer---MTS_JR100241", "salaryAnnualMin" : 155000, "salaryAnnualMax" : 340000, "salaryBand" : "150k-200k", "hasSalary" : true, "allSkills" : [ "Signal Integrity", "Power Integrity", "Mixed-signal Circuit Design", "Time domain simulation", "Frequency domain simulation", "Lab measurement", "Mentoring", "High speed design", "Interconnect technologies", "Interconnect exploration", "Signaling development", "Channel improvement", "Circuit power reduction", "Data encoding", "Channel equalization", "Interface standardization", "Customer engagement", "Partner engagement", "Methodology improvement", "HBM", "GDDR", "LPDDR", "DDR5/DDR6", "PCIeGen7", "Sophisticated signaling", "HFSS", "HSPICE", "SPECTRE", "ADS", "Oscilloscopes", "TDR", "Vector Network Analyzer" ], "skillCount" : 32, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 1.0, "_score" : 444.84525, "daysOld" : 17, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Semiconductor" }, { "id" : "6a194a6e58b93c861e461e58", "title" : "Signal Integrity Engineer", "company" : "Jabil", "location" : "Sanchong", "locations" : [ "Sanchong", "Taiwan" ], "timestamp" : "2026-05-29T12:01:29.725", "fingerprint" : "8fa76355d145e8c6d4cdb1cf0ed497c003d245d45af03c28e57892d293ccf4b4", "source" : "workday", "language" : "en", "applyUrl" : "https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Sanchong/Signal-Integrity-Engineer_J2451926-1", "externalId" : "J2451926", "locationPoint" : "30.79508,106.08473", "structuredLocations" : [ { "city" : "Sanchong", "workMode" : "onsite" } ], "locationText" : "Sanchong", "employmentType" : "FULL_TIME", "minimumEducation" : "Bachelors degree in Engineering", "experienceMinYears" : 7, "experienceMaxYears" : 10, "experienceLevel" : "Senior", "technicalSkills" : "CAD packages", "professionalSkills" : [ "Engineering", "Supply chain", "Manufacturing solutions", "Technical solutions", "Cross functional design", "Project timelines", "Manufacturing production", "Design/VAVE", "Design reviews", "Design verification", "Supply chain interaction", "Supplier interaction", "Transfer to manufacturing", "Technical customer discussions", "Project risks", "Mathematical concepts", "Probability", "Statistics", "Plane geometry", "Solid geometry", "Trigonometry", "Mathematical models" ], "hardSkillsList" : [ "Signal Integrity" ], "hardSkills" : [ { "name" : "Signal Integrity", "level" : "intermediate" } ], "majorSkills" : "Signal Integrity, Engineering, CAD packages", "majorSkillsList" : [ "Signal Integrity", "Engineering", "CAD packages" ], "coreResponsibilities" : "Meet Design Engineer III requirements, Represent Jabil Design Services, Provide technical input, Support development of processes, Provide complete design package, Participate in design/VAVE engineering, Provide onsite technical support, Stay abreast of technology", "teamCollaboration" : "Convey technical solutions to other engineers; Convey technical solutions to business personnel; Lead engineer involved in cross functional team; Drive cross functional project teams; Work with Project Managers; Work with Lead Design Engineer; Interaction with supply chain; Interaction with suppliers; Mentoring design engineers; Mentoring technicians; Mentoring ECAD designers", "projectManagementSkills" : [ "Solve technical problems", "Overcome project hurdles", "Manage project timelines", "Work with Project Managers", "Work with Lead Design Engineer", "Identify project risks", "Solve project risks", "Manage overall project plans", "Manage project schedules" ], "domainKnowledge" : "Signal Integrity; Competency specific technology; Industry specific technology", "domainList" : [ "signal-integrity", "competency-specific-technology", "industry-specific-technology" ], "domainSpecificKnowledge" : [ "Signal Integrity", "Competency specific technology", "Industry specific technology" ], "toolProficiency" : [ "CAD packages" ], "communicationSkills" : "Read business periodicals; Analyze business periodicals; Interpret professional journals; Interpret technical procedures; Interpret governmental regulations; Write reports; Write business correspondence; Write procedure manuals; Present information effectively; Respond to questions from managers; Respond to questions from clients; Respond to questions from customers; Respond to questions from general public", "documentationSkills" : "Write reports; Write business correspondence; Write procedure manuals; Requirements documentation; Design documentation; Databases; BOMs; Detailed proposals", "continuousLearning" : "Stay abreast of latest technology; Stay abreast of latest techniques", "innovationCreativity" : "Provide competitive designs; Provide cost effective designs", "problemSolvingSkills" : "Solve technical problems; Overcome project hurdles; Define problems; Collect data; Establish facts; Draw valid conclusions; Interpret technical instructions; Deal with abstract variables; Deal with concrete variables; Develop mathematical models; Solve mathematical models; Implement model results", "specialRequirements" : "Onsite technical support for manufacturing builds, Support engineering prototypes, Support NPI, Support production releases", "outcomesObjectives" : "Releasing a product into manufacturing; Minimize environmental impact; Foster vibrant communities; Foster diverse communities", "qualificationsBasic" : "Bachelors degree in Engineering, Minimum of 7-8 years of related experience, Minimum of 2 years experience as a Design Engineer III", "remoteFriendly" : false, "rawDescription" : "At Jabil (NYSE: JBL), we are proud to be a trusted partner for the world's top brands, offering comprehensive engineering, supply chain, and manufacturing solutions. With 60 years of experience across industries and a vast network of over 100 sites worldwide, Jabil combines global reach with local expertise to deliver both scalable and customized solutions. Our commitment extends beyond business success as we strive to build sustainable processes that minimize environmental impact and foster vibrant and diverse communities around the globe. **JOB SUMMARY** A Sr. Engineer will have a defined area of expertise either in a particular competency or industry. They will have mastered technology specific to their area of competence. Will be able to convey technical solutions to other engineers and to business personnel. Will have a good understanding of multiple CAD packages and cross functional design implications. Capable of being the lead engineer involved in a cross functional team. They will be able to drive cross functional project teams in solving technical problems and overcoming hurdles that may affect project timelines. Will have previous experience of releasing a product into a manufacturing production environment. **ESSENTIAL DUTIES AND RESPONSIBILITIES** · Meet the requirements of Design Engineer III · Would be considered a SME (Subject Matter Expert) in their field of competency. · Will represent Jabil Design Services in technical customer discussions / meetings. · Work with Project Managers and Lead Design Engineer in the quoting process · Provide technical input to help identify and solve project risks that may affect overall project plans and schedules. · Is expected to support the development and utilization of processes for design/VAVE. · At the appropriate process phase gates, provide a complete design package to be entered into our PDM system consisting of requirements and design documentation, databases, BOM’s, etc. /provide complete VAVE proposal to be submitted to the customer consisting of detailed proposals, models/simulations/schematics, BOM’s etc. · Participate in all elements of design/VAVE engineering including design reviews and design verification, supply chain & supplier interaction, transfer to design/manufacturing. · Mentoring design engineers I,II & III, technicians and ECAD designers · Provide onsite technical support for all manufacturing builds including engineering prototypes, NPI & production releases. · Stay abreast of the latest technology and techniques to provide designs that are competitive and cost effective. · May perform other duties and responsibilities as assigned. **JOB QUALIFICATIONS** **KNOWLEDGE REQUIREMENTS** LANGUAGE SKILLS Ability to read, analyze, and interpret general business periodicals, professional journals, technical procedures, or governmental regulations. Ability to write reports, business correspondence, and procedure manuals. Ability to effectively present information and respond to questions from groups of managers, clients, customers, and the general public. MATHEMATICAL SKILLS Ability to work with mathematical concepts such as probability and statistics, and fundamentals of plane and solid geometry and trigonometry. Ability to apply concepts such as fractions, percentages, ratios, and proportions to practical situations. REASONING ABILITY Ability to define problems, collect data, establish facts, and draw valid conclusions. Ability to interpret an extensive variety of technical instructions in mathematical or diagram form and deal with several abstract and concrete variables. Ability to develop mathematical models of physical reality and solve them, then implement the results. **EDUCATION & EXPERIENCE REQUIREMENTS** · Bachelors degree in Engineering from an accredited four-year college or university · Minimum of 7-8 years of related experience and/or training · Minimum of 2 years experience as a Design Engineer III · Specific requirements as defined by the market sector · Or an equivalent combination of education, training or experience. BE AWARE OF FRAUD: When applying for a job at Jabil you will be contacted via correspondence through our official job portal with a jabil.com e-mail address; direct phone call from a member of the Jabil team; or direct e-mail with a jabil.com e-mail address. Jabil does not request payments for interviews or at any other point during the hiring process. Jabil will not ask for your personal identifying information such as a social security number, birth certificate, financial institution, driver’s license number or passport information over the phone or via e-mail. If you believe you are a victim of identity theft, contact your local police department. Any scam job listings should be reported to whatever website it was posted in. **Jabil, including its subsidiaries, is an equal opportunity employer and considers qualified applicants for employment without regard to race, color, religion, national origin, sex, sexual orientation, gender identity, age, disability, genetic information, veteran status, or any other characteristic protected by law.** # **Accessibility Accommodation** If you are a qualified individual with a disability, you have the right to request a reasonable accommodation if you are unable or limited in your ability to use or access Jabil.com/Careers site as a result of your disability. You can request a reasonable accommodation by sending an e-mail to Always_Accessible@Jabil.com with the nature of your request and contact information. Please do not direct any other general employment related questions to this e-mail. Please note that only those inquiries concerning a request for reasonable accommodation will be responded to. #whereyoubelong", "summaryDescription" : "Signal Integrity Engineer at Jabil. Skills: Signal Integrity, Engineering, CAD packages. Meet Design Engineer III requirements. Represent Jabil Design Services", "postedDate" : "2026-05-29T12:00:53.589", "createdAt" : "2026-05-29T12:00:53.560", "lastUpdated" : "2026-05-29T12:01:29.725", "ingestTimestamp" : "2026-05-29T12:00:53.560", "mongoId" : "6a194a6e58b93c861e461e58", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Sanchong/Signal-Integrity-Engineer_J2451926-1", "hasSalary" : false, "allSkills" : [ "Signal Integrity", "Engineering", "CAD packages", "Supply chain", "Manufacturing solutions", "Technical solutions", "Cross functional design", "Project timelines", "Manufacturing production", "Design/VAVE", "Design reviews", "Design verification", "Supply chain interaction", "Supplier interaction", "Transfer to manufacturing", "Technical customer discussions", "Project risks", "Mathematical concepts", "Probability", "Statistics", "Plane geometry", "Solid geometry", "Trigonometry", "Mathematical models", "Solve technical problems", "Overcome project hurdles", "Manage project timelines", "Work with Project Managers", "Work with Lead Design Engineer", "Identify project risks", "Solve project risks", "Manage overall project plans", "Manage project schedules", "Competency specific technology", "Industry specific technology" ], "skillCount" : 35, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 0.8888889, "_score" : 443.20688, "daysOld" : 0, "hasLocation" : true, "hasGeo" : false }, { "id" : "69e7ec9f2beec4dd3d8329d8", "title" : "Signal Integrity Engineer", "company" : "KGS LLC", "industry" : "Hardware Development, alexa and amazon devices", "salary" : { "min" : 126300.0, "max" : 164800.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Northridge, California, USA", "locations" : [ "Northridge, California, USA" ], "timestamp" : "2026-06-14T23:58:56.807", "fingerprint" : "8c2bef0cffe1fd9625453e00100d2a6e365caf979e0f58eeeabcc92644b0e8fc", "source" : "amazon", "language" : "en", "applyUrl" : "https://account.amazon.com/jobs/10398453/apply", "externalId" : "8f6afb76-8078-44f1-8136-b4e180cf7af1", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Northridge", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "34.2345615,-118.5369316" } ], "locationText" : "Northridge, California, United States", "employmentType" : "FULL_TIME", "technicalSkills" : "SerDes, PCIe, Interlaken, JESD, DDR, Ethernet, MDI, Analog Power, Digital Design, Mixed-Signal ADC/DAC, RF, Processors, FPGA, MCU, SoC, Memory, Transceivers, Clock generation, Clock distribution", "professionalSkills" : [ "System integration", "Design reviews", "Hardware designs", "Satellite design", "Ground system design", "Circuit validation", "Board bring-up", "Cost trades", "Manufacturability" ], "hardSkillsList" : [ "Signal integrity analysis", "Power integrity analysis", "SI/PI simulation", "High-speed interfaces", "Electronic circuits analysis", "Test methodologies", "High-density board stack-ups", "Complex programs" ], "softSkillsList" : [ "Leadership" ], "hardSkills" : [ { "name" : "Signal integrity analysis", "level" : "intermediate" }, { "name" : "Power integrity analysis", "level" : "intermediate" }, { "name" : "SI/PI simulation", "level" : "intermediate" }, { "name" : "High-speed interfaces", "level" : "intermediate" }, { "name" : "Electronic circuits analysis", "level" : "intermediate" }, { "name" : "Test methodologies", "level" : "intermediate" }, { "name" : "High-density board stack-ups", "level" : "intermediate" }, { "name" : "Complex programs", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Leadership" } ], "majorSkills" : "Signal Integrity, Power Integrity, SI/PI simulation, High-speed interfaces", "majorSkillsList" : [ "Signal Integrity", "Power Integrity", "SI/PI simulation", "High-speed interfaces" ], "coreResponsibilities" : "Develop SI/PI collateral, Define SI/PI test methodologies, Develop SI/PI test methodologies, Participate in design reviews, Perform SI and PI simulations, Provide simulation reports, Collaborate with other engineers, Validate designs in the lab, Ensure high technical bar, Deliver analysis and design solutions, Focus on satellite design, Focus on ground system design, Perform simulation verification, Lead design simulation, Lead analysis, Lead high-speed circuit validation, Lead board bring-up, Lead test, Support fellow engineers, Prepare joint reports, Prepare joint proposals, Conduct trades, Conduct analyses, Meet customer goals, Prepare written reports", "teamCollaboration" : "Collaborating with other engineers; Work across teams; Support fellow engineers; Work with partner organizations; Lead small sub-teams", "domainKnowledge" : "Low Earth Orbit satellites; Satellite broadband services; High-density board stack-ups; High-speed interfaces", "domainList" : [ "low-earth-orbit-satellites", "satellite-broadband-services", "high-density-board-stack-ups", "high-speed-interfaces" ], "domainSpecificKnowledge" : [ "Low Earth Orbit satellites", "Satellite broadband services", "High-density board stack-ups", "High-speed interfaces" ], "toolProficiency" : [ "ANSYS", "ADS", "Hyperlynx", "Oscilloscopes", "Signal generators", "Vector network analyzers", "Power meters" ], "communicationSkills" : "Written reports; Technical proposals", "documentationSkills" : "Well-written documentation; Technical reports; Design reviews; Proposal efforts; Final test campaigns", "innovationCreativity" : "Innovative solutions", "problemSolvingSkills" : "Data and analysis; Cost trades; Trades and analyses", "specialRequirements" : "US Citizen, TS/SCI clearance", "outcomesObjectives" : "Meet customer's goals", "qualificationsBasic" : "3+ years of experience analyzing high-speed Signal and Power Integrity (SI/PI), Bachelor's degree in electrical engineering or equivalent, Experience with prototyping and implementation, US Citizen, Obtain and maintain a US Government security clearance of TS/SCI", "qualificationsPreferred" : "Master's degree in electrical engineering or equivalent", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. The mission of Amazon Leo’s Government (ALG) team is to leverage existing Amazon Leo technology and provide high speed, low latency, and secure satellite broadband services to the United States and our allied government customers. As a Signal Integrity (SI) and Power Integrity (PI) Engineer, you will be responsible for developing SI/PI collateral supporting system integration of advanced technology, defining and developing Signal and Power Integrity test methodologies, participating in design reviews, performing SI and PI simulations, providing reports, collaborating with other engineers, validating your designs in the lab, and working to ensure a high technical bar for hardware designs across Amazon Leo. The Signal Integrity Engineer will play a pivotal role in the team delivering innovative and fast-paced analysis and design solutions, focusing on satellite and ground system design and analysis as well as on the simulation verification of the various communication and control needs (compute, storage, data transfer, etc.) of the electronics sub-systems. They will be expected to lead a variety of tasks, from design simulation and analysis, high-speed circuit validation, to board bring-up and test. They will work across teams and support fellow engineers with design reviews and the preparation of joint reports and proposals. The candidate will have a sharp focus on the specific needs of the customer and be able to conduct trades and analyses to show that proposed solutions will meet the customer’s goals. The successful candidate will have demonstrated experience working on complex programs with a diverse set of talented individuals, as well as with partner organizations (including government agencies). The candidate will exhibit the potential to lead small sub-teams of electrical engineers, and be able to prepare easy-to-read and technically compelling written reports. This position requires that the candidate selected be a US Citizen and candidates must be able to obtain and maintain a US Government security clearance of TS/SCI. 10037 Key job responsibilities - Interact directly with customers to understand technical requirements, and translate them into technically robust solutions backed by data and analysis. - Experience in PCB level signal and power integrity analysis of complex high-density board stack-ups and transitions including via, blind-via, buried-via, and micro-via. - Experience in signal integrity design and simulation of high-speed interfaces such as SerDes (PCIe, Interlaken, JESD), DDR, Ethernet, and MDI. - Strong technical background and work experience simulating and analyzing electronic circuits including Analog Power, Digital Design, Mixed-Signal ADC/DAC, RF, Processors, FPGA, MCU, SoC, Memory, Transceivers, Clock generation and distribution. - Strong background in electronics test equipment including digital multi-meters, oscilloscopes, signal generators, vector network analyzers, power meters, etc. - Hands-on experience using EM SIPI simulation tools such as ANSYS, ADS, Hyperlynx, etc. - Facilitate cost trades on multiple parallel board configurations for cost/manufacturability vs performance. - Deliver well-written documentation, reports, and presentations for technical design reviews, part of proposal efforts, and final test campaigns. Basic Qualifications: - Experience with prototyping and implementation - Bachelor's degree in electrical engineering or equivalent - 3+ years of experience analyzing high-speed Signal and Power Integrity (SI/PI) Preferred Qualifications: - Master's degree in electrical engineering or equivalent Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits . USA, CA, NORTHRIDGE - 126,300.00 - 164,800.00 USD annually", "summaryDescription" : "Signal Integrity Engineer at KGS LLC. Skills: Signal Integrity, Power Integrity, SI/PI simulation, High-speed interfaces. Develop SI/PI collateral. Define SI/PI test methodologies", "postedDate" : "2026-04-21T00:00:00.000", "createdAt" : "2026-06-13T06:13:34.881", "lastUpdated" : "2026-06-14T23:58:56.807", "ingestTimestamp" : "2026-06-13T06:13:34.881", "mongoId" : "69e7ec9f2beec4dd3d8329d8", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/10398453/apply", "salaryAnnualMin" : 126300, "salaryAnnualMax" : 164800, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Signal integrity analysis", "Power integrity analysis", "SI/PI simulation", "High-speed interfaces", "Electronic circuits analysis", "Test methodologies", "High-density board stack-ups", "Complex programs", "Leadership", "Signal Integrity", "Power Integrity", "System integration", "Design reviews", "Hardware designs", "Satellite design", "Ground system design", "Circuit validation", "Board bring-up", "Cost trades", "Manufacturability", "Low Earth Orbit satellites", "Satellite broadband services", "ANSYS", "ADS", "Hyperlynx", "Oscilloscopes", "Signal generators", "Vector network analyzers", "Power meters" ], "skillCount" : 29, "jobCategory" : "other", "dataQualityScore" : 0.8888889, "_score" : 442.9368, "daysOld" : 54, "hasLocation" : true, "hasGeo" : true }, { "id" : "6a211e9c74d8ee00a0b35cbe", "title" : "Signal Integrity Engineer", "company" : "Jabil", "salary" : { "min" : 1100000.0, "max" : 1600000.0, "currency" : "TWD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market data for a Mid-level Signal Integrity Engineer in Sanchong, Taiwan, adjusted for the manufacturing industry and company size." }, "location" : "Sanchong", "locations" : [ "Sanchong", "Taiwan" ], "timestamp" : "2026-06-04T22:22:49.687", "fingerprint" : "3f26bd58033e3054fd766d14122042b004833882101f40c06e7d5e424e19f11f", "source" : "workday", "language" : "en", "applyUrl" : "https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Sanchong/Signal-Integrity-Engineer_J2452078", "externalId" : "J2452078", "locationPoint" : "30.79508,106.08473", "structuredLocations" : [ { "city" : "Sanchong", "country" : "Taiwan", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "25.0614860,121.4881020" } ], "locationText" : "Sanchong, Taiwan", "employmentType" : "FULL_TIME", "technicalSkills" : "Power supply Theory, Digital theory, Analog theory, RF Design", "professionalSkills" : [ "Component derating", "DFMEA" ], "hardSkillsList" : [ "Circuit design", "PCB layout designs", "Electronic Circuits analysis", "Functional circuit verification" ], "softSkillsList" : [ "Influence others", "Share best practices" ], "hardSkills" : [ { "name" : "Circuit design", "level" : "intermediate" }, { "name" : "PCB layout designs", "level" : "intermediate" }, { "name" : "Electronic Circuits analysis", "level" : "intermediate" }, { "name" : "Functional circuit verification", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Influence others" }, { "name" : "Share best practices" } ], "majorSkills" : "Embedded hardware design, PCB layout designs, Circuit design", "majorSkillsList" : [ "Embedded hardware design", "PCB layout designs", "Circuit design" ], "coreResponsibilities" : "Develop engineering design, Gather design requirements, Recommend steps to implement, Modify existing product, Perform circuit design, Analyze circuit design, Develop subsystem architecture, Gather hardware solutions information, Recommend design improvements, Develop embedded hardware design, Develop PCB layout designs, Evaluate design requirements, Evaluate electronic components, Select electronic components, Analyze electronic circuits, Improve circuit design, Update circuit design, Assemble prototypes, Perform design first powerup, Perform design debug, Perform functional circuit verification, Manage external component suppliers, Manage external component manufacturers", "teamCollaboration" : "Global team", "domainKnowledge" : "Industry standards; Sector standards; Regulatory standards; Safety standards", "domainList" : [ "industry-standards", "sector-standards", "regulatory-standards", "safety-standards" ], "domainSpecificKnowledge" : [ "Industry standards", "Sector standards", "Regulatory standards", "Safety standards" ], "toolProficiency" : [ "Oscilloscopes", "Multi-meters", "Simulation tools" ], "communicationSkills" : "Effective communication", "problemSolvingSkills" : "Root cause analysis", "qualificationsBasic" : "Electrical Engineering Degree, 3+ years experience in embedded hardware design", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At Jabil (NYSE: JBL), we are proud to be a trusted partner for the world's top brands, offering comprehensive engineering, supply chain, and manufacturing solutions. With 60 years of experience across industries and a vast network of over 100 sites worldwide, Jabil combines global reach with local expertise to deliver both scalable and customized solutions. Our commitment extends beyond business success as we strive to build sustainable processes that minimize environmental impact and foster vibrant and diverse communities around the globe. **JOB SUMMARY** Under the guidance of management, develops new engineering design of a basic to moderate complexity. Gathers design requirements and recommends steps to implement basic to moderate reference design. implementation or design modifications of existing product. Perform and analyze basic to moderate circuit design, referring more complex issues to management or more senior team members. Develop subsystem architecture at the direction of a Sr. Engineer or above. **ESSENTIAL DUTIES AND RESPONSIBILITIES** * Gathers information relating to hardware solutions and recommends basic improvements to designs that improve components or design quality/reliability. * Develop with supervision embedded hardware design and PCB layout designs utilizing standard tools * Evaluates with system architects to review and clarify design requirements and architecture. * Evaluates/selects electronic components * Analyzes Electronic Circuits with moderate complexity and can improve or update the design. * Under the guidance of more senior team members, assembles prototypes, design first powerup, design debug and functional circuit verification. * Works with and manages external component suppliers/manufacturers * May perform other duties and responsibilities as assigned. **JOB QUALIFICATIONS** **KNOWLEDGE REQUIREMENTS** _TECHNICAL KNOWLEDGE & SKILLS_ * Working knowledge of Industry or specific sector, regulatory and safety standards. * Developed multiple projects that have utilized one of more of Electrical Engineering Design specializations or competencies: Power supply Theory, Digital theory, Analog theory, RF Design, etc. * Knowledge of key development tools and design standards: Component derating, DFMEA, oscilloscopes, multi-meters, simulation tools, etc. _NON-TECHNICAL KNOWLEDGE & SKILLS_ * Influence others and share best practices. * Effectively communicate with good understanding of English. * Work as part of a global team. **EDUCATION & EXPERIENCE REQUIREMENTS** * Electrical Engineering Degree (BSEE/MSEE or equivalent experience) * 3+ years experience in embedded hardware design or other key competency * Or an equivalent combination of education, training or experience. BE AWARE OF FRAUD: When applying for a job at Jabil you will be contacted via correspondence through our official job portal with a jabil.com e-mail address; direct phone call from a member of the Jabil team; or direct e-mail with a jabil.com e-mail address. Jabil does not request payments for interviews or at any other point during the hiring process. Jabil will not ask for your personal identifying information such as a social security number, birth certificate, financial institution, driver’s license number or passport information over the phone or via e-mail. If you believe you are a victim of identity theft, contact your local police department. Any scam job listings should be reported to whatever website it was posted in. **Jabil, including its subsidiaries, is an equal opportunity employer and considers qualified applicants for employment without regard to race, color, religion, national origin, sex, sexual orientation, gender identity, age, disability, genetic information, veteran status, or any other characteristic protected by law.** # **Accessibility Accommodation** If you are a qualified individual with a disability, you have the right to request a reasonable accommodation if you are unable or limited in your ability to use or access Jabil.com/Careers site as a result of your disability. You can request a reasonable accommodation by sending an e-mail to Always_Accessible@Jabil.com with the nature of your request and contact information. Please do not direct any other general employment related questions to this e-mail. Please note that only those inquiries concerning a request for reasonable accommodation will be responded to. #whereyoubelong", "summaryDescription" : "Signal Integrity Engineer at Jabil. Skills: Embedded hardware design, PCB layout designs, Circuit design. Develop engineering design. Gather design requirements", "postedDate" : "2026-06-04T11:58:16.677", "createdAt" : "2026-06-04T11:58:16.217", "lastUpdated" : "2026-06-04T22:22:49.687", "ingestTimestamp" : "2026-06-04T11:58:16.217", "mongoId" : "6a211e9c74d8ee00a0b35cbe", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Sanchong/Signal-Integrity-Engineer_J2452078", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Circuit design", "PCB layout designs", "Electronic Circuits analysis", "Functional circuit verification", "Influence others", "Share best practices", "Embedded hardware design", "Component derating", "DFMEA", "Industry standards", "Sector standards", "Regulatory standards", "Safety standards", "Oscilloscopes", "Multi-meters", "Simulation tools" ], "skillCount" : 16, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 0.8888889, "_score" : 441.8259, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true }, { "id" : "6a211e9c74d8ee00a0b35cbf", "title" : "Signal Integrity Engineer", "company" : "Jabil", "salary" : { "min" : 1050000.0, "max" : 1650000.0, "currency" : "TWD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market data for a Mid-level Signal Integrity Engineer in Sanchong, Taiwan, adjusted for the manufacturing industry and company size." }, "location" : "Sanchong", "locations" : [ "Sanchong", "Taiwan" ], "timestamp" : "2026-06-05T00:59:32.855", "fingerprint" : "165b7a128882ee67d34cde3c428e95461a27ebfed887092bee309455200148f7", "source" : "workday", "language" : "en", "applyUrl" : "https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Sanchong/Signal-Integrity-Engineer_J2452080", "externalId" : "J2452080", "locationPoint" : "30.79508,106.08473", "structuredLocations" : [ { "city" : "Sanchong", "country" : "Taiwan", "continent" : "as", "source" : "llm", "workMode" : "onsite", "geo" : "25.0614860,121.4881020" } ], "locationText" : "Sanchong, Taiwan", "employmentType" : "FULL_TIME", "technicalSkills" : "Power supply Theory, Digital theory, Analog theory, RF Design", "professionalSkills" : [ "Component derating", "DFMEA" ], "hardSkillsList" : [ "Circuit design", "PCB layout designs", "Electronic Circuits analysis", "Functional circuit verification" ], "softSkillsList" : [ "Influence others", "Share best practices" ], "hardSkills" : [ { "name" : "Circuit design", "level" : "intermediate" }, { "name" : "PCB layout designs", "level" : "intermediate" }, { "name" : "Electronic Circuits analysis", "level" : "intermediate" }, { "name" : "Functional circuit verification", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Influence others" }, { "name" : "Share best practices" } ], "majorSkills" : "Embedded hardware design, PCB layout designs, Circuit design", "majorSkillsList" : [ "Embedded hardware design", "PCB layout designs", "Circuit design" ], "coreResponsibilities" : "Develop engineering design, Gather design requirements, Recommend steps to implement reference design, Perform circuit design, Analyze circuit design, Develop subsystem architecture, Gather information relating to hardware solutions, Recommend improvements to designs, Develop embedded hardware design, Develop PCB layout designs, Evaluate design requirements, Evaluate electronic components, Select electronic components, Improve or update design, Assemble prototypes, Perform design first powerup, Perform design debug, Perform functional circuit verification, Manage external component suppliers, Manage external component manufacturers", "teamCollaboration" : "Global team; System architects", "domainKnowledge" : "Industry standards; Sector standards; Regulatory standards; Safety standards", "domainList" : [ "industry-standards", "sector-standards", "regulatory-standards", "safety-standards" ], "domainSpecificKnowledge" : [ "Industry standards", "Sector standards", "Regulatory standards", "Safety standards" ], "toolProficiency" : [ "Oscilloscopes", "Multi-meters", "Simulation tools" ], "communicationSkills" : "Effectively communicate", "problemSolvingSkills" : "Root cause analysis", "qualificationsBasic" : "Electrical Engineering Degree, 3+ years experience in embedded hardware design, Equivalent combination of education, training or experience", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "At Jabil (NYSE: JBL), we are proud to be a trusted partner for the world's top brands, offering comprehensive engineering, supply chain, and manufacturing solutions. With 60 years of experience across industries and a vast network of over 100 sites worldwide, Jabil combines global reach with local expertise to deliver both scalable and customized solutions. Our commitment extends beyond business success as we strive to build sustainable processes that minimize environmental impact and foster vibrant and diverse communities around the globe. **JOB SUMMARY** Under the guidance of management, develops new engineering design of a basic to moderate complexity. Gathers design requirements and recommends steps to implement basic to moderate reference design. implementation or design modifications of existing product. Perform and analyze basic to moderate circuit design, referring more complex issues to management or more senior team members. Develop subsystem architecture at the direction of a Sr. Engineer or above. **ESSENTIAL DUTIES AND RESPONSIBILITIES** * Gathers information relating to hardware solutions and recommends basic improvements to designs that improve components or design quality/reliability. * Develop with supervision embedded hardware design and PCB layout designs utilizing standard tools * Evaluates with system architects to review and clarify design requirements and architecture. * Evaluates/selects electronic components * Analyzes Electronic Circuits with moderate complexity and can improve or update the design. * Under the guidance of more senior team members, assembles prototypes, design first powerup, design debug and functional circuit verification. * Works with and manages external component suppliers/manufacturers * May perform other duties and responsibilities as assigned. **JOB QUALIFICATIONS** **KNOWLEDGE REQUIREMENTS** _TECHNICAL KNOWLEDGE & SKILLS_ * Working knowledge of Industry or specific sector, regulatory and safety standards. * Developed multiple projects that have utilized one of more of Electrical Engineering Design specializations or competencies: Power supply Theory, Digital theory, Analog theory, RF Design, etc. * Knowledge of key development tools and design standards: Component derating, DFMEA, oscilloscopes, multi-meters, simulation tools, etc. _NON-TECHNICAL KNOWLEDGE & SKILLS_ * Influence others and share best practices. * Effectively communicate with good understanding of English. * Work as part of a global team. **EDUCATION & EXPERIENCE REQUIREMENTS** * Electrical Engineering Degree (BSEE/MSEE or equivalent experience) * 3+ years experience in embedded hardware design or other key competency * Or an equivalent combination of education, training or experience. BE AWARE OF FRAUD: When applying for a job at Jabil you will be contacted via correspondence through our official job portal with a jabil.com e-mail address; direct phone call from a member of the Jabil team; or direct e-mail with a jabil.com e-mail address. Jabil does not request payments for interviews or at any other point during the hiring process. Jabil will not ask for your personal identifying information such as a social security number, birth certificate, financial institution, driver’s license number or passport information over the phone or via e-mail. If you believe you are a victim of identity theft, contact your local police department. Any scam job listings should be reported to whatever website it was posted in. **Jabil, including its subsidiaries, is an equal opportunity employer and considers qualified applicants for employment without regard to race, color, religion, national origin, sex, sexual orientation, gender identity, age, disability, genetic information, veteran status, or any other characteristic protected by law.** # **Accessibility Accommodation** If you are a qualified individual with a disability, you have the right to request a reasonable accommodation if you are unable or limited in your ability to use or access Jabil.com/Careers site as a result of your disability. You can request a reasonable accommodation by sending an e-mail to Always_Accessible@Jabil.com with the nature of your request and contact information. Please do not direct any other general employment related questions to this e-mail. Please note that only those inquiries concerning a request for reasonable accommodation will be responded to. #whereyoubelong", "summaryDescription" : "Signal Integrity Engineer at Jabil. Skills: Embedded hardware design, PCB layout designs, Circuit design. Develop engineering design. Gather design requirements", "postedDate" : "2026-06-04T10:42:52.537", "createdAt" : "2026-06-04T10:42:52.493", "lastUpdated" : "2026-06-05T00:59:32.855", "ingestTimestamp" : "2026-06-04T10:42:52.493", "mongoId" : "6a211e9c74d8ee00a0b35cbf", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Sanchong/Signal-Integrity-Engineer_J2452080", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Circuit design", "PCB layout designs", "Electronic Circuits analysis", "Functional circuit verification", "Influence others", "Share best practices", "Embedded hardware design", "Component derating", "DFMEA", "Industry standards", "Sector standards", "Regulatory standards", "Safety standards", "Oscilloscopes", "Multi-meters", "Simulation tools" ], "skillCount" : 16, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 0.8888889, "_score" : 441.58, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true }, { "id" : "6a2107d474d8ee00a0ae1b3c", "title" : "Senior Signal Integrity / Power Integrity (SI/PI) Engineer", "company" : "Arista Networks", "industry" : "Computer Networking", "salary" : { "min" : 300000.0, "max" : 655000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Santa Clara, CA, United States", "locations" : [ "Santa Clara", "CA", "United States" ], "timestamp" : "2026-06-04T12:42:34.625", "fingerprint" : "8cc49f41a981a5a94fa347182200b4c0de487d4d8a11af78c0d4bc259025c641", "source" : "smartrecruiters", "language" : "en", "applyUrl" : "https://jobs.smartrecruiters.com/AristaNetworks/744000130066813-senior-signal-integrity-power-integrity-si-pi-engineer", "externalId" : "744000130066813", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Santa Clara", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.2333253,-121.6846349" } ], "locationText" : "Santa Clara, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "mid", "technicalSkills" : "SerDes, PAM4, Ethernet, Optical networking, Ansys HFSS, SiWave, Cadence Sigrity, S-parameter, Time-domain measurements, VNA, TDR, BERT, Keysight ADS, Cadence SystemSI, PCIe, CXL, PCB materials, NRZ", "professionalSkills" : [ "Signal integrity", "Power integrity", "High-speed digital design", "Channel modeling", "Link-level analysis", "Breakout strategies", "Routing strategies", "Interconnect topologies", "Board bring-up", "Production debug" ], "hardSkillsList" : [ "3D design", "Simulation", "Test vehicle development", "Characterization", "S-parameter analysis", "Time-domain measurements", "Link-level analysis", "Stack-up optimization", "Breakout optimization", "Routing optimization", "Low-loss interconnect design", "Board bring-up", "Production debug", "Root-cause analysis" ], "softSkillsList" : [ "Communication" ], "hardSkills" : [ { "name" : "3D design", "level" : "intermediate" }, { "name" : "Simulation", "level" : "intermediate" }, { "name" : "Test vehicle development", "level" : "intermediate" }, { "name" : "Characterization", "level" : "intermediate" }, { "name" : "S-parameter analysis", "level" : "intermediate" }, { "name" : "Time-domain measurements", "level" : "intermediate" }, { "name" : "Link-level analysis", "level" : "intermediate" }, { "name" : "Stack-up optimization", "level" : "intermediate" }, { "name" : "Breakout optimization", "level" : "intermediate" }, { "name" : "Routing optimization", "level" : "intermediate" }, { "name" : "Low-loss interconnect design", "level" : "intermediate" }, { "name" : "Board bring-up", "level" : "intermediate" }, { "name" : "Production debug", "level" : "intermediate" }, { "name" : "Root-cause analysis", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Communication" } ], "majorSkills" : "Signal Integrity, Power Integrity, SerDes technologies, High-speed design", "majorSkillsList" : [ "Signal Integrity", "Power Integrity", "SerDes technologies", "High-speed design" ], "coreResponsibilities" : "Perform 3D design of high-speed interconnects, Perform simulation of high-speed interconnects, Develop test vehicles, Validate test vehicles, Characterize PCB materials, Characterize packages, Characterize interconnects, Conduct S-parameter measurements, Conduct time-domain measurements, Extract channel performance, Validate modeling correlation, Perform link-level analysis, Collaborate with hardware teams, Collaborate with mechanical teams, Collaborate with packaging teams, Optimize stack-up strategies, Optimize breakout strategies, Optimize routing strategies, Research novel materials, Prototype novel materials, Research backplane concepts, Prototype backplane concepts, Research interconnect topologies, Prototype interconnect topologies, Support bring-up of production boards, Support debug of production boards, Root-cause SI/PI issues", "teamCollaboration" : "Hardware teams; Mechanical teams; Packaging teams; Fabrication vendors; ASIC teams; Contract manufacturers", "domainKnowledge" : "Electromagnetics; Signal integrity; High-speed digital design; SerDes technologies; Ethernet standards; PCIe standards; CXL standards; PAM4; NRZ; Power integrity; Co-simulation techniques; Co-packaged optics; Chiplet-based architectures; Substrate technologies; EMIC considerations; Signal isolation; Power isolation; Photonic-electronic systems; Thermal effects; Mechanical effects; Long-term reliability", "domainList" : [ "electromagnetics", "signal-integrity", "high-speed-digital-design", "serdes-technologies", "ethernet-standards", "pcie-standards", "cxl-standards", "pam4", "nrz", "power-integrity", "co-simulation-techniques", "co-packaged-optics", "chiplet-based-architectures", "substrate-technologies", "emic-considerations", "signal-isolation", "power-isolation", "photonic-electronic-systems", "thermal-effects", "mechanical-effects", "long-term-reliability" ], "domainSpecificKnowledge" : [ "Electromagnetics", "Signal integrity", "High-speed digital design", "SerDes technologies", "Ethernet standards", "PCIe standards", "CXL standards", "PAM4", "NRZ", "Power integrity", "Co-simulation techniques", "Co-packaged optics", "Chiplet-based architectures", "Substrate technologies", "EMIC considerations", "Signal isolation", "Power isolation", "Photonic-electronic systems", "Thermal effects", "Mechanical effects", "Long-term reliability" ], "toolProficiency" : [ "Ansys HFSS", "SiWave", "Cadence Sigrity", "Keysight ADS", "Cadence SystemSI", "Oscilloscopes", "VNAs", "TDRs", "BERTs", "Ethernet compliance tools" ], "innovationCreativity" : "Relentless pursuit of innovation; Latest advancements in cloud computing; Latest advancements in artificial intelligence; Latest advancements in software-defined networking; Anticipate and adapt to future challenges; Novel materials; Backplane concepts; Low-loss interconnect topologies", "problemSolvingSkills" : "Root-cause SI/PI issues", "qualificationsBasic" : "BS/MS/PhD in Electrical Engineering, Focus on electromagnetics, Focus on signal integrity, Focus on high-speed digital design, Solid understanding of signal integrity theory, Solid understanding of S-parameter analysis, Solid understanding of channel modeling, Hands-on experience with 2.5D/3D solvers, Lab skills using oscilloscopes, Lab skills using VNAs, Lab skills using TDRs, Lab skills using BERTs, Lab skills using Ethernet compliance tools, Familiarity with advanced PCB materials, Familiarity with manufacturing constraints, Experience analyzing 56G/112G/224G PAM4, Experience analyzing NRZ serial links, Experience simulating 56G/112G/224G PAM4, Experience simulating NRZ serial links", "qualificationsPreferred" : "Knowledge of power integrity, Knowledge of co-simulation techniques, Experience with co-packaged optics, Experience with chiplet-based architectures, Experience with advanced substrate technologies, Familiarity with EMIC considerations, Familiarity with signal/power isolation, Understanding of thermal effects, Understanding of mechanical effects, Experience working with fabrication vendors, Experience working with ASIC teams, Experience working with contract manufacturers", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges. At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation. Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do. Who You'll Work With Arista’s cutting-edge Ethernet and optical networking platforms are built to push the limits of performance, density, and power efficiency. This wouldn’t be possible without our Signal Integrity (SI) and Power Integrity (PI) engineers who design, simulate, and characterize interconnects enabling the fastest SerDes technologies in the industry. We’re looking for a Senior Signal Integrity / Power Integrity Hardware Engineer to join our Hardware Design team at our headquarters in Santa Clara, CA. In this role, you’ll work at the intersection of advanced simulation, next-generation SerDes (112G/224G/448G PAM4), and innovative routing, packaging, and power delivery techniques. Your work will directly influence the architecture and layout of Arista’s next-generation Ethernet and optical systems for hyperscale, AI, and cloud networking. The total estimated annual compensation range for this position, inclusive of base salary, bonus, and equity, is $300,000 to $655,000. This range is a good faith estimate only. Bonus and equity are discretionary, subject to plan terms, and are not guaranteed components of total compensation. Actual total annual compensation may vary based on employee performance, company or equity performance, company policy, board approval, or similar factors. Please see additional base salary information below. What You'll Do * Perform 3D EM design and simulation of high-speed interconnects (channels, vias, packages, and connectors) for 112G/224G PAM4 SerDes using tools such as Ansys HFSS, SiWave, and Cadence Sigrity. * Develop and validate test vehicles to characterize next-generation PCB materials, packages, and interconnects. * Conduct S-parameter and time-domain measurements (VNA, TDR, BERT) to extract channel performance and validate modeling correlation. * Perform link-level analysis for advanced standards (Ethernet 800G/1.6T, PCIe Gen6/Gen7, CXL) using tools such as Keysight ADS or Cadence SystemSI. * Collaborate closely with hardware, mechanical, and packaging teams to optimize stack- up, breakout, and routing strategies for high-density designs. * Research and prototype novel materials, backplane concepts, and low-loss interconnect topologies to meet next-generation performance targets. * Support bring-up and debug of production boards, working cross-functionally to root-cause SI/PI issues. ## Qualifications * BS/MS/PhD in Electrical Engineering, Physics, or related field with a focus on electromagnetics, signal integrity, or high-speed digital design. * Solid understanding of signal integrity theory, S-parameter analysis, and channel modeling. * Hands-on experience with 2.5D/3D EM solvers (Ansys HFSS, SiWave, Sigrity, CST). * Strong lab skills using oscilloscopes, VNAs, TDRs, BERTs, and Ethernet compliance tools. * Familiarity with advanced PCB materials (e.g., Megtron 7, Tachyon 100G, SLP) and manufacturing constraints for high-speed design. * Experience analyzing and simulating 56G/112G/224G PAM4 and NRZ serial links. * Knowledge of power integrity and co-simulation techniques is a plus. * Excellent communication and collaboration skills. Preferred Qualifications * Experience with co-packaged optics, chiplet-based architectures, or advanced substrate technologies. * Familiarity with EMI/EMC considerations and signal/power isolation in densely integrated photonic-electronic systems. * Understanding of thermal and mechanical effects on SI/PI performance and long-term reliability. * Experience working with fabrication vendors, ASIC teams, and contract manufacturers to ensure end-to-end channel integrity. Base Salary Information: The new hire base pay for this role has a pay range of $180,000 to $275,000. Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. The salary range provided reflects base pay only. As described above, this position may also be eligible for discretionary Arista bonuses and equity. US- based employees are also entitled to benefits including medical, dental, vision, wellbeing, tax savings and income protection. The recruiting team can share more details during the hiring process specific to the role and location. #LI-AC1 ## Additional Information Arista Networks is an equal opportunity employer. Arista makes all hiring and employment-related decisions in a non-discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law. All your information will be kept confidential according to EEO guidelines.", "summaryDescription" : "Senior Signal Integrity / Power Integrity (SI/PI) Engineer at Arista Networks. Skills: Signal Integrity, Power Integrity, SerDes technologies, High-speed design. Perform 3D design of high-speed interconnects. Perform simulation of high-speed interconnects", "postedDate" : "2026-06-03T18:13:13.000", "createdAt" : "2026-06-04T07:46:15.897", "lastUpdated" : "2026-06-04T12:42:34.625", "ingestTimestamp" : "2026-06-04T07:46:15.897", "mongoId" : "6a2107d474d8ee00a0ae1b3c", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 300000, "salaryAnnualMax" : 655000, "salaryBand" : "200k+", "hasSalary" : true, "allSkills" : [ "3D design", "Simulation", "Test vehicle development", "Characterization", "S-parameter analysis", "Time-domain measurements", "Link-level analysis", "Stack-up optimization", "Breakout optimization", "Routing optimization", "Low-loss interconnect design", "Board bring-up", "Production debug", "Root-cause analysis", "Communication", "Signal Integrity", "Power Integrity", "SerDes technologies", "High-speed design", "Signal integrity", "Power integrity", "High-speed digital design", "Channel modeling", "Breakout strategies", "Routing strategies", "Interconnect topologies", "Electromagnetics", "Ethernet standards", "PCIe standards", "CXL standards", "PAM4", "NRZ", "Co-simulation techniques", "Co-packaged optics", "Chiplet-based architectures", "Substrate technologies", "EMIC considerations", "Signal isolation", "Power isolation", "Photonic-electronic systems", "Thermal effects", "Mechanical effects", "Long-term reliability", "Ansys HFSS", "SiWave", "Cadence Sigrity", "Keysight ADS", "Cadence SystemSI", "Oscilloscopes", "VNAs", "TDRs", "BERTs", "Ethernet compliance tools" ], "skillCount" : 53, "jobCategory" : "engineering", "jobSubcategory" : "Hardware Engineering", "dataQualityScore" : 1.0, "_score" : 439.75223, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Networking" }, { "id" : "69dde4492beec4dd3d9a3353", "title" : "Signal Timing Engineer (Transportation Engineer) III, IV, or V: Traffic Signal Crew (Austin District)", "company" : "TxDOT", "industry" : "Government", "salary" : { "min" : 76530.0, "max" : 156612.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "UST-Texas-Austin-Austin District Headquarters", "locations" : [ "UST-Texas-Austin-Austin District Headquarters", "Yearly", "Exempt,
Austin District Headquarters (14DISTHQ)
7901 NORTH IH 35
Austin, 78753

, Austin District Headquarters" ], "timestamp" : "2026-06-15T10:43:51.741", "fingerprint" : "35b5f4dd6c1c2ef95cb687c7b816ca371b8d714fa71117e67e04d74e472f364f", "source" : "taleo", "language" : "en", "applyUrl" : "https://fa009.taleo.net/careersection/ex/jobdetail.ftl?job=43140", "externalId" : "43140", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Austin", "state" : "Texas", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "30.2711286,-97.7436995" } ], "locationText" : "Austin, Texas, United States", "employmentType" : "FULL_TIME", "professionalSkills" : [ "Project development", "Transportation operations", "Traffic operations" ], "hardSkillsList" : [ "Signal timing", "Transportation engineering" ], "hardSkills" : [ { "name" : "Signal timing", "level" : "intermediate" }, { "name" : "Transportation engineering", "level" : "intermediate" } ], "majorSkills" : "Signal timing, Traffic operations", "majorSkillsList" : [ "Signal timing", "Traffic operations" ], "coreResponsibilities" : "Perform advanced transportation engineering work, Ensure compliance with laws, Establish work plan and priorities, Handle issues at occurrence", "teamCollaboration" : "Governmental officials; Private entities", "domainKnowledge" : "Traffic signal operations", "domainList" : [ "traffic-signal-operations" ], "domainSpecificKnowledge" : [ "Traffic signal operations" ], "qualificationsBasic" : "Advanced transportation engineering work, Compliance with federal and state laws, Contact with governmental officials, Contact with private entities", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "All Roads Lead to TxDOT! TxDOT's Austin District is looking for a Signal Timing Engineer III, IV, or V for the Traffic Signal Crew based at our Austin District Headquarters . This position performs advanced and complex transportation engineering work in one or more functional areas such as planning, project development and design, construction, transportation and traffic operations, or maintenance. Ensures compliance with applicable federal and state laws, policies, procedures, standards and guidelines. Work requires contact with governmental officials and private entities. Employees at this level establish their own work plan and priorities to meet set objectives. Issues are rarely referred to the supervisor but are handled at the occurrence. This position is for ONE Signal Timing Engineer III, IV, or V. The Texas Department of Transportation reserves the sole right in determining the level of position based on the applicant's work experience, skill level, and all other appropriate factors, and based on business needs. Salary Plan/Grade: Signal Timing Engineer III: B26:($76,530 - $129,430/yearly) Signal Timing Engineer IV: B27:($84,182 - $142,374/yearly) Signal Timing Engineer V: B28:($92,600- $156,612/yearly) 76,530.00 156,612.00", "summaryDescription" : "Signal Timing Engineer (Transportation Engineer) III, IV, or V: Traffic Signal Crew (Austin District) at TxDOT. Skills: Signal timing, Traffic operations. Perform advanced transportation engineering work. Ensure compliance with laws", "createdAt" : "2026-06-14T07:23:29.092", "lastUpdated" : "2026-06-15T10:43:51.741", "ingestTimestamp" : "2026-06-14T07:23:29.092", "mongoId" : "69dde4492beec4dd3d9a3353", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 76530, "salaryAnnualMax" : 156612, "salaryBand" : "75k-100k", "hasSalary" : true, "allSkills" : [ "Signal timing", "Transportation engineering", "Traffic operations", "Project development", "Transportation operations", "Traffic signal operations" ], "skillCount" : 6, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.7777778, "_score" : 439.0858, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Government", "llmIndustryConfidence" : 0.95 }, { "id" : "6a21120e74d8ee00a0b09b93", "title" : "Senior Signal Integrity / Power Integrity (SI/PI) Engineer", "company" : "Arista Networks", "industry" : "Computer Networking", "salary" : { "min" : 300000.0, "max" : 655000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "Santa Clara, CA, United States", "locations" : [ "Santa Clara", "CA", "United States" ], "timestamp" : "2026-06-04T20:10:13.253", "fingerprint" : "1dc6d7dc5e110d90c07ca195dd83694b9d780e258c41b3c05832ec1466f14fcd", "source" : "smartrecruiters", "language" : "en", "applyUrl" : "https://jobs.smartrecruiters.com/AristaNetworks/744000130066813-senior-signal-integrity-power-integrity-si-pi-engineer", "externalId" : "744000130066813", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Santa Clara", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.2333253,-121.6846349" } ], "locationText" : "Santa Clara, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 5, "experienceMaxYears" : 10, "experienceLevel" : "mid", "technicalSkills" : "SerDes, PAM4, Ethernet, Optical networking, Ansys HFSS, Ansys SiWave, Cadence Sigrity, S-parameter, Time-domain measurements, VNA, TDR, BERT, Keysight ADS, Cadence SystemSI, PCB materials, NRZ, PCIe, CXL, EMIC", "professionalSkills" : [ "High-speed digital design", "Link-level analysis", "Channel performance", "Modeling correlation", "Breakout strategies", "Routing strategies", "Low-loss interconnect topologies", "Performance targets", "Production boards", "SI/PI issues" ], "hardSkillsList" : [ "3D design", "Simulation", "Test vehicle development", "Characterization", "S-parameter analysis", "Time-domain measurements", "Link-level analysis", "Stack-up optimization", "Breakout optimization", "Routing optimization", "Material prototyping", "Backplane prototyping", "Interconnect prototyping", "Board bring-up", "Production debug" ], "softSkillsList" : [ "Communication" ], "hardSkills" : [ { "name" : "3D design", "level" : "intermediate" }, { "name" : "Simulation", "level" : "intermediate" }, { "name" : "Test vehicle development", "level" : "intermediate" }, { "name" : "Characterization", "level" : "intermediate" }, { "name" : "S-parameter analysis", "level" : "intermediate" }, { "name" : "Time-domain measurements", "level" : "intermediate" }, { "name" : "Link-level analysis", "level" : "intermediate" }, { "name" : "Stack-up optimization", "level" : "intermediate" }, { "name" : "Breakout optimization", "level" : "intermediate" }, { "name" : "Routing optimization", "level" : "intermediate" }, { "name" : "Material prototyping", "level" : "intermediate" }, { "name" : "Backplane prototyping", "level" : "intermediate" }, { "name" : "Interconnect prototyping", "level" : "intermediate" }, { "name" : "Board bring-up", "level" : "intermediate" }, { "name" : "Production debug", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Communication" } ], "majorSkills" : "Signal Integrity, Power Integrity, SerDes technologies, High-speed interconnects", "majorSkillsList" : [ "Signal Integrity", "Power Integrity", "SerDes technologies", "High-speed interconnects" ], "coreResponsibilities" : "Perform 3D design of high-speed interconnects, Perform simulation of high-speed interconnects, Develop test vehicles, Validate test vehicles, Characterize PCB materials, Characterize packages, Characterize interconnects, Conduct S-parameter measurements, Conduct time-domain measurements, Extract channel performance, Validate modeling correlation, Perform link-level analysis, Collaborate with hardware teams, Collaborate with mechanical teams, Collaborate with packaging teams, Optimize stack-up strategies, Optimize breakout strategies, Optimize routing strategies, Research novel materials, Prototype novel materials, Research backplane concepts, Prototype backplane concepts, Research interconnect topologies, Prototype interconnect topologies, Support bring-up of production boards, Support debug of production boards, Root-cause SI/PI issues", "teamCollaboration" : "Hardware teams; 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Latest advancements in cloud computing; Latest advancements in artificial intelligence; Latest advancements in software-defined networking; Anticipate and adapt to future challenges; Novel materials; Backplane concepts; Low-loss interconnect topologies", "problemSolvingSkills" : "Root-cause SI/PI issues", "qualificationsBasic" : "BS/MS/PhD in Electrical Engineering, Focus on electromagnetics, Focus on signal integrity, Focus on high-speed digital design, Solid understanding of signal integrity theory, Solid understanding of S-parameter analysis, Solid understanding of channel modeling, Hands-on experience with 2.5D/3D solvers, Lab skills using oscilloscopes, Lab skills using VNAs, Lab skills using TDRs, Lab skills using BERTs, Lab skills using Ethernet compliance tools, Familiarity with advanced PCB materials, Familiarity with manufacturing constraints, Experience analyzing 56G/112G/224G PAM4, Experience analyzing NRZ serial links, Experience simulating 56G/112G/224G PAM4, Experience simulating NRZ serial links", "qualificationsPreferred" : "Knowledge of power integrity, Knowledge of co-simulation techniques, Experience with co-packaged optics, Experience with chiplet-based architectures, Experience with advanced substrate technologies, Familiarity with EMIC considerations, Familiarity with signal/power isolation, Understanding of thermal effects, Understanding of mechanical effects, Experience working with fabrication vendors, Experience working with ASIC teams, Experience working with contract manufacturers", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus and routing environments. What sets us apart is our relentless pursuit of innovation. We leverage the latest advancements in cloud computing, artificial intelligence, and software-defined networking to provide our clients with a competitive edge in an increasingly interconnected world. Our solutions are designed to not only meet the current demands of the digital landscape but to also anticipate and adapt to future challenges. At Arista we value the diversity of thought and perspectives that each employee brings to the table. We believe that fostering an inclusive environment, where individuals from various backgrounds and experiences feel welcome, is essential for driving creativity and innovation. Our commitment to excellence has earned us several prestigious awards, such as Best Engineering Team, Best Company for Diversity, Compensation, and Work-Life Balance. At Arista, we take pride in our track record of success and strive to maintain the highest standards of quality and performance in everything we do. Who You'll Work With Arista’s cutting-edge Ethernet and optical networking platforms are built to push the limits of performance, density, and power efficiency. This wouldn’t be possible without our Signal Integrity (SI) and Power Integrity (PI) engineers who design, simulate, and characterize interconnects enabling the fastest SerDes technologies in the industry. We’re looking for a Senior Signal Integrity / Power Integrity Hardware Engineer to join our Hardware Design team at our headquarters in Santa Clara, CA. In this role, you’ll work at the intersection of advanced simulation, next-generation SerDes (112G/224G/448G PAM4), and innovative routing, packaging, and power delivery techniques. Your work will directly influence the architecture and layout of Arista’s next-generation Ethernet and optical systems for hyperscale, AI, and cloud networking. The total estimated annual compensation range for this position, inclusive of base salary, bonus, and equity, is $300,000 to $655,000. This range is a good faith estimate only. Bonus and equity are discretionary, subject to plan terms, and are not guaranteed components of total compensation. Actual total annual compensation may vary based on employee performance, company or equity performance, company policy, board approval, or similar factors. Please see additional base salary information below. What You'll Do * Perform 3D EM design and simulation of high-speed interconnects (channels, vias, packages, and connectors) for 112G/224G PAM4 SerDes using tools such as Ansys HFSS, SiWave, and Cadence Sigrity. * Develop and validate test vehicles to characterize next-generation PCB materials, packages, and interconnects. * Conduct S-parameter and time-domain measurements (VNA, TDR, BERT) to extract channel performance and validate modeling correlation. * Perform link-level analysis for advanced standards (Ethernet 800G/1.6T, PCIe Gen6/Gen7, CXL) using tools such as Keysight ADS or Cadence SystemSI. * Collaborate closely with hardware, mechanical, and packaging teams to optimize stack- up, breakout, and routing strategies for high-density designs. * Research and prototype novel materials, backplane concepts, and low-loss interconnect topologies to meet next-generation performance targets. * Support bring-up and debug of production boards, working cross-functionally to root-cause SI/PI issues. ## Qualifications * BS/MS/PhD in Electrical Engineering, Physics, or related field with a focus on electromagnetics, signal integrity, or high-speed digital design. * Solid understanding of signal integrity theory, S-parameter analysis, and channel modeling. * Hands-on experience with 2.5D/3D EM solvers (Ansys HFSS, SiWave, Sigrity, CST). * Strong lab skills using oscilloscopes, VNAs, TDRs, BERTs, and Ethernet compliance tools. * Familiarity with advanced PCB materials (e.g., Megtron 7, Tachyon 100G, SLP) and manufacturing constraints for high-speed design. * Experience analyzing and simulating 56G/112G/224G PAM4 and NRZ serial links. * Knowledge of power integrity and co-simulation techniques is a plus. * Excellent communication and collaboration skills. Preferred Qualifications * Experience with co-packaged optics, chiplet-based architectures, or advanced substrate technologies. * Familiarity with EMI/EMC considerations and signal/power isolation in densely integrated photonic-electronic systems. * Understanding of thermal and mechanical effects on SI/PI performance and long-term reliability. * Experience working with fabrication vendors, ASIC teams, and contract manufacturers to ensure end-to-end channel integrity. Base Salary Information: The new hire base pay for this role has a pay range of $180,000 to $275,000. Arista offers different pay ranges based on work location, so that we can offer consistent and competitive pay appropriate to the market. The actual base pay offered will be based on a wide range of factors, including skills, qualifications, relevant experience, and work location. The salary range provided reflects base pay only. As described above, this position may also be eligible for discretionary Arista bonuses and equity. US- based employees are also entitled to benefits including medical, dental, vision, wellbeing, tax savings and income protection. The recruiting team can share more details during the hiring process specific to the role and location. #LI-AC1 ## Additional Information Arista Networks is an equal opportunity employer. Arista makes all hiring and employment-related decisions in a non-discriminatory manner without regard to race, color, religion, sex, sexual orientation, gender identity, national origin or any other factor determined to be unlawful under applicable federal, state, or law law. All your information will be kept confidential according to EEO guidelines.", "summaryDescription" : "Senior Signal Integrity / Power Integrity (SI/PI) Engineer at Arista Networks. Skills: Signal Integrity, Power Integrity, SerDes technologies, High-speed interconnects. Perform 3D design of high-speed interconnects. Perform simulation of high-speed interconnects", "postedDate" : "2026-06-03T18:13:13.000", "createdAt" : "2026-06-04T09:23:59.906", "lastUpdated" : "2026-06-04T20:10:13.253", "ingestTimestamp" : "2026-06-04T09:23:59.906", "mongoId" : "6a21120e74d8ee00a0b09b93", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryAnnualMin" : 300000, "salaryAnnualMax" : 655000, "salaryBand" : "200k+", "hasSalary" : true, "allSkills" : [ "3D design", "Simulation", "Test vehicle development", "Characterization", "S-parameter analysis", "Time-domain measurements", "Link-level analysis", "Stack-up optimization", "Breakout optimization", "Routing optimization", "Material prototyping", "Backplane prototyping", "Interconnect prototyping", "Board bring-up", "Production debug", "Communication", "Signal Integrity", "Power Integrity", "SerDes technologies", "High-speed interconnects", "High-speed digital design", "Channel performance", "Modeling correlation", "Breakout strategies", "Routing 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"industry" : "Marketing", "salary" : { "min" : 75000.0, "max" : 110000.0, "currency" : "EUR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Bulgaria, adjusted for Manager seniority in the SaaS industry for a remote full-time role." }, "location" : "US", "locations" : [ "US" ], "timestamp" : "2026-06-16T13:12:25.555", "fingerprint" : "135fa851c1834a8b33105d3312a6dafa8858f1ace04a668c3b237fe75811c9ca", "source" : "lever", "language" : "en", "applyUrl" : "https://jobs.lever.co/jobgether/f4e2ec2d-a136-4d83-b7ac-ade3b4bf5c55/apply", "externalId" : "f4e2ec2d-a136-4d83-b7ac-ade3b4bf5c55", "industryFunction" : { }, "structuredLocations" : [ { "country" : "Bulgaria", "continent" : "eu", "workMode" : "remote" } ], "locationText" : "Bulgaria", "employmentType" : "FULL_TIME", "experienceMinYears" : 8, "experienceLevel" : "Manager", "technicalSkills" : "Marketo, HubSpot, Eloqua, Salesforce", "professionalSkills" : [ "Demand generation", "Account-based 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digital, content, webinars, events, email,, Translate product marketing messaging into campaign programs, Translate product launches into campaign programs, Translate thought leadership into campaign programs, Own campaign planning, Own campaign calendars, Own execution frameworks, Own performance measurement, Design ABX strategies, Lead ABX strategies, Focus ABX on high-value accounts, Focus ABX on buying groups, Build personalized account-based journeys, Leverage targeted content, Leverage executive engagement, Leverage events, Leverage coordinated sales plays, Align marketing and sales teams, Define campaign KPIs, Track campaign KPIs, Define account-level KPIs, Track account-level KPIs, Analyze performance data, Optimize campaigns, Improve targeting, Enhance marketing effectiveness, Build scalable campaign frameworks, Build scalable ABX frameworks, Build scalable playbooks, Build scalable processes, Support growth across segments, Support growth across regions, Partner with Product Marketing, Partner with Revenue Operations, Partner with Sales, Partner with SDRs, Partner with Customer Success, Ensure alignment and execution excellence", "teamCollaboration" : "Partnership with Sales; Partnership with SDRs; Partnership with Product Marketing; Partnership with Revenue Operations; Partnership with Customer Success; Cross-functional collaboration", "projectManagementSkills" : [ "Project management", "Manage multiple campaigns" ], "domainKnowledge" : "B2B SaaS; Account-based marketing; Demand generation; Integrated campaigns", "domainList" : [ "b2b-saas", "account-based-marketing", "demand-generation", "integrated-campaigns" ], "domainSpecificKnowledge" : [ "B2B SaaS", "Account-based marketing", "Demand generation", "Integrated campaigns" ], "toolProficiency" : [ "Marketo", "HubSpot", "Eloqua", "Salesforce" ], "communicationSkills" : "Stakeholder management", "problemSolvingSkills" : "Data analysis; Campaign optimization", "outcomesObjectives" : "Drive awareness; Drive engagement; Drive pipeline; Drive revenue impact; Improve targeting; Enhance marketing effectiveness", "qualificationsBasic" : "8+ years of experience in B2B marketing, Experience with marketing automation and CRM platforms, Project management skills", "qualificationsPreferred" : "Experience with Marketo, HubSpot, Eloqua, and Salesforce", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "## Accountabilities You will own the end-to-end strategy, execution, and optimization of integrated campaigns and ABX programs that drive awareness, engagement, pipeline, and revenue impact. Develop and execute integrated, multi-channel demand generation campaigns across digital, content, webinars, events, email, social, and outbound channels. Translate product marketing messaging, launches, and thought leadership into high-impact, revenue-driven campaign programs. Own campaign planning, calendars, execution frameworks, and performance measurement across marketing and revenue teams. Design and lead ABX strategies focused on high-value accounts and buying groups in close partnership with Sales and SDR leadership. Build personalized account-based journeys leveraging targeted content, executive engagement, events, and coordinated sales plays. Align marketing and sales teams around account engagement strategies, pipeline progression, and revenue outcomes. Define and track campaign and account-level KPIs including pipeline influence, engagement, conversion, and revenue impact. Analyze performance data to optimize campaigns, improve targeting, and enhance overall marketing effectiveness. Build scalable campaign and ABX frameworks, playbooks, and processes to support growth across segments and regions. Partner cross-functionally with Product Marketing, Revenue Operations, Sales, SDRs, and Customer Success to ensure alignment and execution excellence. Requirements You are a data-driven, execution-oriented marketing leader with deep experience in integrated campaigns and account-based strategies in B2B SaaS environments. 8+ years of experience in B2B marketing, including integrated campaigns, demand generation, ABM/ABX, or growth marketing roles. Proven track record of building and scaling integrated campaigns that directly drive pipeline and revenue impact. Hands-on experience designing and executing ABX programs targeting enterprise and strategic accounts. Strong understanding of multi-channel marketing including paid media, email, webinars, events, content, social, and outbound programs. Demonstrated ability to partner closely with Sales and Revenue Operations to align marketing efforts with revenue goals. Strong analytical skills with the ability to interpret data and translate insights into actionable campaign improvements. Experience with marketing automation and CRM platforms such as Marketo, HubSpot, Eloqua, and Salesforce. Strong project management skills with the ability to manage multiple complex campaigns simultaneously. Excellent communication and stakeholder management skills across technical and non-technical teams. Ability to balance strategic thinking with hands-on execution in a fast-paced, high-growth environment. Benefits Competitive compensation package including base salary, performance incentives, and equity Comprehensive medical, dental, and vision insurance for employees and eligible dependents Flexible unlimited PTO policy to support work-life balance and wellbeing Company holidays, annual winter break, and paid parental leave 401(k) retirement savings plan Quarterly lifestyle spending account for wellness, learning, and personal development Monthly stipend for mobile and internet expenses Fully remote-friendly work environment with strong cross-functional collaboration Opportunity to contribute to a leading AI-powered customer experience platform. ## Additional Information How Jobgether works: We use an AI-powered matching process to ensure your application is reviewed quickly, objectively, and fairly against the role's core requirements. Our system identifies the top-fitting candidates, and this shortlist is then shared directly with the hiring company. The final decision and next steps (interviews, assessments) are managed by their internal team. We appreciate your interest and wish you the best! Why Apply Through Jobgether? Data Privacy Notice: By submitting your application, you acknowledge that Jobgether will process your personal data to evaluate your candidacy and share relevant information with the hiring employer. This processing is based on legitimate interest and pre-contractual measures under applicable data protection laws (including GDPR). You may exercise your rights (access, rectification, erasure, objection) at any time. #LI-CL1", "summaryDescription" : "Sr. Manager, Integrated Campaigns and ABX. Skills: Integrated campaigns, Account-based marketing, Demand generation. Own strategy, execution, and optimization of integrated campaigns. Own strategy, execution, and optimization of ABX programs", "postedDate" : "2026-06-15T15:02:00.324", "createdAt" : "2026-06-15T15:02:00.324", "lastUpdated" : "2026-06-16T13:12:25.555", "ingestTimestamp" : "2026-06-16T03:20:21.017", "mongoId" : "6a30511af292fd229cefa6e5", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "75k-100k", "hasSalary" : false, "allSkills" : [ "Integrated campaigns", "ABX strategies", "Multi-channel marketing", "Data analysis", "Account-based marketing", "Demand generation", "Growth marketing", "Campaign planning", "Performance measurement", "Stakeholder management", "Strategic thinking", "Hands-on execution", "Project management", "Manage multiple campaigns", "B2B SaaS", "Marketo", "HubSpot", "Eloqua", "Salesforce" ], "skillCount" : 19, "jobCategory" : "marketing", "jobSubcategory" : "growth", "seniorityLevel" : "Manager", "dataQualityScore" : 0.8888889, "_score" : 438.2514, "daysOld" : 0, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "SaaS", "llmIndustryConfidence" : 0.97 }, { "id" : "6a30562bf292fd229cf25953", "title" : "Integration Engineer", "company" : "Molecule Software", "industry" : "Customer Success", "salary" : { "min" : 140000.0, "max" : 210000.0, "currency" : "PLN", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level Integration Engineer in Poland's FinTech industry, adjusted for company size and industry." }, "location" : "poland", "locations" : [ "poland" ], "timestamp" : "2026-06-16T12:17:55.634", "fingerprint" : "a9a0baa83b1a36c70b265d03f231d58935447166ffde47e76bd811f6ae53ead3", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/molecule-software/f12c8764-6aa4-4313-b5b0-2bcebd3afa6c/application", "externalId" : "f12c8764-6aa4-4313-b5b0-2bcebd3afa6c", "industryFunction" : { }, "structuredLocations" : [ { "country" : "Poland", "continent" : "eu", "workMode" : "onsite" } ], "locationText" : "Poland", "employmentType" : "FULL_TIME", "technicalSkills" : "Python, TypeScript, SQL, REST APIs, OAuth 2.0, SAML, JSON, XML, CSV, FIX", "professionalSkills" : [ "Data transformation", "Data validation", "Data reconciliation" ], "hardSkillsList" : [ "API integration", "Data feed development", "Report development" ], "hardSkills" : [ { "name" : "API integration", "level" : "intermediate" }, { "name" : "Data feed development", "level" : "intermediate" }, { "name" : "Report development", "level" : "intermediate" } ], "majorSkills" : "Integration design, API integration, SQL development", "majorSkillsList" : [ "Integration design", "API integration", "SQL development" ], "coreResponsibilities" : "Design integrations, Build integrations, Maintain integrations, Connect Molecule to client systems, Build custom reports in Mode, Turn client data into insights, End-to-end integration ownership, Integration testing, Integration documentation, Integration handover, Engage with client technical teams, Represent Molecule in integration discussions, Support go-live, Build integrations with ISO providers, Build integrations with market data providers, Build integrations with exchange platforms, Build integrations with ERP systems, Build integrations with CRM systems, Build integrations with generation data sources, API-based price extraction, Outbound data feeds, BigBang data lake integration, Configure SSO, Configure MFA", "teamCollaboration" : "Client technical teams", "domainKnowledge" : "Energy trading; Commodities trading; Financial services; ETRM workflows; CTRM workflows; Market data providers; Exchange platforms; Generation data sources; ERP systems; CRM systems; SCADA historians; Downstream analytics; Forward curves; LMPs; Ancillary service prices; Settlement data; Positions; P&L; Valuations; SFTP; FTP; Webhooks; Email automation; SSO; MFA", "domainList" : [ "energy-trading", "commodities-trading", "financial-services", "etrm-workflows", "ctrm-workflows", "market-data-providers", "exchange-platforms", "generation-data-sources", "erp-systems", "crm-systems", "scada-historians", "downstream-analytics", "forward-curves", "lmps", "ancillary-service-prices", "settlement-data", "positions", "p-l", "valuations", "sftp", "ftp", "webhooks", "email-automation", "sso", "mfa" ], "domainSpecificKnowledge" : [ "Energy trading", "Commodities trading", "Financial services", "ETRM workflows", "CTRM workflows", "Market data providers", "Exchange platforms", "Generation data sources", "ERP systems", "CRM systems", "SCADA historians", "Downstream analytics", "Forward curves", "LMPs", "Ancillary service prices", "Settlement data", "Positions", "P&L", "Valuations", "SFTP", "FTP", "Webhooks", "Email automation", "SSO", "MFA" ], "toolProficiency" : [ "Mode" ], "documentationSkills" : "Integration documentation", "qualificationsBasic" : "Background in energy, commodities, or financial services, ETRM/CTRM workflows familiarity, Python and TypeScript daily use, Solid SQL for data transformation, Hands-on experience with real-world integrations, Good understanding of REST APIs, Good understanding of OAuth 2.0, Good understanding of SAML, Good understanding of JSON, Good understanding of XML, Good understanding of CSV, Good understanding of FIX", "qualificationsPreferred" : "ETRM/CTRM workflows strongly preferred", "remoteFriendly" : true, "workSiteFlexibility" : "Onsite", "rawDescription" : "Molecule Software | Poland (Office) Molecule is a modern ETRM platform built for energy trading companies across power, natural gas, renewables, and financial commodities. We're growing our integration capability and looking for an Integration Engineer to own the technical connectivity that sits at the heart of every client implementation. THE ROLE You'll design, build, and maintain the integrations that connect Molecule to the systems our clients depend on — market data providers, exchange platforms, generation data sources, ERP and CRM systems, SCADA historians, and downstream analytics infrastructure. You'll also build custom reports in SQL, turning client data into the insights they need. This is an end-to-end ownership role: from integration design through to testing, documentation, and handover. Where your profile supports it, you'll engage directly with client technical teams — representing Molecule in integration design discussions and supporting go-live. WHAT YOU'LL WORK ON • Building integrations with ISO and market data providers (Montel, Pharos, ZEMA), exchange platforms (ICE, CME, Nodal), ERP/CRM systems (SAP, Microsoft), and generation data sources • API-based price extraction — forward curves, LMPs, ancillary service prices, settlement data • Outbound data feeds and BigBang data lake integration for positions, P&L, and valuations • REST APIs, SFTP/FTP, webhooks, and email-based automation • SSO and MFA configuration • Custom report development in Mode using SQL WHAT WE'RE LOOKING FOR • Background in energy, commodities, or financial services — familiarity with ETRM/CTRM workflows is strongly preferred • Strong Python and TypeScript — both used daily • Solid SQL for data transformation, validation, and reconciliation • Hands-on experience with real-world integrations: market data vendors, exchanges, ERP/CRM, or SCADA systems • Good understanding of REST APIs, OAuth 2.0, SAML, and common data formats (JSON, XML, CSV, FIX)", "summaryDescription" : "Integration Engineer at Molecule Software. Skills: Integration design, API integration, SQL development. Design integrations. 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Operations Analytics managers", "projectManagementSkills" : [ "Project planning", "Project execution", "Risk assessment" ], "domainKnowledge" : "Account Takeovers (ATOs); Bad Actor Accounts (BAAs); eCommerce Transactions; Online Marketplace Trust", "domainList" : [ "account-takeovers-atos", "bad-actor-accounts-baas", "ecommerce-transactions", "online-marketplace-trust" ], "domainSpecificKnowledge" : [ "Account Takeovers (ATOs)", "Bad Actor Accounts (BAAs)", "eCommerce Transactions", "Online Marketplace Trust" ], "toolProficiency" : [ "Tableau", "Excel", "SQL", "Power BI" ], "communicationSkills" : "Business recommendations; Influencing stakeholders", "problemSolvingSkills" : "Data-driven insights", "qualificationsBasic" : "5+ years tax, finance, or analytical field experience, 3+ years writing SQL queries, 3+ years creating BI reports using Tableau, 3+ years creating BI reports using Power BI, Experience defining requirements, Experience using data and metrics for insights, Experience making business recommendations, Experience influencing stakeholders, Experience with Excel", "qualificationsPreferred" : "MBA", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Have you ever thought about what it takes to detect and prevent unauthorized activity among hundreds of millions of eCommerce transactions across the globe? What would you do to increase trust in an online marketplace where millions of buyers create and sign in to shop at Amazon? How would you build systems that evolve over time to proactively identify and neutralize new and emerging MO? Amazon’s Buyer Risk Prevention (BRP) team is looking for a passionate, results-oriented Business Analyst to support Account Integrity’s mission is to prevent bad actors from taking over existing good Customer accounts (events referred to as ATOs), and from creating new Amazon accounts (bad actor accounts, or BAAs). Key job responsibilities As a Business Analyst in BRP, you will be responsible for analyzing terabytes of data to identify specific instances of risk, broader risk trends and points of customer friction, developing scalable solutions for prevention. In addition you will be responsible for building a robust set of operational and business metrics and will utilize metrics to determine improvement opportunities. Responsibilities: - Understand the various operations across BRP - Understand the requirements of stakeholders and map them with the data sources/data warehouse - Design and develop highly available dashboards and metrics using Tableau, Excel and SQL. - Provide wing-to-wing project lifecycle execution (project planning, execution, risk assessment and system availability) - Execute high priority (i.e. cross functional, high impact) projects to improve operations performance with the help of Operations Analytics managers - Perform business analysis and data queries using scripting languages like R, Python etc. - Execute analytical projects and understanding of analytical methods (like ANOVA, Distribution theory, regression, forecasting, Machine Learning Techniques, etc.) - Identify new pattern of abuse and make recommendations for new controls and improved monitoring - Develop and oversee the initiation of strategy recommendations Basic Qualifications: - 5+ years of tax, finance or a related analytical field experience - 3+ years of writing SQL queries and creating business intelligence reports using Tableau, Power BI experience - Experience defining requirements and using data and metrics to draw business insights - Experience making business recommendations and influencing stakeholders - Experience with Excel Preferred Qualifications: - MBA Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "Sr. Business Analyst, Account Integrity at ADCI. Skills: Account Integrity, Business Analysis, Data Analysis, Risk Prevention. Analyze terabytes of data. Identify specific instances of risk", "postedDate" : "2026-06-13T08:39:49.970", "createdAt" : "2026-06-13T08:39:49.970", "lastUpdated" : "2026-06-15T03:56:37.176", "ingestTimestamp" : "2026-06-13T08:39:49.970", "mongoId" : "68e6b1da70f0b99d58d66c92", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.com/jobs/3102837/apply", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Data Querying", "Business Metrics", "Risk Trends", "Customer Friction", "Pattern Recognition", "Forecasting", "Regression", "ANOVA", "Distribution Theory", "Machine Learning Techniques", "Results-oriented", "Account Integrity", "Business Analysis", "Data Analysis", "Risk Prevention", "Risk Analysis", "Metrics Development", "Project Lifecycle", "Project planning", "Project execution", "Risk assessment", "Account Takeovers (ATOs)", "Bad Actor Accounts (BAAs)", "eCommerce Transactions", "Online Marketplace Trust", "Tableau", "Excel", "SQL", "Power BI" ], "skillCount" : 29, "jobCategory" : "other", "dataQualityScore" : 1.0, "_score" : 435.35245, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true }, { "id" : "6a194a6e58b93c861e461e55", "title" : "Signal Integrity Engineer", "company" : "Jabil", "location" : "Sanchong", "locations" : [ "Sanchong", "Taiwan" ], "timestamp" : "2026-05-29T12:05:13.950", "fingerprint" : "61227057f5cb7020330dfd51a487b58f0bd3a327a453d1949498e7a6727d8367", "source" : "workday", "language" : "en", "applyUrl" : "https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Sanchong/Signal-Integrity-Engineer_J2452083", "externalId" : "J2452083", "locationPoint" : "30.79508,106.08473", "structuredLocations" : [ { "city" : "Sanchong", "workMode" : "onsite" } ], "locationText" : "Sanchong", "employmentType" : "FULL_TIME", "minimumEducation" : "Electrical Engineering Degree (BSEE/MSEE or equivalent experience)", "experienceMinYears" : 3, "experienceMaxYears" : 5, "experienceLevel" : "Mid", "technicalSkills" : "Embedded hardware design, PCB layout designs, Electronic components, Electronic Circuits, Power supply Theory, Digital theory, Analog theory, RF Design", "professionalSkills" : [ "Component derating", "DFMEA" ], "hardSkillsList" : [ "Embedded hardware design", "PCB layout designs", "Electronic components", "Electronic Circuits", "Power supply Theory", "Digital theory", "Analog theory", "RF Design", "Component derating", "DFMEA", "Oscilloscopes", "Multi-meters", "Simulation tools" ], "hardSkills" : [ { "name" : "Embedded hardware design", "level" : "intermediate" }, { "name" : "PCB layout designs", "level" : "intermediate" }, { "name" : "Electronic components", "level" : "intermediate" }, { "name" : "Electronic Circuits", "level" : "intermediate" }, { "name" : "Power supply Theory", "level" : "intermediate" }, { "name" : "Digital theory", "level" : "intermediate" }, { "name" : "Analog theory", "level" : "intermediate" }, { "name" : "RF Design", "level" : "intermediate" }, { "name" : "Component derating", "level" : "intermediate" }, { "name" : "DFMEA", "level" : "intermediate" }, { "name" : "Oscilloscopes", "level" : "intermediate" }, { "name" : "Multi-meters", "level" : "intermediate" }, { "name" : "Simulation tools", "level" : "intermediate" } ], "majorSkills" : "Embedded hardware design, PCB layout designs, Electronic Circuits", "majorSkillsList" : [ "Embedded hardware design", "PCB layout designs", "Electronic Circuits" ], "coreResponsibilities" : "Develops new engineering design, Gathers design requirements, Recommends steps to implement reference design, Perform and analyze circuit design, Develop subsystem architecture, Gathers information relating to hardware solutions, Recommends improvements to designs, Develop embedded hardware design, Develop PCB layout designs, Evaluates/selects electronic components, Analyzes Electronic Circuits, Improves or updates the design, Assembles prototypes, Design first powerup, Design debug, Functional circuit verification, Manages external component suppliers", "teamCollaboration" : "Work as part of a global team; Evaluates with system architects; Works with and manages external component suppliers/manufacturers", "domainKnowledge" : "Regulatory and safety standards", "domainList" : [ "regulatory-and-safety-standards" ], "domainSpecificKnowledge" : [ "Regulatory and safety standards" ], "toolProficiency" : [ "Oscilloscopes", "Multi-meters", "Simulation tools" ], "communicationSkills" : "Effectively communicate with good understanding of English", "problemSolvingSkills" : "Analyze basic to moderate circuit design; Analyzes Electronic Circuits with moderate complexity", "outcomesObjectives" : "Improve components or design quality/reliability", "qualificationsBasic" : "Electrical Engineering Degree (BSEE/MSEE or equivalent experience), 3+ years experience in embedded hardware design or other key competency, Working knowledge of Industry or specific sector, regulatory and safety standards, Developed multiple projects that have utilized one of more of Electrical Engineering Design specializations or competencies: Power supply Theory, Digital theory, Analog theory, RF Design, etc., Knowledge of key development tools and design standards: Component derating, DFMEA, oscilloscopes, multi-meters, simulation tools, etc.", "remoteFriendly" : false, "rawDescription" : "At Jabil (NYSE: JBL), we are proud to be a trusted partner for the world's top brands, offering comprehensive engineering, supply chain, and manufacturing solutions. With 60 years of experience across industries and a vast network of over 100 sites worldwide, Jabil combines global reach with local expertise to deliver both scalable and customized solutions. Our commitment extends beyond business success as we strive to build sustainable processes that minimize environmental impact and foster vibrant and diverse communities around the globe. **JOB SUMMARY** Under the guidance of management, develops new engineering design of a basic to moderate complexity. Gathers design requirements and recommends steps to implement basic to moderate reference design. implementation or design modifications of existing product. Perform and analyze basic to moderate circuit design, referring more complex issues to management or more senior team members. Develop subsystem architecture at the direction of a Sr. Engineer or above. **ESSENTIAL DUTIES AND RESPONSIBILITIES** * Gathers information relating to hardware solutions and recommends basic improvements to designs that improve components or design quality/reliability. * Develop with supervision embedded hardware design and PCB layout designs utilizing standard tools * Evaluates with system architects to review and clarify design requirements and architecture. * Evaluates/selects electronic components * Analyzes Electronic Circuits with moderate complexity and can improve or update the design. * Under the guidance of more senior team members, assembles prototypes, design first powerup, design debug and functional circuit verification. * Works with and manages external component suppliers/manufacturers * May perform other duties and responsibilities as assigned. **JOB QUALIFICATIONS** **KNOWLEDGE REQUIREMENTS** _TECHNICAL KNOWLEDGE & SKILLS_ * Working knowledge of Industry or specific sector, regulatory and safety standards. * Developed multiple projects that have utilized one of more of Electrical Engineering Design specializations or competencies: Power supply Theory, Digital theory, Analog theory, RF Design, etc. * Knowledge of key development tools and design standards: Component derating, DFMEA, oscilloscopes, multi-meters, simulation tools, etc. _NON-TECHNICAL KNOWLEDGE & SKILLS_ * Influence others and share best practices. * Effectively communicate with good understanding of English. * Work as part of a global team. **EDUCATION & EXPERIENCE REQUIREMENTS** * Electrical Engineering Degree (BSEE/MSEE or equivalent experience) * 3+ years experience in embedded hardware design or other key competency * Or an equivalent combination of education, training or experience. BE AWARE OF FRAUD: When applying for a job at Jabil you will be contacted via correspondence through our official job portal with a jabil.com e-mail address; direct phone call from a member of the Jabil team; or direct e-mail with a jabil.com e-mail address. Jabil does not request payments for interviews or at any other point during the hiring process. Jabil will not ask for your personal identifying information such as a social security number, birth certificate, financial institution, driver’s license number or passport information over the phone or via e-mail. If you believe you are a victim of identity theft, contact your local police department. Any scam job listings should be reported to whatever website it was posted in. **Jabil, including its subsidiaries, is an equal opportunity employer and considers qualified applicants for employment without regard to race, color, religion, national origin, sex, sexual orientation, gender identity, age, disability, genetic information, veteran status, or any other characteristic protected by law.** # **Accessibility Accommodation** If you are a qualified individual with a disability, you have the right to request a reasonable accommodation if you are unable or limited in your ability to use or access Jabil.com/Careers site as a result of your disability. You can request a reasonable accommodation by sending an e-mail to Always_Accessible@Jabil.com with the nature of your request and contact information. Please do not direct any other general employment related questions to this e-mail. Please note that only those inquiries concerning a request for reasonable accommodation will be responded to. #whereyoubelong", "summaryDescription" : "Signal Integrity Engineer at Jabil. Skills: Embedded hardware design, PCB layout designs, Electronic Circuits. Develops new engineering design. Gathers design requirements", "postedDate" : "2026-05-29T12:02:12.120", "createdAt" : "2026-05-29T12:02:12.082", "lastUpdated" : "2026-05-29T12:05:13.950", "ingestTimestamp" : "2026-05-29T12:02:12.082", "mongoId" : "6a194a6e58b93c861e461e55", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://jabil.wd5.myworkdayjobs.com/Jabil_Careers/job/Sanchong/Signal-Integrity-Engineer_J2452083", "hasSalary" : false, "allSkills" : [ "Embedded hardware design", "PCB layout designs", "Electronic components", "Electronic Circuits", "Power supply Theory", "Digital theory", "Analog theory", "RF Design", "Component derating", "DFMEA", "Oscilloscopes", "Multi-meters", "Simulation tools", "Regulatory and safety standards" ], "skillCount" : 14, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 0.8888889, "_score" : 433.0753, "daysOld" : 0, "hasLocation" : true, "hasGeo" : false }, { "id" : "6a305615f292fd229cf24c35", "title" : "Integration Engineer", "company" : "Light", "industry" : "Tech", "salary" : { "min" : 70000.0, "max" : 105000.0, "currency" : "EUR", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Bulgaria, adjusted for mid-seniority and FinTech industry for a full-time Integration Engineer." }, "location" : "Remote", "locations" : [ "Remote", "Copenhagen" ], "timestamp" : "2026-06-16T12:04:54.440", "fingerprint" : "7ee2d506243e21ac9fd3718bfea17bb84614d959d48ab06277fa4ac620ce88e4", "source" : "ashby", "language" : "en", "applyUrl" : "https://jobs.ashbyhq.com/light-inc/190d691a-1bf6-4755-8932-35c8b8fd43af/application", "externalId" : "190d691a-1bf6-4755-8932-35c8b8fd43af", "industryFunction" : { }, "structuredLocations" : [ { "country" : "Bulgaria", "continent" : "eu", "workMode" : "remote" } ], "locationText" : "Bulgaria", "employmentType" : "FULL_TIME", "technicalSkills" : "Kotlin, React, AWS, Terraform, HSBC, ISO 20022, MT formats", "professionalSkills" : [ "System design", "API integration", "Data integrity", "Multi-tenancy design", "Compliance management", "Idempotency", "Retries", "Webhook strategies", "Polling strategies", "Dead-letter handling", "Reconciliation" ], "hardSkillsList" : [ "Backend development", "API development", "Financial integrations", "Payment processing", "E-invoicing", "Tax platforms", "Certificate auth", "MTLS auth", "OAuth flows", "Rate limit handling" ], "hardSkills" : [ { "name" : "Backend development", "level" : "intermediate" }, { "name" : "API development", "level" : "intermediate" }, { "name" : "Financial integrations", "level" : "intermediate" }, { "name" : "Payment processing", "level" : "intermediate" }, { "name" : "E-invoicing", "level" : "intermediate" }, { "name" : "Tax platforms", "level" : "intermediate" }, { "name" : "Certificate auth", "level" : "intermediate" }, { "name" : "MTLS auth", "level" : "intermediate" }, { "name" : "OAuth flows", "level" : "intermediate" }, { "name" : "Rate limit handling", "level" : "intermediate" } ], "majorSkills" : "Integration engineering, API design, Financial systems", "majorSkillsList" : [ "Integration engineering", "API design", "Financial systems" ], "coreResponsibilities" : "Build against corporate banking APIs, Build against payments APIs, Handle account information, Handle payment initiation, Handle status reporting, Handle FX, Design integrations for multi-tenancy, Isolate credentials per tenant, Isolate configuration per tenant, Isolate data per tenant, Connect to e-invoicing networks, Connect to tax platforms, Map between formats, Manage compliance edge cases, Keep delivery auditable, Ensure idempotency, Implement retries, Implement webhook strategies, Implement polling strategies, Implement dead-letter handling, Ensure end-to-end reconciliation", "teamCollaboration" : "Cross-functional teams", "domainKnowledge" : "Corporate banking; Payments APIs; E-invoicing networks; Tax platforms; ISO 20022; SWIFT; Virtual accounts; Open banking; Accounting concepts; Statutory filing; US sales tax", "domainList" : [ "corporate-banking", "payments-apis", "e-invoicing-networks", "tax-platforms", "iso-20022", "swift", "virtual-accounts", "open-banking", "accounting-concepts", "statutory-filing", "us-sales-tax" ], "domainSpecificKnowledge" : [ "Corporate banking", "Payments APIs", "E-invoicing networks", "Tax platforms", "ISO 20022", "SWIFT", "Virtual accounts", "Open banking", "Accounting concepts", "Statutory filing", "US sales tax" ], "toolProficiency" : [ "AWS", "Terraform" ], "problemSolvingSkills" : "Root cause analysis; Troubleshooting; Data integrity", "outcomesObjectives" : "Ensure data agreement; Ensure money movement agreement", "qualificationsBasic" : "4-6 years of experience, Working software in production, Built integrations against external systems, Defend a system against a partner, Know banking and payments APIs, Comfortable across the stack, Care about data integrity, Ship early and often", "qualificationsPreferred" : "Experience integrating J. P. Morgan, Experience integrating HSBC, Familiarity with ISO 20022, Familiarity with SWIFT, Familiarity with virtual accounts, Familiarity with open banking, Experience in fintech, Experience with accounting concepts, Experience with e-invoicing standards, Experience with country-specific compliance regimes, Background in high-growth startups", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "RETIRE THE ERP. Light exists to replace factory-era ERPs with software that feels alive. Our Smart Financial Platform gives modern, global companies superpowers—automated accounting, real-time reporting, and financial flows that move at the speed of the business. We build with our customers, ship fast, and obsess over craft. In a short time, Light has gone from idea to the operating core for leading companies like Lovable, Legora, and Keyshot. People don't just use Light—they enjoy it. We're an early team defining a new software category. Think engineers who love debits and credits, designers who care about reconciliation states, and operators who treat finance as a product. If you're excited to modernize how the world runs money—one workflow at a time—you're in the right place. Backed by world-class investors and advised by industry titans, we're building category-defining products with the freedom to ship ambitiously and own outcomes. Come help us make Light the global default for next-gen finance. THIS INTEGRATIONS ENGINEER ROLE Light is only as powerful as the systems it connects to. Money doesn't move because we say so—it moves because we speak the language of the bank, the e-invoicing network, and the planning tool on the other side, correctly, every time, for every customer entity. This role owns that layer: the interaction surface between Light and the rest of the financial world. You'll build and operate the integrations that let Light plug into multi-tenant banking APIs (J.P. Morgan, HSBC, and peers), global e-invoicing networks, and tax platforms and more. This is backend-heavy, data-integrity-critical work where a dropped message or a silent reconciliation mismatch is not an acceptable outcome. You'll design the abstractions that turn a dozen incompatible partner APIs into one coherent internal model, and you'll keep those abstractions honest as partners change their specs underneath you. What you'll work on: - Bank connectivity. Build against corporate banking and payments APIs—account information, payment initiation, status reporting, FX—across providers like J.P. Morgan Payments and HSBC. Handle the realities of bank integrations: certificate-based and mTLS auth, OAuth flows, ISO 20022 (pain/pacs/camt) and legacy MT formats, sandbox-to-production parity, and rate limits that assume you're a bank, not a startup. - Multi-tenancy done right. Our customers are many legal entities operating in many countries. You'll design integrations where credentials, configuration, and data are isolated per tenant, where onboarding a new entity is a workflow rather than a code change, and where one customer's failure never leaks into another's. - Global e-invoicing. Connect Light to e-invoicing networks and country-specific mandates (Peppol and the growing set of national clearance and reporting regimes). Map between formats, manage compliance-driven edge cases, and keep delivery auditable. - Tax platforms for statutory filing, US sales tax and much more. - Reliability and reconciliation. Idempotency, retries, webhook and polling strategies, dead-letter handling, and end-to-end reconciliation so that what we think happened and what actually happened always agree. YOUR QUALIFICATIONS 4-6 years of experience ideally, plus… You build things. Not prototypes, not demos. Working software in production, doing something real for real users. This is the non-negotiable. You've built integrations against unforgiving external systems. APIs you don't control, that fail in ways the docs don't mention, where correctness is contractual. You know how to defend a system against a partner that returns a 200 with an error in the body. You know banking and payments APIs. Direct, hands-on experience with corporate banking, treasury, or payments APIs is what sets the strongest candidates apart. Experience integrating J.P. Morgan or HSBC specifically—their developer platforms, auth models, and payment and reporting APIs—is highly valuable and a genuine differentiator for this role. Familiarity with ISO 20022, SWIFT, virtual accounts, or open banking is a strong signal. You are excited about AI. You use AI tooling efficiently to improve your work. At Light, a lot of code is written with AI, which means the hard part is increasingly the thinking: deciding what to build, reviewing what comes back, and catching where the model is confidently wrong. You know when AI speeds you up, when it's likely to mislead you, and how to lean on it while staying fully responsible for what ships. You're comfortable across the stack. You don't need to be a specialist in everything, but you can't have a lane you refuse to leave. Our stack is Kotlin and React, and this role leans backend. If you're strong on the backend and curious about the rest, that works. You care about data integrity. You think about the person on the other end and the money moving between them. You notice when a flow is correct but fragile, and you act on it. You ship early and often. Small batches. Learn. Go again. You'd rather put something real in front of a customer than spend another week perfecting it in isolation. BONUS POINTS - Experience in fintech or systems where data integrity is non-negotiable - Familiarity with accounting concepts: debits, credits, reconciliation - Experience with e-invoicing standards or country-specific compliance regimes - Background in high-growth startups where everything was still being figured out OUR TECH STACK We build on AWS, with a Kotlin backend, a React frontend, and infrastructure managed in Terraform. It's a real production system that global finance teams depend on every day. The integration layer you'll own sits squarely in the Kotlin backend, talking to a long list of external partners. You don't need to have used every piece of it. You do need to be comfortable in this kind of environment: real scale, real customers, real stakes. THE GOOD STUFF In addition to being part of a great team and working in a really fun and innovative environment, we offer: - A competitive salary + potential stock options - 25 days of annual leave + public holidays in the country where you are based - Regular socials and company off-sites - A huge opportunity for career growth as you'll help shape a market-defining product THE FAMOUS LAST WORDS Working at Light means you're embarking on an exciting journey to reshape the future of multinational financial operations. Our cheat-code is that we've built something like this before—and are now doing it again, only better. Our goal is to make global finance effortless and empower companies to make informed decisions. Join the rocket ship while it's taking off.", "summaryDescription" : "Integration Engineer at Light. Skills: Integration engineering, API design, Financial systems. Build against corporate banking APIs. Build against payments APIs", "createdAt" : "2026-06-16T00:30:11.702", "lastUpdated" : "2026-06-16T12:04:54.440", "ingestTimestamp" : "2026-06-16T00:30:11.702", "mongoId" : "6a305615f292fd229cf24c35", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "salaryBand" : "50k-75k", "hasSalary" : false, "allSkills" : [ "Backend development", "API development", "Financial integrations", "Payment processing", "E-invoicing", "Tax platforms", "Certificate auth", "MTLS auth", "OAuth flows", "Rate limit handling", "Integration engineering", "API design", "Financial systems", "System design", "API integration", "Data integrity", "Multi-tenancy design", "Compliance management", "Idempotency", "Retries", "Webhook strategies", "Polling strategies", "Dead-letter handling", "Reconciliation", "Corporate banking", "Payments APIs", "E-invoicing networks", "ISO 20022", "SWIFT", "Virtual accounts", "Open banking", "Accounting concepts", "Statutory filing", "US sales tax", "AWS", "Terraform" ], "skillCount" : 36, "jobCategory" : "engineering", "jobSubcategory" : "software", "seniorityLevel" : "Mid", "dataQualityScore" : 0.7777778, "_score" : 430.25864, "hasLocation" : true, "hasGeo" : false, "llmIndustry" : "FinTech", "llmIndustryConfidence" : 0.98 }, { "id" : "6a216de574d8ee00a0c0c319", "title" : "Signal and Power Integrity Lab Engineer", "company" : "Micron Technology", "industry" : "Semiconductor", "salary" : { "min" : 115000.0, "max" : 165000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for a Mid-level Signal and Power Integrity Lab Engineer in Boise, United States, adjusted for company size and industry." }, "location" : "Boise, ID - Main Site", "locations" : [ "Boise, ID - Main Site", "United States of America" ], "timestamp" : "2026-06-05T08:04:16.600", "fingerprint" : "a73d32c8fe67357bba72d1ed97c86715fdda8bd06fcfbce8af339b9d4fa6aa53", "source" : "workday", "language" : "en", "applyUrl" : "https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Signal-and-Power-Integrity-Lab-Engineer_JR98191", "externalId" : "JR98191", "industryFunction" : { }, "locationPoint" : "43.6135,-116.20345", "structuredLocations" : [ { "city" : "Boise", "state" : "Idaho", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "43.6166163,-116.2008860" } ], "locationText" : "Boise, Idaho, United States", "employmentType" : "FULL_TIME", "minimumEducation" : "BS", "experienceMinYears" : 3, "experienceMaxYears" : 5, "experienceLevel" : "Mid", "technicalSkills" : "Python, Matlab, HFSS, Clarity, CST, ADS, HSPICE", "professionalSkills" : [ "Signal integrity", "Power integrity", "EMIC measurements", "RF engineering", "Antenna design", "Applied electromagnetics", "Circuit simulation", "Electromagnetic simulation" ], "hardSkillsList" : [ "Laboratory experiments", "EMIC measurements", "Measurement platforms", "Measurement methodologies", "Compliance measurements", "Circuit simulation", "Electromagnetic simulation" ], "softSkillsList" : [ "Excellent communication" ], "hardSkills" : [ { "name" : "Laboratory experiments", "level" : "intermediate" }, { "name" : "EMIC measurements", "level" : "intermediate" }, { "name" : "Measurement platforms", "level" : "intermediate" }, { "name" : "Measurement methodologies", "level" : "intermediate" }, { "name" : "Compliance measurements", "level" : "intermediate" }, { "name" : "Circuit simulation", "level" : "intermediate" }, { "name" : "Electromagnetic simulation", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Excellent communication" } ], "majorSkills" : "Signal integrity, Power integrity, EMIC measurements", "majorSkillsList" : [ "Signal integrity", "Power integrity", "EMIC measurements" ], "coreResponsibilities" : "Design laboratory experiments, Conduct laboratory experiments, Provide EMIC measurements, Provide EMIC analysis, Provide EMIC mitigation guidance, Improve internal measurement platforms, Develop internal measurement platforms, Improve internal measurement methodologies, Develop internal measurement methodologies, Communicate technical insights, Provide guidance on EMC procedures, Provide guidance on EMC techniques, Provide guidance on EMC analysis, Use circuit simulation tools, Use electromagnetic simulation tools", "teamCollaboration" : "Simulation teams; Design teams; Application engineers; Micron customers; Micron Global Quality team", "domainKnowledge" : "Signal integrity; Power integrity; EMIC; RF engineering; Antenna design; Applied electromagnetics; Semiconductor components; Wafer-level characterization; Package-level characterization; Board-level characterization; EMC procedures", "domainList" : [ "signal-integrity", "power-integrity", "emic", "rf-engineering", "antenna-design", "applied-electromagnetics", "semiconductor-components", "wafer-level-characterization", "package-level-characterization", "board-level-characterization", "emc-procedures" ], "domainSpecificKnowledge" : [ "Signal integrity", "Power integrity", "EMIC", "RF engineering", "Antenna design", "Applied electromagnetics", "Semiconductor components", "Wafer-level characterization", "Package-level characterization", "Board-level characterization", "EMC procedures" ], "toolProficiency" : [ "Spectrum analyzers", "Network analyzers", "Near field probes", "RF wafer probes", "TEM/GTEM cells", "Anechoic chambers", "HFSS", "Clarity", "CST", "ADS", "HSPICE" ], "communicationSkills" : "Technical insights; Technical concepts", "innovationCreativity" : "Improvement of internal measurement platforms; Development of internal measurement platforms; Improvement of internal measurement methodologies; Development of internal measurement methodologies", "problemSolvingSkills" : "EMIC analysis; EMIC mitigation guidance; Technical insights", "qualificationsBasic" : "BS in EE or similar field, 3 years of relevant experience, background in signal integrity, background in power integrity, background in EMIC, background in RF engineering, background in antenna design, background in applied electromagnetics, Experience with spectrum analyzers, Experience with network analyzers, Experience with Time Domain Reflectometer (TDR), Experience with near field probes, Experience with RF wafer probes, Experience with TEM/GTEM cells, Experience with anechoic chambers", "qualificationsPreferred" : "Experience with programming, Experience with scripting languages, AI tools for script development, Familiarity with electromagnetic simulation tools, Familiarity with circuit simulation tools, Mechanical design skills, Mechanical assembly skills, Mechanical maintenance skills", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. * Design and conduct laboratory experiments for SI and PI characterization of Micron components (wafer-, package-, and board-level), providing feedback and guidance to simulation and design teams * Provide EMI/EMC measurements, analysis, and mitigation guidance for Micron products and customer systems * Improvement and development of internal measurement platforms and methodologies * Communicate technical insights to application engineers, designers, other team members, and Micron customers * Provide guidance on EMC procedures, techniques, and analysis to Micron Global Quality team members performing compliance measurements * Use circuit and electromagnetic simulation tools for analysis and post processing ### ### **Minimum Qualifications:** · BS in EE or similar field with at least 3 years of relevant experience · Strong background in one or more areas of signal integrity, power integrity, EMI/EMC, RF engineering, antenna design, or other fields within applied electromagnetics · Experience with measurements utilizing spectrum analyzers, network analyzers, Time Domain Reflectometer (TDR), near field probes, RF wafer probes, TEM/GTEM cells, and anechoic chambers ### **Preferred Qualifications:** · Experience with programming (e.g. Python, Matlab) and scripting languages for instruments and post-processing, including the use of AI tools for rapid script development · Familiarity with electromagnetic simulation tools (e.g. HFSS, Clarity, CST) and circuit simulation tools (e.g. ADS, HSPICE) · Mechanical design, assembly, and maintenance skills · Excellent communication skills for instructing technical concepts to customers, application engineers, and team member! As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on _[micron.com/careers/benefits](https://www.micron.com/careers/benefits)_. Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. To learn about your _**[right to work click here.](http://www.justice.gov/crt/worker-information)**_ To learn more about Micron, please visit** _[ micron.com/careers](https://www.micron.com/careers)_** For US Sites Only: To request assistance with the application process and/or for reasonable accommodations, please contact Micron’s People Organization at _[hrsupport_na @micron.com](mailto:hrsupport_na@micron.com)_ or 1-800-336-8918 (select option #3) Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron. AI alert**:** Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification. Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.", "summaryDescription" : "Signal and Power Integrity Lab Engineer at Micron Technology. Skills: Signal integrity, Power integrity, EMIC measurements. Design laboratory experiments. Conduct laboratory experiments", "postedDate" : "2026-05-18T18:01:43.624", "createdAt" : "2026-06-04T18:01:43.574", "lastUpdated" : "2026-06-05T08:04:16.600", "ingestTimestamp" : "2026-06-04T18:01:43.574", "mongoId" : "6a216de574d8ee00a0c0c319", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://micron.wd1.myworkdayjobs.com/External/job/Boise-ID---Main-Site/Signal-and-Power-Integrity-Lab-Engineer_JR98191", "salaryAnnualMin" : 115000, "salaryAnnualMax" : 165000, "salaryBand" : "100k-150k", "hasSalary" : true, "allSkills" : [ "Laboratory experiments", "EMIC measurements", "Measurement platforms", "Measurement methodologies", "Compliance measurements", "Circuit simulation", "Electromagnetic simulation", "Excellent communication", "Signal integrity", "Power integrity", "RF engineering", "Antenna design", "Applied electromagnetics", "EMIC", "Semiconductor components", "Wafer-level characterization", "Package-level characterization", "Board-level characterization", "EMC procedures", "Spectrum analyzers", "Network analyzers", "Near field probes", "RF wafer probes", "TEM/GTEM cells", "Anechoic chambers", "HFSS", "Clarity", "CST", "ADS", "HSPICE" ], "skillCount" : 30, "jobCategory" : "engineering", "seniorityLevel" : "mid", "dataQualityScore" : 1.0, "_score" : 428.18063, "daysOld" : 17, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Semiconductor" }, { "id" : "6a2c90b574d8ee00a09811d2", "title" : "RF Integration Team Lead", "company" : "Astranis", "industry" : "Manufacturing", "salary" : { "min" : 160000.0, "max" : 180000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : false }, "location" : "San Francisco, California, United States", "locations" : [ "San Francisco", "California", "United States" ], "timestamp" : "2026-06-16T05:34:33.278", "fingerprint" : "5d9234012c33bf69ae1c6654f395f4c928f9b92a055aaa60f8fda2a58df98040", "source" : "greenhouse", "language" : "en", "applyUrl" : "https://job-boards.greenhouse.io/astranis/jobs/4689200006", "externalId" : "4689200006", "industryFunction" : { }, "structuredLocations" : [ { "city" : "San Francisco", "state" : "California", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "onsite", "geo" : "37.7879363,-122.4075201" } ], "locationText" : "San Francisco, California, United States", "employmentType" : "FULL_TIME", "experienceMinYears" : 8, "experienceMaxYears" : 15, "experienceLevel" : "Lead", "technicalSkills" : "Python, C++, Vector Network Analyzers, Spectrum Analyzers, Noise Figure Meters, Signal Generators, Digital Signal Processing, Digital communication systems", "professionalSkills" : [ "Agile program management", "People-first leadership", "Test cell development", "Cross-functional processes", "Budget management", "Schedule management", "Work plan management", "Performance requirements management" ], "hardSkillsList" : [ "RF integration", "RF testing", "Hardware integration", "Test automation", "Process development" ], "softSkillsList" : [ "Leadership", "Mentoring" ], "hardSkills" : [ { "name" : "RF integration", "level" : "intermediate" }, { "name" : "RF testing", "level" : "intermediate" }, { "name" : "Hardware integration", "level" : "intermediate" }, { "name" : "Test automation", "level" : "intermediate" }, { "name" : "Process development", "level" : "intermediate" } ], "softSkills" : [ { "name" : "Leadership" }, { "name" : "Mentoring" } ], "majorSkills" : "RF Integration, Team Leadership, Test Automation, Hardware Testing", "majorSkillsList" : [ "RF Integration", "Team Leadership", "Test Automation", "Hardware Testing" ], "coreResponsibilities" : "Build, mentor, and guide a team of engineers, Oversee assembly, integration, and testing (AI&T) of spacecraft, Oversee development of RF test cells, Oversee design-for-test (DFT) strategies, Oversee cross-functional processes, Hire, develop, and lead RF test engineers, Cultivate a culture of technical excellence, safety, and, Oversee design and implementation of hardware test racks, Leverage COTS equipment and custom PCBAs, Measure complex RF signals, Apply flight-like loads, Power units under test, Drive development of Python-based automation software, Interface with flight hardware, Interface with RF test equipment, Interface with enterprise data systems, Capture seamless data, Stand up and scale business processes for RF, Stand up and scale business processes for test, Stand up and scale business processes for rigorous, Partner with RF Design teams, Partner with Mechanical Integration teams, Partner with Environmental Test teams, Channel test insights into design improvements, Manage budgets, Manage schedules, Manage work plans, Manage performance requirements, Ensure production milestones are met", "teamCollaboration" : "Cross-functional teams; RF Design; Mechanical Integration; Environmental Test", "projectManagementSkills" : [ "Agile program management", "Budget management", "Schedule management", "Work plan management" ], "domainKnowledge" : "Satellite payloads; RF sub-assemblies; Spacecraft systems; Space environment; Aerospace hardware integration; RF test and measurement", "domainList" : [ "satellite-payloads", "rf-sub-assemblies", "spacecraft-systems", "space-environment", "aerospace-hardware-integration", "rf-test-and-measurement" ], "domainSpecificKnowledge" : [ "Satellite payloads", "RF sub-assemblies", "Spacecraft systems", "Space environment", "Aerospace hardware integration", "RF test and measurement" ], "toolProficiency" : [ "COTS equipment", "Custom PCBAs" ], "communicationSkills" : "Technical summarization", "continuousLearning" : "Continuous learning culture", "problemSolvingSkills" : "Test validation; Process development", "specialRequirements" : "5 days a week in office, US Citizenship or Permanent Residency", "outcomesObjectives" : "Ensure production milestones are met without sacrificing quality", "qualificationsBasic" : "B. S. in Electrical Engineering, Aerospace Engineering, or related technical discipline, 5+ years of professional experience in hardware product development or production, Proven track record of building, managing, and mentoring engineering teams, Design-for-Test (DFT) and test automation mindset, Exceptional ability to synthesize and summarize technical RF and systems topics, Demonstrated ability to build engineering and operational processes from scratch, US Citizenship or Permanent Residency (Green Card)", "qualificationsPreferred" : "Direct experience with RF test and measurement equipment, Proficiency in Python or C++ for test automation and data analysis, Familiarity with space environment, aerospace hardware integration, and test flows, Experience managing a mixed team of engineers and technicians, Knowledge of Digital Signal Processing (DSP), Knowledge of digital communication systems", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Astranis builds advanced satellites for high orbits, expanding humanity’s reach into the solar system. Today, Astranis satellites provide dedicated, secure networks to highly-sophisticated customers across the globe— large enterprises, sovereign governments, and the US military. With five satellites on orbit and many more set to launch soon, the company is servicing a backlog of more than $1 billion of commercial contracts. Astranis is the preferred satellite communications partner for buyers with stringent requirements for uptime, data security, network visibility, and customization. Astranis has raised over $750 million from some of the world’s best investors, from Andreessen Horowitz to Blackrock and Fidelity, and employs a team of 450 engineers and entrepreneurs. Astranis designs, builds, and operates its satellites out of its 153,000 sq. ft. headquarters in Northern California, USA. Team Lead - RF Integration As the Production RF Integration Team Lead, you will build, mentor, and guide a high-performing team of engineers dedicated to the assembly, integration, and testing (AI&T) of Astranis spacecraft payloads and RF sub-assemblies. This role bridges the gap between RF design and flight-ready production. You will oversee the development of RF test cells, design-for-test (DFT) strategies, and cross-functional processes that ensure our communication satellites meet rigorous performance metrics before launch. This role requires a unique blend of deep technical RF knowledge & intuition, agile program management, and people-first leadership. Role Hire, develop, and lead a world-class team of RF test engineers. Cultivate a culture of technical excellence, safety, and continuous learning. Oversee the design and implementation of hardware test racks, leveraging both COTS equipment and custom PCBAs to measure complex RF signals, apply flight-like loads, and power units under test. Drive the development of Python-based automation software to interface with flight hardware, RF test equipment (VNAs, spectrum analyzers), and enterprise data systems for seamless data capture. Stand up and scale cross-functional business processes for RF test requirements capture, test development, and rigorous test validation. Partner closely with RF Design, Mechanical Integration, and Environmental Test teams to channel test insights back into design improvements Manage budgets, schedules, work plans, and performance requirements to ensure production milestones are met without sacrificing quality Requirements B. S. in Electrical Engineering, Aerospace Engineering, or a related technical discipline. 5+ years of professional experience in a fast-paced hardware product development or production environment Proven track record of building, managing, and mentoring engineering teams, with a knack for delegation and team building Strong Design-for-Test (DFT) and test automation mindset, specifically tailored to complex hardware Exceptional ability to synthesize and summarize dense, highly technical RF and systems topics for both executive leadership and cross-functional teams Demonstrated ability to build engineering and operational processes from scratch US Citizenship or Permanent Residency (Green Card) is required Ability to work 5 days a week in office Bonus Direct experience with RF test and measurement equipment (Vector Network Analyzers, Spectrum Analyzers, Noise Figure Meters, Signal Generators). Proficiency in Python or C++ for test automation and data analysis. Familiarity with the space environment, aerospace hardware integration, and test flows (TVAC, Vibration, EMI/EMC). Experience managing a mixed team of both engineers and technicians in a production environment. Knowledge of Digital Signal Processing (DSP) and digital communication systems What we offer: All our positions offer a compensation package that includes equity and robust benefits. Base pay is just one component of Astranis’s total rewards package. Your compensation also includes a significant equity package via incentive stock options, high-quality company-subsidized healthcare, disability and life insurance, 401(k) retirement planning, flexible PTO, and free on-site catered meals. Astranis pay ranges are informed and defined through professional-grade salary surveys and compensation data sources. The actual base salary offered to a successful candidate will additionally be influenced by a variety of factors including experience, credentials & certifications, educational attainment, skill level requirements, and the level and scope of the position. Base Salary $160,000—$180,000 USD U. S. Citizenship, Lawful Permanent Residency, or Refugee/Asylee Status Required (To comply with U. S. Government space technology export regulations, applicant must be a U. S. citizen, lawful permanent resident of the United States, or other protected individual as defined by 8 U.S. C. 1324b(a)(3)) Our mission and our products are meant to connect the world and everyone in it, regardless of gender, race, creed, or any other distinction. We believe in a diverse and inclusive workplace, and we encourage all people to join our team and bring their unique perspective to help make us stronger.", "summaryDescription" : "RF Integration Team Lead at Astranis. Skills: RF Integration, Team Leadership, Test Automation, Hardware Testing. Build, mentor, and guide a team of engineers. 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"jobSubcategory" : "general", "seniorityLevel" : "Entry", "dataQualityScore" : 0.44444445, "_score" : 424.56717, "daysOld" : 0, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.95 }, { "id" : "6a22236c74d8ee00a0d82d0e", "title" : "Senior Signal and Power Integrity Engineer", "company" : "NVIDIA", "industry" : "Technology", "salary" : { "min" : 2200000.0, "max" : 3500000.0, "currency" : "TWD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline for Senior Signal and Power Integrity Engineer in Taipei, Taiwan, adjusted for NVIDIA's industry and company size." }, "location" : "Taiwan, Taipei", "locations" : [ "Taiwan, Taipei" ], "timestamp" : "2026-06-05T09:58:23.945", "fingerprint" : "8cddda9a022f07ccc96ecc4f54ab980889403018c399618f6c6a95f73566f133", "source" : "workday", "language" : "en", "applyUrl" : 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"intermediate" }, { "name" : "Material selection", "level" : "intermediate" }, { "name" : "Layout review", "level" : "intermediate" }, { "name" : "Post-layout analysis", "level" : "intermediate" }, { "name" : "SI/PI modeling", "level" : "intermediate" }, { "name" : "Model correlation", "level" : "intermediate" }, { "name" : "Lab measurements", "level" : "intermediate" }, { "name" : "VNA", "level" : "intermediate" }, { "name" : "TDR", "level" : "intermediate" }, { "name" : "NRZ signaling", "level" : "intermediate" }, { "name" : "PAM-4 signaling", "level" : "intermediate" }, { "name" : "Timing budgets", "level" : "intermediate" }, { "name" : "System modeling", "level" : "intermediate" }, { "name" : "High-speed I/O design", "level" : "intermediate" }, { "name" : "Clock generation", "level" : "intermediate" }, { "name" : "Transmitter design", "level" : "intermediate" }, { "name" : "Receiver design", "level" : "intermediate" }, { "name" : "Equalization schemes", "level" : "intermediate" }, { "name" : "PDN analyses", "level" : "intermediate" }, { "name" : "Model generation", "level" : "intermediate" }, { "name" : "Time domain simulation", "level" : "intermediate" }, { "name" : "Package design", "level" : "intermediate" } ], "majorSkills" : "Signal integrity, Power integrity, Electromagnetics, PCB design", "majorSkillsList" : [ "Signal integrity", "Power integrity", "Electromagnetics", "PCB design" ], "coreResponsibilities" : "Drive board/system level signal and power integrity requirements, Lead board/system SI/PI design activities, Select PCB stackup/material, Implement design guides, Review layout, Perform post-layout analysis, Design and ensure system SI/PI performance, Support SI/PI failure analysis, Develop novel algorithms, Develop new methodologies, Improve SI/PI modeling efforts, Support customers w/ SI/PI questions, Perform VNA & TDR measurements, Support model correlation efforts, Improve confidence in design stage", "teamCollaboration" : "Work closely with Architecture teams; Work closely with ASIC teams; Work closely with Mixed Signal teams; Work closely with Package teams; Work closely with PCB Design teams; Work closely with Design Validation teams; Work with Application Engineering teams", "domainKnowledge" : "Electromagnetics; Transmission line theory; Via properties; High volume manufacturing variations; NRZ signaling; PAM-4 signaling; High-speed I/O design; PDN analyses", "domainList" : [ "electromagnetics", "transmission-line-theory", "via-properties", "high-volume-manufacturing-variations", "nrz-signaling", "pam-4-signaling", "high-speed-i-o-design", "pdn-analyses" ], "domainSpecificKnowledge" : [ "Electromagnetics", "Transmission line theory", "Via properties", "High volume manufacturing variations", "NRZ signaling", "PAM-4 signaling", "High-speed I/O design", "PDN analyses" ], "toolProficiency" : [ "HFSS", "Sigrity", "Hspice", "Cadence Allegro", "Constraints Manager", "Matlab", "Python" ], "communicationSkills" : "Written interpersonal skills; Verbal interpersonal skills", "innovationCreativity" : "Develop novel algorithms; Develop new methodologies", "problemSolvingSkills" : "SI/PI failure analysis", "outcomesObjectives" : "Ensure system SI/PI performance meets expectation", "qualificationsBasic" : "MSS in EE or equivalent experience, Minimum 3+ years of experience as a SI/PI engineer, Deep understanding of electromagnetics, Proficient with HFSS, Sigrity, Hspice, and/or other simulation tools, Experienced with Cadence Allegro PCB designer and Constraints Manager, Understanding of high volume manufacturing variations, Exposure to lab measurements including VNA & TDR experience, Good written & verbal interpersonal skills in English", "qualificationsPreferred" : "Familiarity with NRZ/PAM-4 signaling schemes, Exposure to interface timing budgets, Familiarity with high-speed I/O design concepts, PDN analyses, Experience w/ Matlab, Python, and C, Exposure to package design", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "We are now looking for Senior Signal & Power Integrity Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work, to amplify human imagination and intelligence. This is a dynamic team working with state of the art, unique technology. If you are someone that loves a challenge, come join this diverse team and help move the needle! **What you 'll be doing:** * Drive board/system level signal and power integrity requirements * Lead board/system SI/PI design activities, including PCB stackup/material selection, design guide implementation, layout review, and post-layout analysis * Work closely with Architecture, ASIC, Mixed Signal, Package, and PCB Design teams to design and ensure system SI/PI performance meets expectation before Gerber out, also work closely with Design Validation teams to support SI/PI failure analysis * Develop novel algorithms & new methodologies to improve SI/PI modeling efforts * Work with Application Engineering teams to support customers w/ SI/PI questions * VNA & TDR measurements to support model correlation efforts and improve confidence in design stage **What we need to see:** * MS/BS in EE or equivalent experience * Minimum 3+ years of experience as a SI/PI engineer * Deep understanding of electromagnetics, specifically electromagnetic waves including transmission line theory and via properties * Proficient with HFSS, Sigrity, Hspice, and/or other simulation tools * Experienced with Cadence Allegro PCB designer and Constraints Manager * Understanding of high volume manufacturing variations and impact to channel signal integrity * Exposure to lab measurements including VNA & TDR experience * Passionate about SI/PI work * Good written & verbal interpersonal skills in English **Ways to stand out from the crowd:** * Familiarity with NRZ/PAM-4 signaling schemes * Exposure to interface timing budgets and system modeling * Familiarity with high-speed I/O design concepts including clock generation, transmitter & receiver design, and equalization schemes * PDN analyses including model generation and time domain simulation * Experience w/ Matlab, Python, and C as well as exposure to package design", "summaryDescription" : "Senior Signal and Power Integrity Engineer at NVIDIA. Skills: Signal integrity, Power integrity, Electromagnetics, PCB design. Drive board/system level signal and power integrity requirements. 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ML teams; Operations teams; Core Identity; Customer Service; Amazon Business; Devices", "projectManagementSkills" : [ "Roadmap strategy", "Feature delivery" ], "domainKnowledge" : "Account security; Buyer risk prevention; Customer trust; Identity lifecycle; Bot mitigation; Impersonation scam prevention; Account recovery; Machine learning; Authentication innovation; Risk management; Fraud", "domainList" : [ "account-security", "buyer-risk-prevention", "customer-trust", "identity-lifecycle", "bot-mitigation", "impersonation-scam-prevention", "account-recovery", "machine-learning", "authentication-innovation", "risk-management", "fraud" ], "domainSpecificKnowledge" : [ "Account security", "Buyer risk prevention", "Customer trust", "Identity lifecycle", "Bot mitigation", "Impersonation scam prevention", "Account recovery", "Machine learning", "Authentication innovation", "Risk management", "Fraud" ], "toolProficiency" : [ "Tableau", "Qlikview", "QuickSight" ], "communicationSkills" : "Executive presentations; VP level engagement; Director level engagement", "documentationSkills" : "6-pagers; PR/FAQs; OP1", "innovationCreativity" : "Passkey adoption; Agentic AI threat mitigation; Automated remediation", "problemSolvingSkills" : "Threat mitigation; Attack vector analysis; Anomaly detection", "outcomesObjectives" : "Zero account takeovers; Zero account lockouts; ATO reduction; False positive sanitization rates; Passkey adoption; Account lockout reduction; Bot own WBR and MBR reporting", "qualificationsBasic" : "Bachelor's degree, Experience owning/driving roadmap strategy and definition, Experience with feature delivery and tradeoffs of a product, Experience contributing to engineering discussions around technology decisions and strategy related to a product, Experience managing technical products or online services, Experience in representing and advocating for a variety of critical customers and stakeholders during executive-level prioritization and planning, Experience owning feature delivery and tradeoffs of a product, Experience with technologies like Hadoop, Rules based systems and Machine learning, Experience with concepts such as system architecture, optimization, system dynamics, system analysis, statistical analysis, reliability analysis, and decision making", "qualificationsPreferred" : "Experience in building and driving adoption of new tools, Experience in using analytical tools, such as Tableau, Qlikview, QuickSight, Master's degree, Experience across the domain of risk management & fraud", "remoteFriendly" : false, "workSiteFlexibility" : "Onsite", "rawDescription" : "Amazon's Account Security team is looking for a Senior Product Manager – Technical to protect hundreds of millions of customers across Amazon's 4.6 billion accounts — the largest consumer identity surface in the world. This role owns the strategy, roadmap, and execution of account security initiatives spanning buyers, sellers, vendors, Amazon Business, Amazon Health, and Devices. Our vision is simple but ambitious: zero account takeovers and zero account lockouts. You'll drive that vision across four strategic layers — Proactive Threat Prevention, Account Strength & Assurance, Defense in Depth, and Trust Restoration — partnering with engineering, ML, and operations teams across multiple organizations to deliver customer-facing security outcomes at unprecedented scale. This is a high-visibility role with regular engagement at VP and Director level, and direct ownership of some of Amazon's most consequential security programs, including passkey adoption, agentic AI threat mitigation, and automated remediation. From Day 1, Product Managers are given ownership of large products, the autonomy to think strategically and make data driven decisions, and the ability to drive significant impact to the customer experience and the business. Over their careers, successful product managers will be exposed to multiple businesses/products, and pushed to grow into senior level general managers that independently run large business segments and organizations. This is a global role that will include interaction with teams in countries outside of the United States, requiring a strong ability to communicate effectively and understand the different needs of global customers. Your decisions are not only fundamental to the viability and attractiveness of our offering for Sellers, but they will in turn drive selection, revenue and growth of our overall business. Key job responsibilities - Own end-to-end product strategy and roadmap across the Account Security framework's four strategic layers: Proactive Threat Prevention, Account Strength & Assurance, Defense in Depth, and Trust Restoration - Lead cross-functional initiatives spanning Account Security, Core Identity, Customer Service, Amazon Business, and Devices — driving alignment and accountability across VP-level stakeholders - Define, track, and drive key metrics including ATO reduction, false positive sanitization rates, passkey adoption, account lockout reduction, and bot mitigation; own WBR and MBR reporting to Director+ leadership - Partner with engineering teams to define requirements for ML-based detection models, authentication frameworks (passkeys, 2SV, passwordless), and automated remediation workflows - Drive phishing-resistant authentication adoption, including passkey mandates for High Consequence Accounts and removal of weak authentication fallbacks - Develop strategy for detecting and mitigating unauthorized agentic AI traffic and evolving attack vectors - Author 6-pagers, PR/FAQs, and OP1 narratives; present to VP and Director-level leadership on program status and strategic decisions A day in the life No two days look the same on Account Security. You might start the morning reviewing a spike in credential stuffing attacks, working with partner teams to tighten detection thresholds before it impacts customers. By mid-morning you're in a cross-org sync aligning on sequencing for strengthening authentication controls across a high-risk customer segment. After lunch, you're drafting a 6-pager for a VP review on the agentic AI threat strategy — translating complex attack patterns into a clear investment narrative. Before the day ends, you're reviewing business metrics, flagging an anomaly in repeat ATO rates, and kicking off a deep dive with the data team. Every day you're operating at the intersection of security, product, and scale. About the team The Account Security team sits within Buyer Risk Prevention (BRP) under WW Customer & Partner Trust. We protect the full identity lifecycle — from account creation and sign-in to bot mitigation, impersonation scam prevention, and secure account recovery — across millions of customer accounts accounts. We combine machine learning, authentication innovation, and operational excellence to pursue a world of zero ATOs and zero lockouts. We believe prevention beats cure, automation beats manual process, and security and customer experience are not a tradeoff — they're both non-negotiable. Basic Qualifications: - Bachelor's degree - Experience owning/driving roadmap strategy and definition - Experience with feature delivery and tradeoffs of a product - Experience contributing to engineering discussions around technology decisions and strategy related to a product - Experience managing technical products or online services - Experience in representing and advocating for a variety of critical customers and stakeholders during executive-level prioritization and planning - Experience owning feature delivery and tradeoffs of a product - Experience with technologies like Hadoop, Rules based systems and Machine learning - Experience with concepts such as system architecture, optimization, system dynamics, system analysis, statistical analysis, reliability analysis, and decision making Preferred Qualifications: - Experience in building and driving adoption of new tools - Experience in using analytical tools, such as Tableau, Qlikview, QuickSight - Master's degree - Experience across the domain of risk management & fraud Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.", "summaryDescription" : "Sr. Product Manager - Tech, Account Integrity at ADCI. Skills: Account security, Product strategy, Roadmap execution. Own end-to-end product strategy and roadmap. Lead cross-functional initiatives", "postedDate" : "2026-06-13T19:16:39.169", "createdAt" : "2026-06-13T19:16:39.169", "lastUpdated" : "2026-06-15T02:13:26.836", "ingestTimestamp" : "2026-06-13T19:16:39.169", "mongoId" : "6a2176fe74d8ee00a0c1b7f3", "processingStatus" : "llm_updated", "llmProcessingStatus" : true, "sourceUrl" : "https://account.amazon.jobs/jobs/10436167/apply", "salaryBand" : "200k+", "hasSalary" : false, "allSkills" : [ "Account security", "Product strategy", "Roadmap execution", "System architecture", "System optimization", "System dynamics", "System analysis", "Statistical analysis", "Reliability analysis", "Decision making", "Roadmap strategy", "Feature delivery", "Buyer risk prevention", "Customer trust", "Identity lifecycle", "Bot mitigation", "Impersonation scam prevention", "Account recovery", "Machine learning", "Authentication innovation", "Risk management", "Fraud", "Tableau", "Qlikview", "QuickSight" ], "skillCount" : 25, "jobCategory" : "product", "jobSubcategory" : "product_management", "seniorityLevel" : "Senior", "dataQualityScore" : 1.0, "_score" : 420.09177, "daysOld" : 1, "hasLocation" : true, "hasGeo" : true, "llmIndustry" : "Technology", "llmIndustryConfidence" : 0.98 }, { "id" : "69f2d9bf4c40e2acd1890354", "title" : "Deputy Director Program Integrity", "company" : "MassHealth", "industry" : "Government", "salary" : { "min" : 155000.0, "max" : 210000.0, "currency" : "USD", "frequency" : "yearly", "is_estimated" : true, "estimation_basis" : "Market baseline data for a Director-level position in the Healthcare industry in Boston, adjusted for seniority and company size." }, "location" : "Massachusetts-Boston", "locations" : [ "Massachusetts-Boston", "Administrative Services", "Exec Office Of Health and Human Services, Full-time, Full-time" ], "timestamp" : "2026-06-15T22:09:16.434", "fingerprint" : "66cd7125c7b2d20ba252280d739e84c34b0c29400293b9cea74c3b9fd69817d5", "source" : "taleo", "language" : "en", "applyUrl" : "https://massanf.taleo.net/careersection/ex/jobdetail.ftl?job=1082655", "externalId" : "1082655", "industryFunction" : { }, "structuredLocations" : [ { "city" : "Boston", "state" : "Massachusetts", "country" : "United States", "continent" : "na", "source" : "llm", "workMode" : "hybrid", "geo" : "42.3588336,-71.0578303" } ], "locationText" : "Boston, Massachusetts, United States", "employmentType" : "FULL_TIME", "experienceLevel" : "Director", "remoteFriendly" : true, "workSiteFlexibility" : "Remote", "rawDescription" : "MassHealth is the Medicaid and CHIP plan for Massachusetts, providing access to healthcare services to approximately 2 million low-income and disabled residents of the Commonwealth. MassHealth is responsible for a ~$22 billion annual budget comprised of insurance premiums, payments for healthcare services, payments for pharmaceutical therapies, administrative expenses, and more. The Program Integrity Unit is a highly strategic function within MassHealth that sets the standard for financial stewardship. Program Integrity leads and coordinates efforts related to identifying, preventing and mitigating fraud, waste and abuse (FWA) across the MassHealth program and ensuring Commonwealth resources are utilized appropriately in support of MassHealth members. The team is led by the Director of Program Integrity, who reports to the Deputy Medicaid Director, and consists of 13 internal staff members and dozens of contractors ($50M+ in annual contract value). MassHealth currently works in a hybrid in-person and virtual environment, with headquarters located in downtown Boston. MassHealth is seeking qualified applicants for the position of Deputy Director of Program Integrity . Reporting to the Director of Program Integrity, the Deputy Director will play a vital role in the design and alignment of program integrity strategic priorities and directly manage projects with high visibility and significant policy and financial impact. The Deputy Director will be expected to maintain a broad strategic view across program integrity teams and build strong relationships across the MassHealth functional areas, across EOHHS, and with interagency partners, in order to influence outcomes and maintain momentum of initiatives. In this role, the Deputy Director will convene cross-functional teams including representatives from program teams, policy, strategy, and legal to execute key strategic initiatives . The Deputy Director will also manage MassHealth program integrity external communications including developing inputs for formal responses to external stakeholders. The Deputy Director will also support the Director in achieving operational excellence across the program integrity unit. The Deputy Director will help lead the development of professional development initiatives for staff and support the Director in hiring and recruitment efforts. The Deputy Director will provide project management support on key projects on behalf of the Director, including procurements and other priority initiatives. Finally, the Deputy Director will be responsible for measuring success across the Program Integrity Unit both in terms of financial savings as well as operational measures that demonstrate effectiveness and efficiency of program integrity processes. Program integrity is a top priority for MassHealth and EOHHS, and this role will drive key initiatives that directly serve that priority; as a result, the Deputy Director will have regular exposure to MassHealth and EOHHS senior leadership. Duties and Responsibilities (these duties are a general summary and not all inclusive): Provide thoughtful leadership, direction and execution for cross-functional, organization-wide strategic program integrity projects; convene key stakeholders and help drive decisions and/or successful execution; identify opportunities to engage with other agencies/external stakeholders and cultivate collaborative processes. Lead special projects, time-sensitive requests from leadership, and provide general support and back up to the Program Integrity Director as directed. Build operational excellence, including development, maintenance, and implementation of work plans and standard operating procedures for key program integrity initiatives. Manage internal and external communications directing development and/or draft materials for external communication including reports, talking points, and presentations, in collaboration with other program integrity and MassHealth colleagues. Maintain existing financial savings tracking processes and develop new metrics to measure program integrity operational effectiveness. Support recruitment of staff and the hiring process and lead efforts to identify opportunities for staff development within Program Integrity. Develop formal and informal opportunities for skill-building and collaborative learning. Preferred Qualifications : Excellent analytical and problem-solving skills. Excellent MS Excel and PowerPoint skills. Excellent communication skills. Entrepreneurial mindset; ability to identify opportunities and develop solutions with minimal guidance. Experience analyzing large data sets and/or overseeing analytics teams. Ability to work effectively under high pressure and tight deadlines. Ability to provide structure and process management to projects. Strong interpersonal skills. Experience in healthcare strongly preferred. Knowledge of CMS and MassHealth regulations, preferred. Experience with claims data or other related analytical experience strongly preferred. Demonstrated performance in strategic planning and analysis. Experience leading high-profile projects and processes with accountability to senior leadership. About MassHealth: The mission of MassHealth is to improve the health outcomes of our diverse members and their families by providing access to integrated health care services that promote sustainable & equitable health, well-being, independence and quality of life. For more information about our agency and programs please visit: https://www.mass.gov/orgs/masshealth To Apply: Please upload both Resume and Cover Letter for this position when applying. First consideration will be given to those applicants that apply within the first 14 days. Pre-Offer Process: A criminal background check will be completed on the recommended candidate as required by the regulations set forth by the Executive Office of Health and Human Services prior to the candidate being hired. For more information, please visit http://www.mass.gov/hhs/cori Education, licensure and certifications will be verified in accordance with the Human Resources Division’s Hiring Guidelines. Education and license/certification information provided by the selected candidate(s) is subject to the Massachusetts Public Records Law and may be published on the Commonwealth’s website. ADA Reasonable Accommodation: If you require a reasonable accommodation with the application/interview process, please contact us at: EOHHS Candidate ADA Requests For questions, please contact the Office of Human Resources at 1-800-510-4122 and select option #4. MINIMUM ENTRANCE REQUIREMENTS: Applicants must have at least (A) six (6) years of full-time or, equivalent part-time, professional, administrative, supervisory, or managerial experience in business administration, business management, public administration, public management, clinical administration or clinical management of which (B) at least two (2) years must have been in a project management, supervisory or managerial capacity or (C) any equivalent combination of the required experience and substitutions below. Substitutions: I. A certificate in a relevant or related field may be substituted for one (1) year of the required (A) experience. II. A Bachelor's degree in a related field may be substituted for two (2) years of the required (A) experience. III. A Graduate degree in a related field may be substituted for three (3) years of the required (A) experience. IV. A Doctorate degree in a related field may be substituted for four (4) years of the required (A) experience. Salary placement is determined by a combination of factors, including the candidate’s years of directly related experience and education, and alignment with our internal compensation structure as set forth by the Human Resources Division’s Hiring Guidelines. For all bargaining unit positions (non-management), compensation is subject to the salary provisions outlined in the applicable collective bargaining agreement and will apply to placement within the appropriate salary range. Comprehensive Benefits When you embark on a career with the Commonwealth, you are offered an outstanding suite of employee benefits that add to the overall value of your compensation package. We take pride in providing a work experience that supports you, your loved ones, and your future. Want the specifics? Explore our Employee Benefits and Rewards! An Equal Opportunity / Affirmative Action Employer. Females, minorities, veterans, and persons with disabilities are strongly encouraged to apply. The Commonwealth is an Equal Opportunity Employer and does not discriminate on the basis of race, religion, color, sex, gender identity or expression, sexual orientation, age, disability, national origin, veteran status, or any other basis covered by appropriate law. Research suggests that qualified women, Black, Indigenous, and Persons of Color (BIPOC) may self-select out of opportunities if they don't meet 100% of the job requirements. We encourage individuals who believe they have the skills necessary to thrive to apply for this role. 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Traffic Signal Apprentice

Senior Traffic Signal Technician/ Integrator

Senior Signal Processing Engineer

ITS Traffic Signal Technician/ Integrator (New England)

Revenue Integrity Specialist

Signal Integrity Engineer

Traffic / ITS Signal Technician

Signal Integrity Engineer

Signal Integrity Engineer

Signal Integrity Engineer

Signal Integrity Engineer

Applied Scientist, Account Integrity, Account Integrity

Senior Data Integrity Engineer

System Development Eng, PCIe, AWS PCIe and Signal Integrity Team

Senior Signal and Power Integrity Engineer

Sr. Thermal Scientist/Engineer, Product Integrity, Hardware - Product Integrity

ITS Analyst I- Traffic Signal Crew

Signal Integrity Engineer - MTS

Signal Integrity Engineer

Signal Integrity Engineer

Signal Integrity Engineer

Signal Integrity Engineer

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Signal Timing Engineer (Transportation Engineer) III, IV, or V: Traffic Signal Crew (Austin District)

Senior Signal Integrity / Power Integrity (SI/PI) Engineer

Sr. Manager, Integrated Campaigns and ABX

Integration Engineer

Sr. Business Analyst, Account Integrity

Signal Integrity Engineer

Integration Engineer

Signal and Power Integrity Lab Engineer

RF Integration Team Lead

Data Center Technician, Global Signals Operations

Senior Signal and Power Integrity Engineer

Sr. Product Manager - Tech, Account Integrity

Deputy Director Program Integrity

Common Questions