VerificationEngineer(f/m/d)

About the Role We are looking for a passionate and driven Design Verification Engineer to join our hardware development team. This is an exciting opportunity to work on cutting-edge digital and mixed-signal designs and learn from experienced engineers in a collaborative and innovative environment. You will contribute to the verification of complex ASIC systems and gain hands-on experience with industry-standard tools and methodologies. Responsibilities Assist in developing and executing verification plans for digital and mixed-signal ASIC designs. * Support the creation of testbenches and test cases using SystemVerilog and UVM. * Run simulations and perform debugging to identify and resolve design issues. * Collaborate with design and verification teams to understand specifications and contribute to verification strategies. * Document verification results and contribute to coverage analysis and regression testing. Learn and apply best practices in design verification and contribute to process improvements ## Qualifications Qualifications Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related discipline. * 2-5 years relevant experience in design or mixed-signal verification. * Strong understanding of digital logic design. * Familiarity with HDL languages (e.g., System Verilog, Verilog, VHDL) and simulation tools. * Exposure to scripting languages (e.g., Python, Perl, Tcl) is a plus. * Excellent analytical and problem-solving skills. * Strong communication skills and a willingness to learn in a team-oriented environment. * Internship or academic project experience in ASIC/FPGA design or verification. * Knowledge of SystemVerilog and UVM methodology. * Exposure to version control systems (e.g., Git) and Linux-based development environments. ## Additional Information Renesas is an embedded semiconductor solution provider driven by its Purpose ‘To Make Our Lives Easier.’ As the industry’s leading expert in embedded processing with unm