Silvaco
Semiconductor
TestChipDesigner
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“Test Chip Designer at Silvaco. Skills: Test chip design, Silicon validation, IC implementation. Define test chip architecture. Define floorplan”
What You'll Achieve.
Determine IP quality; Determine IP accuracy; Determine competitive positioning; Shape silicon strategy
Industry & Context.
Root-cause analysis
What They're Looking For.
Must Have
BS, MS, or PhD in EE/CE, 5+ years industry experience, 1 full test chip concept to report, Experience designing test chips, Working knowledge of standard cell architecture, Familiarity with memory compiler architecture, Hands-on digital implementation flow, Proficiency with EDA tools, Experience with DFT methodologies, Experience developing ATE programs, Scripting skills in TCL, Python, Perl, Comfort with Linux environments, Ability to author silicon reports, Present technical results to stakeholders
Nice to Have
Experience with advanced process nodes, Experience with specialty nodes, Background with multiple foundries, Experience correlating silicon measurements, Prior leadership of test chip programs, Experience interfacing with foundry partners, Experience interfacing with semiconductor customers
What You'll Do.
Define test chip architecture
Define silicon experiment plan
Characterize standard cell libraries
Characterize memory compilers
Select test structures
Design test structures
Specify cell coverage
Specify drive strengths
Specify threshold flavors
Specify memory configurations
Validate library timing
Validate library power
Validate library noise
Validate library yield models
Develop test chip specifications
Develop block diagrams
Develop interface protocols
Own physical implementation
Perform floorplanning
Perform power planning
Perform place and route
Perform clock tree synthesis
Perform timing closure
Integrate standard cells
Integrate memory instances
Resolve cross-functional issues
Run parasitic extraction
Run physical verification
Work with foundry PDKs
Interface with foundry
Implement DFT strategy
Implement boundary scan
Implement on-chip clocking
Implement observability hooks
Lead first silicon bring-up
Validate functionality
Establish measurement environment
Coordinate with product engineering
Coordinate with lab technicians
Coordinate with external test houses
Analyze silicon measurements
Correlate timing data
Correlate leakage data
Correlate Vmin/Vmax data
Identify model-to-silicon discrepancies
Drive root-cause analysis
Author formal silicon report
Document measurement results
Document recommendations
Present findings to stakeholders
Own test chip schedule
Own test chip risk register
Coordinate across design teams
Coordinate across CAD teams
Coordinate across library teams
Coordinate across memory teams
Coordinate across project management teams
Coordinate across foundry teams
Mentor junior engineers
Contribute to methodology development
Contribute to reusable IP development
How You'll Work.
Team & Collaboration
Partnering with library development; Partnering with memory compiler; Partnering with characterization; Partnering with product engineering; Cross-functional issues; Coordinate across teams
Communication Scope
Present technical results; Present findings
Process & Methodology
Schedule management, Budget management, Risk management
Full Job Description
Mixel, a Silvaco Company, is an innovator of high-performance analog mixed signal semiconductor IPs whose solutions are powering Mobile, Display, Camera, Automotive, VR, AR and AI applications. Our mission is to provide our customers and partners with outstanding mixed-signal, silicon-proven IPs, creating in the process a differentiating technology that sets your products apart. At Mixel, you will find an inspiring environment with a strong focus on technical innovation, people well-being, no layers of management, and the freedom to make meaningful contributions in a setting that encourages creative thinking. We value open communication, empathy, mutual trust, and respect. Design Engineer Standard Cell & Memory Compiler Characterization Silicon About the Role Silvaco/Mixel is seeking a Test Chip Designer to lead the end-to-end design, fabrication, and silicon validation of test vehicles used to characterize and qualify our standard cell libraries and memory compilers. In this role, you will own the test chip from architecture through tapeout, bring-up, and final silicon report — partnering closely with library development, memory compiler, characterization, and product engineering teams. Your test chips will directly determine the quality, accuracy, and competitive positioning of the IP we deliver to leading semiconductor customers worldwide. This is a high-impact, full-lifecycle hardware role for an engineer who enjoys both architecting silicon experiments. If you have built test chips for foundation IP and want to see your work shape the silicon strategy of a fast-growing EDA and IP company, we want to talk to you. Key Responsibilities Test Chip Architecture & Design * Define the overall test chip architecture, floorplan, and silicon experiment plan to fully characterize standard cell libraries and/or memory compilers across PVT corners, aging effects, and process variation. * Select and design appropriate on-chip test structures, including ring oscillators, FO1/F
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