Sandisk
Semiconductor
Technologist,ASICDevelopmentEngineering(STA,Sign-Off)
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“Technologist, ASIC Development Engineering (STA, Sign-Off) at Sandisk. Skills: Static Timing Analysis (STA), Timing Signoff, STA Methodology and Standards, Leadership. Lead a team of talented STA engineers. Observe complete ownership of ASIC timing signoff”
What You'll Achieve.
Delivering excellence in timing closure for complex semiconductor designs; Consistent, scalable timing closure across all ASIC projects and process nodes; Meet the timing closure requirements of complex IC designs; Optimal timing performance; Improve overall design performance
Industry & Context.
Identify critical paths; Develop strategies to mitigate timing violations and improve overall design performance
What They're Looking For.
Must Have
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, A minimum of 13 years of experience in Static Timing Analysis, Proven leadership experience managing and developing STA engineering teams, Demonstrated track record of complete timing signoff ownership on multiple successful tape-outs in advanced process nodes, Expert-level knowledge of industry-standard STA tools (Synopsys PrimeTime, Cadence Tempus, etc.), Deep understanding of advanced timing concepts: MMMC, OCV, AOCV, POCV, SI analysis, power-aware timing, scripting expertise (TCL, Python, Perl) and experience with automation frameworks, Exceptional leadership and people management skills with ability to build and scale high-performing teams, Excellent communication and influence skills with ability to engage at all organizational levels, A proactive, results-oriented mindset with a passion for innovation and continuous improvement
Nice to Have
Experience with advanced process nodes (e.g. 5nm, 3nm)
What You'll Do.
Lead a team of talented STA engineers
Observe complete ownership of ASIC timing signoff
Foster technical growth
Build a high-performing organization capable of delivering excellence in timing closure for complex semiconductor designs
Architect and define organization-wide STA methodology and standards
Establish best practices
Work with IP & Design team for Timing constraints Development & Review activities
Develop and implement advanced STA methodologies and strategies
Conduct thorough timing analysis
Identify critical paths
Develop strategies to mitigate timing violations and improve overall design performance
Stay abreast of industry trends and emerging technologies in STA and related fields
Incorporate best practices into the team’s workflow
Prepare and present detailed timing reports and technical documentation to stakeholders
How You'll Work.
Team & Collaboration
Guiding a team of talented engineers; Proven leadership in cross-functional collaboration; Collaborate with cross-functional teams, including design, verification, physical design, and DFT, to ensure seamless integration and optimal timing performance; Engage at all organizational levels
Communication Scope
Excellent communication and influence skills; Ability to engage at all organizational levels; Prepare and present detailed timing reports and technical documentation to stakeholders
Full Job Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Position Overview: We are seeking an exceptionally skilled and strategic Technologist for our Static Timing Analysis (STA) function. The successful candidate will serve as a technical leader and subject matter expert, guiding a team of talented engineers and driving innovation in timing closure methodologies for our most complex semiconductor designs. This role demands deep expertise in STA, proven leadership in cross-functional collaboration, architectural thinking, and the ability to influence technical direction across multiple projects and organizations. Key Responsibilities: - Lead a team of talented STA engineers , observe complete ownership of ASIC timing signoff across , fostering technical growth, and building a high-performing organization capable of delivering excellence in timing closure for complex semiconductor designs. - Architect and define organization-wide STA metho
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