Sandisk

Semiconductor

Technologist,ASICDevelopmentEngineering(STA,Sign-Off)

Bengaluru, India FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for mid candidates.

The Brief

“Technologist, ASIC Development Engineering (STA, Sign-Off) at Sandisk. Skills: Static Timing Analysis, ASIC timing signoff, Leadership. Lead STA engineers. Own ASIC timing signoff”

What You'll Achieve.

Deliver excellence in timing closure; Meet timing closure requirements; Optimal timing performance

Industry & Context.

Semiconductor
Problems you'll solve

Mitigate timing violations; Improve overall design performance

What They're Looking For.

Must Have

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, 13 years of experience in Static Timing Analysis, Proven leadership experience managing and developing STA engineering teams, Complete timing signoff ownership on multiple successful tape-outs in advanced process nodes, Expert-level knowledge of industry-standard STA tools (Synopsys PrimeTime, Cadence Tempus, etc.), Deep understanding of advanced timing concepts: MMMC, OCV, AOCV, POCV, SI analysis, power-aware timing, Scripting expertise (TCL, Python, Perl) and experience with automation frameworks, Exceptional leadership and people management skills, Excellent communication and influence skills

Nice to Have

Experience with advanced process nodes (e.g. 5nm, 3nm)

What You'll Do.

Own ASIC timing signoff

Develop STA methodology and standards

Develop and implement advanced STA methodologies

Conduct timing analysis

Prepare and present timing reports

How You'll Work.

Team & Collaboration

Collaborate with cross-functional teams; Engage at all organizational levels

Communication Scope

Communication skills; Influence skills

Full Job Description

Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Position Overview: We are seeking an exceptionally skilled and strategic Technologist for our Static Timing Analysis (STA) function. The successful candidate will serve as a technical leader and subject matter expert, guiding a team of talented engineers and driving innovation in timing closure methodologies for our most complex semiconductor designs. This role demands deep expertise in STA, proven leadership in cross-functional collaboration, architectural thinking, and the ability to influence technical direction across multiple projects and organizations. Key Responsibilities: - Lead a team of talented STA engineers , observe complete ownership of ASIC timing signoff across , fostering technical growth, and building a high-performing organization capable of delivering excellence in timing closure for complex semiconductor designs. - Architect and define organization-wide STA metho

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