HP
SystemsArchitect:MemoryWallExploration
Neural analysis suggests this role is
optimal for Mid+ candidates.
“Systems Architect: Memory Wall Exploration at HP. Skills: Memory hierarchy, Data movement, AI workloads, Platform architecture. Analyze AI workload interaction with system resources. Evaluate memory bandwidth, latency, contention, and data movement”
What You'll Achieve.
Improve AI experience predictability; Connect technical constraints to product decisions
Industry & Context.
Performance analysis; Identify performance bottlenecks; Troubleshoot performance degradation
What They're Looking For.
Must Have
M. Sc. in Computer Engineering, Electrical Engineering, or related discipline, Systems performance, platform architecture, or runtime behavior background, Solid understanding of memory hierarchy and data movement, Knowledge of computer architecture, memory hierarchy, interconnect protocols, and memory controllers, Experience with Machine Learning hardware acceleration and PIM techniques, Knowledge of low-power design, Experience working with heterogeneous compute environments, Ability to translate low-level technical constraints into system-level guidance and platform strategy, Experience collaborating across hardware, software, and product organizations, Technical communication skills, including engagement with external partners
Nice to Have
Client platforms experience, On-device AI inference workloads experience, Power- and performance-sensitive system design experience, Performance analysis tools, telemetry, and data-driven evaluation experience, Prior experience engaging with memory or silicon vendors, Proficiency in C/C++ and scripting languages (Python) for modeling and analysis, Experience with architectural simulators (e.g., GEM5, Sniper) and performance analysis
What You'll Do.
Analyze AI workload interaction with system resources
Evaluate memory bandwidth
Characterize workload behavior in shared-memory systems
Identify sources of performance variability
Overcome processor speed vs. memory bandwidth bottleneck
Optimize data movement between CPUs
Translate memory and system constraints into actionable guidance
Define execution envelopes and tradeoffs
Contribute to platform-level strategy
Connect technical constraints to user experience outcomes
Work closely with platform architecture
Engage with external ecosystem partners
Understand platform capabilities
and roadmap directions
Evaluate how memory technologies affect AI experiences
Translate partner insights into HP-specific system guidance
Support technical alignment discussions
Assist in defining internal tools
Contribute to documentation
and internal frameworks
Help scale AI experiences across diverse portfolio
How You'll Work.
Team & Collaboration
Internal teams; External partners; Memory vendors; Silicon vendors; Platform architecture teams; Runtime teams; Power/thermal teams; AI enablement teams
Communication Scope
Technical communication; External partner engagement
Full Job Description
Systems Architect: Memory Wall Exploration **Description -** **Job Summary:** The **Systems Architect: Memory Wall Exploration** focuses on understanding how AI execution interacts with platform resources, particularly memory hierarchy, data movement, and shared-memory behavior across heterogeneous compute environments (CPU, GPU, AI accelerators). The architect will engage with internal teams and external partners (including memory and silicon vendors) to translate low-level technical characteristics into system-level guidance and platform strategy for HP. ## **Key Responsibilities** **Platform Performance & Memory Analysis** * Analyze how AI workloads interact with system resources across CPU, GPU, and AI accelerators * Evaluate the impact of **memory bandwidth, latency, contention, and data movement** on workload performance, responsiveness, and power efficiency * Characterize workload behavior in **shared-memory systems** , including interactions between foreground and background activity * Identify sources of performance variability and experience degradation under real-world multitasking scenarios. * Overcome the performance bottleneck where processor speeds outpace memory bandwidth, focusing on optimizing data movement between CPUs, GPUs, and memory (DRAM, HBM, CXL). ### **System-Level Guidance & Strategy** * Translate memory and system-level constraints into **actionable guidance** for platform architecture, runtime, power, and performance teams * Help define execution envelopes and tradeoffs (e.g., placement, concurrency limits, configuration sensitivity) that improve AI experience predictability * Contribute to **platform-level strategy** by connecting technical constraints to user experience outcomes and product decisions **Cross-Functional & Ecosystem Collaboration** * Work closely with platform architecture, runtime, power/thermal, and AI enablement teams within HP * **Engage with external ecosystem partners** , including memory and silicon vendors, to:
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