NVIDIA
Technology
StaffSystemSoftwareEngineer,RTL-to-GDSFlowPlatform
Neural analysis suggests this role is
optimal for Senior candidates.
“Staff System Software Engineer, RTL-to-GDS Flow Platform at NVIDIA. Skills: RTL-to-GDS flow, Workflow infrastructure, EDA automation. Build and modernize production RTL-to-GDS flow infrastructure. Extend YAML/configuration systems”
Industry & Context.
Debug failures; Troubleshoot issues
What They're Looking For.
Must Have
B. S. or M. S. in CS, EE, CE, 12+ years building, modernizing, or operating production EDA, VLSI CAD, RTL-to-GDS, physical design, or large engineering workflow systems, hands-on experience with RTL-to-GDS or implementation flows, Tcl and Make experience in real EDA automation environments, practical software engineering skill in Python, Perl, Go, or C++, Ability to reason about layered configuration, Excellent Linux debugging fundamentals, track record of improving legacy production systems
Nice to Have
Background with production flows using commercial synthesis, place-and-route, timing, extraction, DRC/LVS, power, or signoff tools, Experience designing workflow engines, Experience with distributed schedulers, Experience with NFS-heavy shared filesystems, Experience building structured checks
What You'll Do.
Build and modernize production RTL-to-GDS flow infrastructure
Extend YAML/configuration systems
Build faster prelaunch and in-run checks
Develop job-control and observability capabilities
Partner with design and CAD users to debug
How You'll Work.
Team & Collaboration
Partner with design and CAD users
Full Job Description
The VLSI Productivity and Infrastructure team supports 1000+ chip design engineers with strong automation and workflows necessary to create world-changing silicon. We are building the next generation of production semiconductor design-flow infrastructure: a control-plane-driven RTL-to-GDS platform that turns design intent, configuration, generated collateral, EDA tool execution, distributed jobs, validation checks, and shared project state into observable, repeatable implementation workflows. This role is for a senior flow/platform engineer who can work across synthesis, physical design, timing, signoff, ECO, and hierarchical execution. If you can envision and evolve legacy Tcl/Make/Perl/YAML infrastructure into a cleaner, more structured system while keeping active projects running, this role is for you! **What You 'll Be Doing:** * Build and modernize production RTL-to-GDS flow infrastructure across synthesis, place-and-route, timing, signoff, ECO, and handoff workflows * Extend YAML/configuration systems to model workflow intent, stage contracts, validation markers, generated artifacts, override order, and backward-compatible project behavior * Improve Make, Perl, Tcl, Python, and related launch infrastructure for generated runsets, EDA tool setup, distributed execution, status tracking, and failure diagnosis * Build faster prelaunch and in-run checks for missing inputs, stale generated files, invalid hooks, broken environment setup, bad constraints, and inconsistent design state * Develop job-control and observability capabilities for hierarchical and internally launched workflows, including parent-child job attachment, logs, provenance, and structured status * Partner with design and CAD users to debug failures across EDA tools, Linux environments, shared filesystems, schedulers, generated collateral, and configuration layers **What We Need To See:** * B.S. or M.S. in CS, EE, CE, or equivalent experience * 12+ years building, modernizing, or operating productio
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