Analog Devices, Inc.
semiconductor
StaffSynthesis&STAEngineer
“Staff Synthesis & STA Engineer at Analog Devices, Inc.. Skills: Digital Synthesis, STA, Timing constraints, Flow automation. Lead Synthesis & STA for complex ICs. Develop timing constraints”
What You'll Achieve.
Achieve timing closure; Resolve timing and/or timing-DRC issues
Industry & Context.
Root cause of timing violations issues; Suggest solutions for timing violations
Required travel: 10%, Export licensing review process may apply
What They're Looking For.
Must Have
Digital Synthesis, DFT insertion, Check Design, Check Timing Analysis, Liberty models, IP/subsystem/full-chip timing constraints, Synthesis, STA, LEC and PD tools, Timing violations analysis, STA and Signoff of complex high speed SoC designs, cutting edge process technologies (16nm and below), Timing ECOs, Scan/DFT modes, Leakage and Dynamic power optimization, Synthesis/STA of 4+ successful tapeouts, RTL to GDS, tcl/perl/python scripts, automation on timing analysis tools, Flow enhancements, Floor-planning, Placement, CTS, Routing, Extraction, Physical Verification, EM/IR flows, Signoff checks
Nice to Have
Floor-planning, Placement, CTS, Routing, Extraction, Physical Verification, EM/IR flows, Signoff checks
What You'll Do.
Lead Synthesis & STA for complex ICs
Develop timing constraints
Perform RTL to Netlist logical equivalence check
Setup and optimize STA flow
Automate flows using TCL/Perl/Python
Support physical design flows
How You'll Work.
Team & Collaboration
Cross-functional collaboration; Work with designers on timing constraints; Guide small technical teams
Communication Scope
Good communication skills
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