StaffSoCPhysicalVerificationEngineer,HBM

**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Physical Verification Engineer, you will be a key technical contributor within the Heterogeneous Integration Group (HIG), responsible for defining, executing, and driving sign-off quality physical verification flows for next‑generation HBM logic die and memory‑centric SoCs. You will work across physical design, design rule development, EDA tool teams, foundry interfaces, and product engineering teams to deliver industry‑leading, tape-out-ready silicon under aggressive schedule, quality, and reliability constraints. This role combines full-chip physical verification ownership — including DRC, LVS, ERC, and DFM — with deep collaboration across implementation and silicon bring‑up, ensuring design integrity from layout through first silicon. ### Responsibilities will include, but are not limited to: * Lead end‑to‑end physical verification sign‑off for full‑chip and hierarchical designs, including Design Rule Check (DRC), Layout Versus Schematic (LVS), Electrical Rule Check (ERC), Physical Electrical Rule Check (PERC), antenna checking, and Design for Manufacturability (DFM). * Execute and debug foundry‑qualified rule decks, manage waivers, and drive clean closure while ensuring compliance with advanced‑node foundry requirements. * Perform reliability verification across multiple power domains, including electrostatic discharge (ESD), latch‑up, electromigration, floating nets, and connectivity checks. * Run density, metal fill, and chemical mechanical polishing (CMP) checks to ensure yield‑aware manufacturability at 3 nanometer and below. * Perform parasitic resistance‑capacitance (RC) extraction and support correlation of physical verification results with post‑