Micron Technology
Semiconductor
StaffLayoutEngineer,DDEG
Neural analysis suggests this role is
optimal for Mid+ candidates.
“Staff Layout Engineer, DDEG at Micron Technology. Skills: Layout design, Layout verification, Semiconductor processes. Translate schematics into manufacturable layouts. Meet design intent”
What You'll Achieve.
Ensure predictable delivery; Ensure on-time delivery; Drive measurable productivity gains
Industry & Context.
Problem-solving; Root cause analysis
What They're Looking For.
Must Have
Bachelor's Degree or equivalent experience, Familiarity in layout tools, Familiarity with Cadence Virtuoso VXL, Familiarity with Calibre for DRC/LVS/Verifications, Exposure to semiconductor custom/memory/analog layout, Solid understanding of CMOS processes, Solid understanding of design rules, Solid understanding of layout-dependent effects, Proven problem-solving in ambiguity, High attention to detail, High attention to quality
Nice to Have
3+ years semiconductor layout experience, Demonstrated block/project leadership, Mentoring experience, Schedule management experience, DRAM/LPDDR/HBM memory product layout background, Scripting (SKILL, Python) experience, Experience building methodology/automation, Excellent written documentation abilities
What You'll Do.
Translate schematics into manufacturable layouts
Meet schedule commitments
Floorplan custom digital circuits
Implement custom digital circuits
Verify custom digital circuits
Floorplan memory circuits
Implement memory circuits
Verify memory circuits
Floorplan analog circuits
Implement analog circuits
Verify analog circuits
Improve documentation
Develop layouts for critical circuits
Ensure predictable delivery
Ensure on-time delivery
Create layout designs
Ensure compliance with process rules
Ensure compliance with schematic intent
Deliver solutions from floorplan
Perform verification tasks
Perform quality checks
Improve verification tools
Improve verification methodologies
Ensure high-quality layouts
Codify prototype solutions into guides
Codify prototype solutions into SOPs
Share solutions with team
Contribute layout method improvements
Drive productivity gains
Integrate automated layout solutions
Coordinate with global partners
Meet predictable schedules
Support tapeout processes
Support mask generation processes
Deliver block-level layouts
Maintain quality standards
Coordinate priorities
Provide guidance to engineers
Ensure schedule alignment
How You'll Work.
Team & Collaboration
Work with Design teams; Work with Process Integration teams; Work with CAD teams; Coordinate with global partners; Collaborate across global teams; Collaborate across multi-functional teams
Process & Methodology
Project management, Schedule management
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Layout Engineer in DDEG, you will translate schematics into manufacturable layouts that meet design intent, process rules, and schedule commitments for advanced DRAM. You’ll work closely with Design, Process Integration, and CAD teams to floorplan, implement, and verify custom digital, memory, and analog circuits – and help us continuously improve methods, automation, and documentation so others can follow. You will play a crucial role in developing layouts for critical custom, memory, analog, or standard cell circuits, ensuring predictable, on‑time delivery of memory designs. **Responsibilities:** * Design and Development: Create layout designs for critical circuits, ensuring compliance with process rules and schematic intent. Work closely with Design, Process, and CAD engineers to deliver solutions from floorplan through final design. * Layout Verification: Perform verification tasks such as LVS (Layout vs. Schematic), DRC (Design Rule Check), and quality checks. Continuously improve verification tools and methodologies to ensure high‑quality layouts. * Methods, Automation & Documentation: Tackle ambiguous problems; prototype solutions without a playbook; then codify them into guides/SOPs and share with the team. Contribute scripts (e.g., SKILL/Python) and layout method improvements to advance automation and drive measurable productivity gains. Integrate automated layout solutions to shape the future of layout design. * On‑Time Delivery: Coordinate with global partners to meet predictable schedules and support tapeout/mask generation processes. Deliver block‑level layouts within specified timelines while maintaining quality standards. * Project Management:
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