Micron Technology

Technology

StaffEngineer:PhysicalDesign

₹35–55L ~AI est. Hyderabad, India FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Staff Engineer: Physical Design at Micron Technology. Skills: Physical Design, RTL design, PnR flow. Design digital blocks. Define interface requirements”

What You'll Achieve.

Streamline workflows; Enhance design efficiency; Achieve competitive PPAC

Industry & Context.

Technology
Problems you'll solve

Timing closure; Debug

What They're Looking For.

Must Have

Bachelor's or Master's degree in Electrical/ Electronics Engineering, Computer Engineering, or equivalent, 6+ years of experience in RTL design and PnR flow

Nice to Have

Power Analysis: ANSYS RedHawk / Totem proficiency preferred

What You'll Do.

Design digital blocks

Define interface requirements

Define behavior requirements

Define functional requirements

Participate in logic synthesis

Participate in timing constraint development

Participate in Place & Route

Support RTL-to-GDS block-level workflow

Implement designs following guidelines

Perform functional verification

Perform gate-level verification

Perform equivalence checking

Collaborate with block owners

Collaborate with integration teams

Support silicon bring-up

Support post-silicon validation

Support setup of semicustom design flows

Improve semicustom design flows

Develop scripting environments

Maintain scripting environments

Prepare technical documentation

Maintain technical documentation

How You'll Work.

Team & Collaboration

Block owners; Integration teams

Full Job Description

**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. **Key Responsibilities** **Design & Implementation ** * Design digital blocks such as control logic, BIST, and DfT using semicustom methodologies. * Define interface, behavior, and functional requirements for digital blocks. * Participate in logic synthesis, timing constraint development, and Place & Route (P&R). * Support RTL-to-GDS block-level workflow, including placement, CTS, routing, and timing closure. * Implement designs following digital & characterization-friendly design guidelines. **Verification & Validation** * Perform functional and gate-level verification, including equivalence checking. * Develop testbenches for behavioral and synthesizable designs. * Collaborate with block owners and integration teams to ensure full-chip integration. * Support silicon bring-up, post-silicon validation and debug. **Flow & Methodology ** * Support the setup and continuous improvement of semicustom design flows. * Develop and maintain semicustom scripting environments for competitive PPAC across all DRAM products. * Prepare and maintain technical documentation. * Use AI-driven tools to streamline workflows and enhance design efficiency. **Required Qualifications** **Education** * Bachelor's or Master's degree in Electrical/ Electonics Engineering, Computer Engineering, or equivalent. **Experience** * 6+ years of experience in RTL design and PnR flow. **EDA Tools proficiency :** **Synthesis:** Synopsys Fusion Compiler / Design Compiler **STA** : Synopsys PrimeTime **Simulation** : Cadence Xcelium / NCSim / Synopsys VCS **PnR** : Synopsys ICC2 **Equivalence Check** : Synopsys Formality **Power Analysis** : ANSYS RedHawk / Totem (preferred) **Technical Skills** * Exper

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