Analog Devices
Semiconductor
StaffEngineer–DFTEngineering
Neural analysis suggests this role is
optimal for Senior candidates.
“Staff Engineer – DFT Engineering at Analog Devices. Skills: Design for Testability, DFT, ATPG, MBIST. Collaborate with design team. Design DFT features”
Industry & Context.
Problem-solving skills
10% travel
What They're Looking For.
Must Have
7-10 years of hands-on experience in DFT methodologies, Knowledge of LBIST, ATPG, DFT DRC, Scan compression, Low power DFT Techniques, MBIST, Boundary Scan, Analog DFT, JTAG Architecture, DFT STA Constraint development, Hand-on experience/expertise in Cadence/Siemen’s DFT EDA tools, Proficiency in scripting languages such as Perl, Tcl, and/or Python, Solid understanding of digital design fundamentals, Solid understanding of RTL coding, Solid understanding of Lint/CDC, Solid understanding of Low Power Checks, Solid understanding of ASIC design flow
Nice to Have
Master's degree in Electrical/Electronic Engineering
What You'll Do.
Collaborate with design team
Implement scan chains
Implement compression
Implement built-in self-test structures
Conduct DFT DRC checks
Utilize Cadence/Siemen’s DFT tool
Optimize testability metrics
Generate manufacturing ATPG test patterns
Validation of DFT structures
Validation of DFT patterns
Work with verification team
Define DFT verification plans
Implement DFT verification plans
Work with physical design team
Analyze test failures
Provide guidance to junior DFT engineers
Mentorship to junior DFT engineers
How You'll Work.
Team & Collaboration
Design team; Verification team; Physical design team; Test engineering team
Full Job Description
**About Analog Devices** Analog Devices, Inc. (NASDAQ: [_ADI_](https://finance.yahoo.com/quote/ADI/?ltr=1)) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at [_www.analog.com_](https://www.analog.com/en.html) and on [_LinkedIn_](https://www.linkedin.com/company/analog-devices) and [_X_](https://x.com/ADI_News). **Job Description:** We are seeking a skilled and experienced DFT Engineer to join our VLSI design team. The ideal candidate should have a strong background in Design for Testability (DFT) techniques, including LBIST (Logic Built-In Self-Test), ATPG (Automatic Test Pattern Generation), DFT DRC (Design Rule Checking), MBIST (Memory Built-in Sefl-Test), Boundary Scan, JTAG and Analog/Phy DFT. **Responsibilities:** * Collaborate with the design team to ensure efficient and effective testability of complex integrated circuits. * Design and implement DFT features such as scan chains, compression, and built-in self-test structures to enhance testability. * Conduct DFT DRC checks in RTL/Netlist database to ensure compliance with DFT guidelines and rules. * Utilize Cadence/Siemen’s DFT tool to perform DFT analysis and optimize testability metrics. * Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models using on-chip test compression techniques. * MBIST Design (including repair) and Verification using Siemen’s EDA tool. * Validation of DFT structures/patterns in RTL, Netlist with and without SDF. * Work closely with the verification team to define and implement DFT verification p
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