Micron Technology
Semiconductor
StaffEngineerDesign
Neural analysis suggests this role is
optimal for Senior candidates.
“Staff Engineer Design at Micron Technology. Skills: Design, Timing optimization, Circuit optimization. Engage block level design. Engage sub-system level design”
Industry & Context.
Engineering judgment
What They're Looking For.
Must Have
MS/PhD + 2 to 6 years experience, BS + 6 to 10 years experience, Deep knowledge digital circuits, Deep knowledge analog circuits, Deep knowledge mixed signal circuits, Deep knowledge CMOS device physics, Deep knowledge FLASH array, Deep knowledge reliability mechanism, Deep Knowledge analog simulation tools, Deep Knowledge digital simulation tools, Verbal communication skills English
Nice to Have
AI-assisted tools experience preferred
What You'll Do.
Engage block level design
Engage sub-system level design
Partner with Logic Team
Explain array functionality
Support array functionality
Collaborate with project teams
Define full-chip floorplan
Work with Technology develop
Finalize array waveforms
How You'll Work.
Team & Collaboration
Project teams; Logic Team
Communication Scope
Verbal communication
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In this challenging role you will be engaged block level and sub-system level design and timing optimization and supervising their layout. You will be also partnering with the Logic Team to explain and support the array functionality. You will collaborate with project teams to define full-chip floorplan and how to fit and place core circuits in fullchip level. You will be also working with Technology develop to finalize array waveforms. I In addition to design activities you will be heavily engaged circuit optimization from base cells all the way to full-chip level using wide variety of simulation tools such as HSPICE, Fast SPICE and ncverilog. I In addition to design activities you will mentor junior Design to grow-up. Last but not least you are responsible for documenting block level and sub-system level Micro-Architecture Spec(MAS) in accordance with variety of industry standards such as ISO26262. A deep understanding and knowledge of digital, analog and mixes signal circuit design, CMOS device physics, Flash cell array functionality. _Requirements:_ * MS/PhD + 2 to 6 years or BS + 6 to 10 years of experience in semiconductor industry. * Deep knowledge and understanding of digital, analog and mixed signal circuits. * Deep knowledge of CMOS device physics. Deep knowledge of FLASH array and reliability mechanism. Deep Knowledge of analog and digital simulation tools such as HSPICE, Fast SPICE and ncVerilog * Strong verbal communication skills (English) * Interested and motivated to work as an engineer on sophisticated systems-level products * Ability to establish and maintain good relationships with colleagues * Individual must have proven ability to achieve res
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