Sandisk
Semiconductor
StaffEngineer,ASICDevelopmentEngineering(STA,SignOff)
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“Staff Engineer, ASIC Development Engineering (STA, Sign Off) at Sandisk. Skills: Static Timing Analysis, STA methodologies, Timing closure. Own Subsystem level STA. providing direction and guidance to PnR team”
What You'll Achieve.
ensuring the timing performance and integrity of our complex semiconductor designs; meet the timing closure requirements of complex IC designs; ensure seamless integration and optimal timing performance; improve overall design performance
Industry & Context.
Excellent problem-solving skills; ability to think strategically and analytically
What They're Looking For.
Must Have
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field, 5 years of experience in Static Timing Analysis, Proven track record of successfully executing STA, In-depth knowledge of STA tools (e. g. , Synopsys PrimeTime, Cadence Tempus, Constraints Manager) and methodologies, understanding of digital design principles, physical design, and semiconductor fabrication processes, Excellent problem-solving skills, ability to think strategically and analytically, Exceptional communication and interpersonal skills, ability to effectively collaborate with cross-functional teams and stakeholders, Ability to prioritize tasks, manage multiple project work simultaneously, A proactive, results-oriented mindset
Nice to Have
Experience with advanced process nodes (e. g. , 7nm, 5nm)
What You'll Do.
Own Subsystem level STA
providing direction and guidance to PnR team
Work with IP & Design team
Develop and implement advanced STA methodologies
Collaborate with cross-functional teams
Drive the development and maintenance of STA scripts
Conduct thorough timing analysis
Stay abreast of industry trends
Prepare and present detailed timing reports
Foster a culture of innovation
How You'll Work.
Team & Collaboration
Collaborate with cross-functional teams, including design, verification, physical design, and DFT; effectively collaborate with cross-functional teams and stakeholders; Foster a culture of innovation, collaboration, and continuous improvement within the STA team
Communication Scope
Exceptional communication and interpersonal skills
Process & Methodology
Ability to prioritize tasks, manage multiple project work simultaneously
Full Job Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. Position Overview: We are seeking a highly skilled and experienced Staff Engineer for our Static Timing Analysis (STA) function. The successful candidate will be part to a team of talented engineers responsible for ensuring the timing performance and integrity of our complex semiconductor designs. This role requires a deep understanding of STA methodologies, leadership skills, and a strategic vision to drive continuous improvement in our timing analysis processes. Key Responsibilities: - Own Subsystem level STA , providing direction and guidance to PnR team for Timing closure & Synthesis report analysis. - Work with IP & Design team for Timing constraints Development & Review activities. - Develop and implement advanced STA methodologies and strategies to meet the timing closure requirements of complex IC designs. - Collaborate with cross-functional teams, including design, verificat
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