Micron Technology

Semiconductor

StaffEngineer,APTDBackgrind/EdgeTrim

$215–325k ~AI est. Boise, Idaho, United States FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Staff Engineer, APTD Backgrind/Edge Trim at Micron Technology. Skills: Wafer edge trim, Backgrind, Wafer thinning, Advanced packaging. Develop wafer edge trim processes. Optimize wafer edge trim processes”

What You'll Achieve.

Meet mechanical requirements; Meet electrical requirements; Meet reliability requirements; Meet program targets; Meet performance targets; Meet yield targets

Industry & Context.

Semiconductor
Problems you'll solve

Root-cause analysis; Failure-mode analyses; Analytical problem-solving; Physics-based problem-solving; Creative problem-solving; Model-based reasoning; First-principles understanding

Eligibility Requirements

Domestic travel, International travel

What They're Looking For.

Must Have

BS or MS degree, 4 years experience in wafer processing, Demonstrated R&D capability, Hands-on wafer processing experience, Proven expertise in experimental design, Proven expertise in data analysis, Analytical problem-solving skills, Physics-based problem-solving skills, Creative problem-solving skills, Deep understanding of wafer thinning, Deep understanding of backgrind, Deep understanding of edge trim processes, Proven success resolving complex issues, Root-cause analysis, Model-based reasoning, First-principles understanding, Self-motivated, Work independently, Manage numerous projects simultaneously, Computer proficiency, MS Office proficiency, Data visualization tools proficiency

Nice to Have

PhD in a related field, 2+ years relevant industry experience, Proficiency in statistical analysis, Proficiency in statistical process control, Experience applying statistics to variability reduction, Experience applying statistics to process optimization, Exposure to advanced packaging technologies, Interest in advanced packaging technologies, Familiarity with data science fundamentals, Python scripting familiarity, Automation familiarity, GenAI-enabled analysis familiarity

What You'll Do.

Develop wafer edge trim processes

Optimize wafer edge trim processes

Develop backgrind processes

Optimize backgrind processes

Develop wafer thinning processes

Optimize wafer thinning processes

Improve process capability

Improve cost efficiency

Improve wafer integrity

Conduct root-cause analyses

Conduct failure-mode analyses

Understand wafer damage mechanisms

Drive mitigation strategies

Perform fundamental research

Perform early-stage pathfinding

Enable ultra-thin wafer processing

Support process transfer

Support ramp to production

How You'll Work.

Team & Collaboration

Process integration; Adjacent process areas; Global R&D groups; Suppliers; Manufacturing teams

Communication Scope

Executive-level communication

Process & Methodology

Manage projects

Full Job Description

**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. **Department Intro:** The Advanced Packaging Technology Development (APTD) team at Micron leads the creation of powerful memory and storage solutions that power the AI era. We work hands-on with global R&D groups, suppliers, and manufacturing teams to turn breakthrough ideas into real, production-ready technologies. We thrive on innovation and collaboration! **Position Overview:** This role will be part of a highly collaborative and innovative Advanced Packaging Wafer Edge Trim, Backgrind & Thinning R&D team, responsible for developing and scaling critical mechanical wafer processing modules. This role offers broad opportunities for technical innovation, early stage pathfinding, and ownership of process solutions that enable next generation advanced packaging technologies. You will work closely with process integration and adjacent process areas including Bonding/De-bonding, CMP, Wet Etch, Lithography, Assembly, and Test, while driving process readiness to meet bold program, performance, and yield targets. **Responsibilities:** * Develop and optimize wafer edge trim, backgrind, and thinning processes to meet the mechanical, electrical, and reliability requirements of Micron’s advanced memory products. * Improve process capability, yield, cost efficiency, and wafer integrity through data‑driven optimization and equipment or consumable innovation. * Conduct root‑cause and failure‑mode analyses to understand wafer damage mechanisms such as edge chipping, micro‑cracks, subsurface damage, warpage, and residual stress, and drive mitigation strategies. * Perform fundamental research and early‑stage pathfinding to enable ultra‑thin wafer processing for next‑generation ad

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