Micron Technology

Technology

StaffDRAMRTLdesignengineer

₹25–45L ~AI est. Hyderabad, India FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Staff DRAM RTL design engineer at Micron Technology. Skills: RTL design, DRAM design, AI-assisted design. Design digital IP blocks. Create RTL”

Industry & Context.

Technology
Problems you'll solve

Problem-solving

What They're Looking For.

Must Have

Master's degree in electrical or computer engineering, 6-10 years of experience in RTL design, Solid knowledge of asynchronous and synchronous design concepts, Solid knowledge of CDC methodologies, Deep understanding of SoC design flows, Fundamentals in CMOS circuit design, Fundamentals in device physics, Fundamentals in memory operation, Ability to work effectively with global multi-functional teams

Nice to Have

Domain knowledge in DRAM design, Domain knowledge in DDR5, Domain knowledge in LPDDR5, Domain knowledge in HBM, Domain knowledge in any other memory related field, Exposure to AI/ML-assisted design flows, Exposure to agentic AI, Exposure to advanced automation in digital design, Exposure to advanced automation in verification, Interest in AI/ML-assisted design flows, Interest in agentic AI, Interest in advanced automation in digital design, Interest in advanced automation in verification, Experience working with Spyglass, Domain knowledge in NAND memory design, Experience on SoC / ASIC semicustom flow, Communication skills, Problem-solving skills, Collaboration skills

What You'll Do.

Design digital IP blocks

Integrate digital IP blocks

Support physical hardware development

Define module interfaces

Review module interfaces

Define system-level architecture

Review system-level architecture

Leverage AI-based tools

Leverage agentic workflows

Leverage automation frameworks

Accelerate RTL design optimization

Accelerate design-space exploration

Assist in testbench generation

Assist in corner coverage

Improve debug efficiency

Define semicustom methodology

Drive full-chip integration

Integrate power analysis

Collaborate with CAD teams

Collaborate with EDA teams

Collaborate with software teams

Integrate AI-driven flows

Collaborate closely with architecture teams

Collaborate closely with design teams

Collaborate closely with verification teams

Collaborate closely with physical design teams

Collaborate closely with layout teams

Oversee layout process

Manage layout process

Perform block-level verification

Perform full-chip verification

Contribute to cross-group communication

Work towards standardization

Work towards group success

Provide technical mentorship

Participate in design reviews

Participate in methodology reviews

Drive innovation into future memory generations

Drive design methodology

How You'll Work.

Team & Collaboration

Global multi-functional teams; CAD teams; EDA teams; Software teams; Architecture teams; Design teams; Verification teams; Physical design teams; Layout teams; Cross-group communication

Full Job Description

**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. **Key Responsibilities:** * Take responsibility for designing digital IP blocks from initial microarchitecture to RTL creation, integration, and supporting physical hardware development. * Define and review module interfaces and system-level architecture. * Actively leverage AI‑based tools, agentic workflows, and automation frameworks to: * Accelerate RTL design optimization and design‑space exploration * Assist in testbench generation and corner coverage * Improve debug efficiency across simulation and silicon learning loops * Define semicustom methodology for memory design * Drive full-chip integration including CDC, Lint, synthesis, STA and power analysis. * Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments. * Collaborate closely with architecture, design, verification, and physical design / layout teams. * Oversee and manage the layout process including floor-planning, placement, and routing. * Perform block-level and full-chip verification including functional, timing, power and reliability analysis using industry standard and Micron-specific simulators and tools. * Contribute to cross-group communication to work towards standardization and group success * Provide technical mentorship and participate in design and methodology reviews. * Drive innovation into the future memory generations and design methodology within a dynamic work environment **Minimum Qualifications** * Master’s degree in electrical or computer engineering with 6-10 years of experience in RTL design. * Solid knowledge of asynchronous and synchronous design concepts and CDC methodologies. * Deep underst

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