Micron Technology
Semiconductor
StaffDesignArchitect(Datapath),HBM
Neural analysis suggests this role is
optimal for Senior candidates.
“Staff Design Architect(Datapath), HBM at Micron Technology. Skills: HBM Datapath Architecture, High-speed circuit design, Datapath optimization. Architect HBM read/write datapath. Design HBM read/write datapath”
Industry & Context.
What They're Looking For.
Must Have
Bachelor's degree in EE/CE or related, 6+ years relevant industry experience, Master's degree with 4+ years experience, 2+ years high-speed digital datapath design, 2+ years digital schematic build/RTL/mixed-signal datapath
Nice to Have
Understanding of HBM/DRAM architectures, Working knowledge of layout/floorplanning, Experience with static timing analysis, Familiarity with advanced process-node challenges
What You'll Do.
Architect HBM read/write datapath
Design HBM read/write datapath
Develop high-speed datapath circuits
Optimize datapath designs
Design data reliability features
Integrate data reliability features
Collaborate with multi-functional teams
Translate specifications into micro-architectures
Drive schematic-level datapath implementations
Drive RTL-level datapath implementations
Contribute to design reviews
Contribute to documentation
Provide technical mentoring
How You'll Work.
Team & Collaboration
Multi-functional teams; Design teams; PHY teams; ECC teams; Verification teams; Layout teams; System teams; DFT teams
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a highly motivated **HBM Datapath Architect** to architect, design, and optimize high‑speed data paths for next‑generation High Bandwidth Memory (HBM) products! This role focuses on logic‑die and core‑die datapath circuitry, enabling industry‑leading bandwidth, power efficiency, reliability, and scalability across JEDEC and custom HBM solutions. The ideal candidate will work closely with design, PHY, ECC, verification, layout, and system teams to deliver robust datapath designs from concept through silicon bring‑up and production. # **Responsibilities will include, but are not limited to:** * Architect and design HBM read and write datapath across core and logic die, including alignment, buffering, timing, and control logic * Develop high‑speed, low‑latency datapath circuits supporting multi‑channel HBM architectures and wide internal buses * Optimize datapath designs for bandwidth, power, area, and timing closure at advanced technology nodes * Design and integrate data reliability features, including parity, ECC hooks, lane redundancy, and remapping mechanisms * Collaborate with multi-functional teams to translate specifications into robust micro‑architectures * Collaborate with PHY, DFT, verification, and layout teams to ensure accurate functionality, testability, and manufacturability * Drive schematic‑level and RTL‑level datapath implementations, including clocking, gating, and reset strategies * Contribute to design reviews, documentation, and technical mentoring across HBM programs # **Required Qualifications:** * Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field with 6+ years of relevant industry experienc
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