Axiado
semiconductor
StaffASICDesignEngineer
Neural analysis suggests this role is
optimal for mid candidates.
“Staff ASIC Design Engineer at Axiado. Skills: ASIC Design, RTL logic design, micro-architecture design, synthesis, timing optimization, interface protocols, FPGA-based emulation platforms, scripting languages. Design and implement RTL blocks with a focus on micro-architecture optimization. Develop clear, comprehensive micro-architecture specifications and technical documentation”
What You'll Achieve.
meet performance and power requirements; ensure design quality and completeness; deliver high-quality silicon products from concept through production maturity; secure every node on the internet
Industry & Context.
Excellent analytical and problem-solving capabilities with attention to detail; identifying and resolving complex technical issues; energized by hard problems
What They're Looking For.
Must Have
7+ years of hands-on experience in RTL logic design, verification, synthesis, and timing optimization, Demonstrated expertise in writing efficient, synthesizable RTL code in Verilog with SoC integration knowledge, Proficiency in micro-architecture design and the ability to translate specifications into robust implementations, Solid understanding of assertions, coverage analysis, RTL synthesis methodologies, and timing closure techniques, Extensive experience with interface protocols such as PCIe, USB, Ethernet, DDR/LPDDR4/5, I2C/I3C, eSPI, and SPI, Proven experience with FPGA-based emulation platforms (HAPS, Veloce) for design validation and debugging, Fluency with scripting languages including Perl and Python for design automation and tool development, Experience with repository management tools (Bitbucket, Jenkins) and bug tracking systems (JIRA), Successful completion of at least one full tape-out cycle from design through silicon validation, communication and documentation skills with the ability to articulate complex technical concepts clearly, Demonstrated ability to work collaboratively in cross-functional team environments, Excellent analytical and problem-solving capabilities with attention to detail
Nice to Have
Silicon bring-up and debug experience on actual hardware, Experience mentoring or leading junior design engineers, Familiarity with design methodologies, standards, and industry best practices
What You'll Do.
Design and implement RTL blocks with a focus on micro-architecture optimization
comprehensive micro-architecture specifications and technical documentation
and optimization activities
Support prototyping activities
test program development
and comprehensive chip validation
Conduct design bring-up and debug on FPGA-based emulation platforms
Implement and analyze assertions and coverage metrics
Mentor junior engineers and provide technical guidance
How You'll Work.
Team & Collaboration
Collaborate with firmware, software, design verification, FPGA, DFT, and backend teams throughout all stages of ASIC development; Demonstrated ability to work collaboratively in cross-functional team environments
Communication Scope
communication and documentation skills with the ability to articulate complex technical concepts clearly
Process & Methodology
drive the development and implementation of sophisticated System-on-Chip (SoC) solutions, deliver high-quality silicon products from concept through production maturity, streamline design workflows and maintain code quality
Full Job Description
Axiado is building the future of AI powered digital infrastructure. We are a fast-growing, well funded silicon, systems, and solutions company pioneering a new category of semiconductor called the Trusted Control/Compute Unit (TCU) that combines advanced hardware security, AI driven resilience and efficiency, and real-time platform management. Our technology protects the world’s most critical infrastructure—from data centers to next generation cloud and AI platforms—by securing systems at the foundation levels of hardware, independent of host CPUs and operating systems. Founded in 2019 and now over 150 employees are strong, Axiado has evolved into a recognized leader in the convergence of AI, security, and silicon innovation. We partner with and are actively engaged in commercial programs with multiple Tier 1 industry leaders, validating both our technology and our long-term market trajectory. Axiado has also won numerous industry awards for our ground-breaking products and technological innovations, including being named one of Fast Company’s 2025 Top 10 Most Innovative Companies in Security, winning the 2025 Global InfoSec Award for Outstanding AI Security Solution, and being named a finalist for the Global Semiconductor Alliance’s 2025 “Start-Up to Watch” award. At Axiado, developing breakthrough technology takes more than great engineering—it takes a team of exceptional people who collaborate boldly, challenge assumptions, and take pride in building what comes next. We value curiosity, execution, respect, and a shared desire to make a meaningful impact on the security and reliability of the digital world. If you’re driven to innovate, energized by hard problems, and excited to help define the future of secure AI infrastructure, we invite you to apply and join us on this journey. We are seeking a talented and innovative Staff ASIC Design Engineer to join our dynamic team in Hyderabad, India. In this role, you will take ownership of critical ASIC design projects,
Applying for this Staff ASIC Design Engineer role?
Most applicants get filtered before a human reads their resume. See if yours makes the cut.
How to Apply on SmartRecruiters
- SmartRecruiters often includes a video screening step — check camera and mic permissions.
- Link your GitHub or portfolio directly in the profile section for technical roles.
- Applications may be reviewed by AI scoring before reaching a recruiter — use keywords from the job description.
ANONYMOUS · UNFILTERED
What do employees actually say about Axiado?
Real rants from real employees. Read before you apply.