Renesas Electronics
Tech / AI / Software
StaffAMSVerificationEngineer
“Staff AMS Verification Engineer at Renesas Electronics. Skills: AMS Verification, SystemVerilog, UVM, analog and mixed-signal ASIC designs. ensuring the functional correctness and robustness of complex analog and mixed-signal ASIC designs through advanced verification methodologies. Develop and execute comprehensive verification plans for complex mixed-signal ASIC designs”
What You'll Achieve.
deliver high-quality silicon solutions
Industry & Context.
Excellent problem-solving skills
What They're Looking For.
Must Have
10+ years of experience in analog and/or mixed-signal design verification, Proficiency in Virtuoso, SystemVerilog, UVM, and simulation tools (Synopsys VCS, Cadence Xcelium), Solid understanding of analog and digital design fundamentals, schematic transistor design, RTL design, and ASIC development flows, Experience with scripting languages (Python, Perl, Tcl) for automation, Familiarity with coverage-driven verification and reporting, Excellent problem-solving skills and attention to detail, Communication and teamwork abilities, Experience with version control systems and CI/CD workflows, Experience with other verification methodologies (e/eRM, hardware/software co-simulation)
What You'll Do.
ensuring the functional correctness and robustness of complex analog and mixed-signal ASIC designs through advanced verification methodologies
Develop and execute comprehensive verification plans for complex mixed-signal ASIC designs
Create and maintain testbenches using Schematic/SystemVerilog/UVM
Write and debug test cases to verify functionality
Perform block-level and full-chip verification
and regression run/debug
Analyze and resolve issues found during verification and post-silicon validation
Develop abstracted real number behavioral models of analog circuits using Verilog
Define and maintain appropriate hierarchy definitions to match verification plan requirements
How You'll Work.
Team & Collaboration
work closely with architects, designers, DFT, and other verification engineers; Collaborate with design and DFT engineers to understand specifications and identify verification requirements; Mentor junior engineers; Participate in reviews
Communication Scope
communication and teamwork abilities
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