Sandisk
Semiconductor
SrTechnologist,ASICDevelopmentEngineering
Neural analysis suggests this role is
optimal for mid candidates.
“Sr Technologist, ASIC Development Engineering at Sandisk. Skills: ASIC Verification, SoC Verification, SystemVerilog UVM, Coverage-driven verification methodology, Verification environment development, Debugging complex issues. End-to-end ownership of one or more subsystems or SoC verification flows. Planning, execution, and closure of verification flows”
What You'll Achieve.
Ensure end-to-end verification coverage; Achieve functional and code coverage; Close coverage gaps; Sign off gate-level simulations; Ensure smooth transition to SoC-level verification; Ensure power intent validation; Ensure test portability from pre-silicon to post-silicon; Resolve system-level issues
Industry & Context.
Excellent debugging and problem-solving skills with simulation and emulation environments; Debug complex issues across multiple domains (digital logic, firmware, timing, DFT)
What They're Looking For.
Must Have
15+ years of experience, Deep understanding of C, SystemVerilog UVM, and coverage-driven verification methodology, Proven history of building and improving SV/UVM-based verification methodology, Ability to develop and execute verification plans at IP, subsystem, and SoC levels, Experience in test plan creation, test development, and test coverage assessment, Proficiency with C, Verilog, SystemVerilog, and advanced verification methodologies, knowledge of bus protocols (AXI, AHB, APB) and interconnect fabrics, Knowledge of various interfaces: PCIe, LPDDR, I²C, I3C, SPI, etc., Ability to understand complex datapath flows of controllers and verify them at SoC level, Proficiency in gate-level simulations, including SDF annotation and power-aware (UPF/CPF) verification, Excellent debugging and problem-solving skills with simulation and emulation environments, Proficiency in programming/scripting languages such as Python, Perl, TCL, and Bash, written and verbal communication skills, Demonstrated interest in ASICs, SoCs, storage controllers, flash memory, and semiconductor components
Nice to Have
Mentorship experience, Methodology Development: Proven track record in building reusable verification environments, libraries, and methodologies across multiple projects, Performance/Stress Testing: Familiarity with performance verification, traffic generation, and corner-case stress scenarios at SoC level, Regression Infrastructure: Experience in defining, automating, and scaling regressions in farm environments, Cross-Functional Collaboration: Ability to work closely with design, validation, firmware, and physical design teams to resolve system-level issues, team player, able to collaborate effectively across architecture, design, and validation teams
What You'll Do.
End-to-end ownership of one or more subsystems or SoC verification flows
and closure of verification flows
Define verification strategy
Create detailed test plans
Develop robust test benches for SoC verification
Develop and run UVM/SystemVerilog-based verification environments
and debug C-based tests
Define and achieve functional and code coverage
Track and close coverage gaps
and sign off gate-level simulations with SDF annotation
Develop and validate functional patterns for ATE
Debug complex issues across multiple domains
Participate in IP and subsystem-level integration verification
Ensure smooth transition to SoC-level verification
Support low-power verification using UPF
Ensure power intent validation
Automate regression setup
Contribute to verification methodology improvements
Contribute to reusable environments
Contribute to verification infrastructure scalability
Work closely with validation and bring-up teams
Ensure test portability from pre-silicon to post-silicon
How You'll Work.
Team & Collaboration
Collaborate with architects, RTL designers, and pre- and post-silicon verification teams; Work closely with validation and bring-up teams; Work closely with design, validation, firmware, and physical design teams; Collaborate effectively across architecture, design, and validation teams
Communication Scope
written and verbal communication skills
Full Job Description
Sandisk understands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today’s needs and tomorrow’s next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living in and that we have the power to shape. Sandisk meets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibility forward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globally for innovation, performance and quality. Sandisk has two facilities recognized by the World Economic Forum as part of the Global Lighthouse Network for advanced 4IR innovations. These facilities were also recognized as Sustainability Lighthouses for breakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward. The SoC Development team is seeking highly motivated engineers to join a team of experienced engineers working on the development of advanced controller SoCs. As a Sr.Technologist Verification Engineer in the SoC Development Team, you will be responsible for planning, architecting, and executing verification strategies to validate complex hardware in System-on-Chip (SoC) ASICs. Your work will enable industry-leading data storage control SoCs deployed into high-volume consumer and enterprise products. The growing diversity of data creates an exponential number of new possibilities – for the world, our company, and you. You’ll be part of a team driving the innovations necessary to outpace new demands and challenges everywhere data lives, from sensors to mobile devices to the cloud. We’ve only started to scratch the surface of what data can do. You can help unlock its full potential. Es
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