Nxp

AI

SrSynthesisandFront-EndImplementationEngineer

Hyderabad, India FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Sr Synthesis and Front-End Implementation Engineer at Nxp. Skills: Synthesis, Front-End Implementation, Static Timing Analysis, Formal Verification. Perform logical and physical synthesis. Develop and implement timing constraints”

What You'll Achieve.

Ensuring performance, power, and area targets are met; Achieve target frequencies; Optimize design performance; Ensure functional equivalency; Meet aggressive PPA requirements; Ensure seamless integration and hand-off; Improve efficiency and design quality

Industry & Context.

AI
Problems you'll solve

Excellent problem-solving skills

What They're Looking For.

Must Have

Bachelor's or Master's degree in VLSI or Electronics Engineering or a related field, 5+ years of relevant experience in digital ASIC/SoC design, with a focus on synthesis and front-end implementation, Proficiency with industry-standard synthesis tools (e. g. , Synopsys DC/FC or Cadence Genus), understanding of static timing analysis (STA) concepts and tool (e. g. , Synopsys PrimeTime or Cdence Tempus), Experience with formal verification tools (e. g. , Synopsys Formality, Cadence Conformal (LEC)), Understanding of upf, low-power design techniques and power analysis concepts, Solid knowledge of Verilog/System verilog for digital design, Familiarity with scripting languages (Tcl, Python, Perl) for automation), Excellent problem-solving skills and attention to detail, communication and interpersonal skills

Nice to Have

Physical synthesis and floorplanning aspects is a plus, Knowledge of DFT (Design for Testability) principles is a plus

What You'll Do.

Perform logical and physical synthesis

Develop and implement timing constraints

Conduct STA and timing closure

Execute formal verification

Analyze and optimize power consumption

Perform area estimation and optimization

Develop and maintain automation scripts

Evaluate and integrate new CAD tools

Document design constraints and methodologies

How You'll Work.

Team & Collaboration

Collaborate with design teams for timing closure; Collaborate with RTL designers, DFT engineers, and physical design engineers; Work effectively in a collaborative team environment

Communication Scope

communication and interpersonal skills; ability to work effectively in a collaborative team environment

Full Job Description

We are seeking highly motivated Synthesis & Front-End Implementation Engineer to join our dynamic AI NPU team. In this role, you will be crucial in translating RTL designs into optimized gate-level netlists, ensuring performance, power, and area targets are met for complex IP blocks. **Job Responsibilities** As a Synthesis & Front-End Implementation Engineer, your responsibilities will include: * Performing logical and physical synthesis of RTL designs for various digital blocks and sub-systems, including hierarchical synthesis methodologies. * Developing and implementing robust timing constraints (SDC) to achieve target frequencies and optimize design performance. * Conducting STA, identifying critical paths, and collaborating with design teams for timing closure. * Executing formal verification (LEC) to ensure functional equivalency between RTL and synthesized netlists. * Analyzing and optimizing power consumption at the front-end stage, utilizing power analysis tools and techniques. * Performing area estimation and optimization to meet aggressive PPA requirements. * Collaborating closely with RTL designers, DFT engineers, and physical design engineers to ensure seamless integration and hand-off. * Developing and maintaining automation scripts (Tcl, Python, Perl) for synthesis flows and design analysis. * Evaluating and integrating new CAD tools and methodologies to improve efficiency and design quality. * Documenting design constraints, methodologies, and analysis results thoroughly. **Job Qualifications** To be successful in this role, you should possess following qualifications: * Bachelor's or Master's degree in VLSI or Electronics Engineering or a related field. * 5+ years of relevant experience in digital ASIC/SoC design, with a focus on synthesis and front-end implementation. * Proficiency with industry-standard synthesis tools (e.g., Synopsys DC/FC or Cadence Genus). * Strong experience with Physical synthesis and floorplanning aspects is a plus. * Strong

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