Lightmatter

Technology

Sr.StaffPhysicalDesignTimingEngineer(STA)

$217–267k Mountain View, California, United States FULL TIME Remote Friendly
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Sr. Staff Physical Design Timing Engineer (STA) at Lightmatter. Skills: Physical Design, Timing closure, STA sign-off. Drive STA sign-off. Analyze fab guidelines”

Industry & Context.

Technology
Problems you'll solve

Problem solving skills; Analyze tradeoffs

What They're Looking For.

Must Have

Bachelor’s degree in Electrical Engineering or Computer engineering, 12 years of Physical Design experience, 5 years hands-on experience in ASIC STA, 5 years timing constraints development, 5 years timing closure, Cadence or Synopsys tools experience, Scripting languages like TCL and Python, PERL or Shell problem solving skills

Nice to Have

Master’s degree in Electrical Engineering or Computer engineering, 8 years of hands-on experience in ASIC STA, 8 years timing constraints development, 8 years timing closure, Cadence or Synopsys tools experience

What You'll Do.

Analyze fab guidelines

Incorporate sign off corners

Collaborate with architecture teams

Collaborate with RTL teams

Collaborate with DFT teams

Analyze timing complexities

Develop consolidated timing modes

Develop constraints for synthesis

Develop PnR timing sign-off flows

Develop chip timing sign-off flows

Analyze tradeoffs power/performance/area

Project timing summary

Leverage Tempus/PrimeTime

Automate timing ECO generation

Support physical design implementation

Document best practices

Document lessons learned

How You'll Work.

Team & Collaboration

Architecture teams; RTL teams; DFT teams; Methodology team

Full Job Description

Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads. Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter! If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders. Lightmatter is (re)inventing the future of computing with light! About this role We are hiring a Physical Design Timing Engineer to help drive backend digital execution for some of the leading photonics based interconnect solutions. You will work alongside a team of world-class scientists and engineers in defining how the system will be optimized and trailblaze problems that are new to the industry. If your passion is innovation, solving challenging technical problems and doing impactful work you should join our team. In this job you will be responsible for timing constraints development, STA and timing closure on leading edge CMOS technologies and flows. This includes synthesis through place and route, timing closure, and tapeout signoff. Responsibilities Drive the STA sign-off for our flagship Silicon photonics chips at various technology nodes. Analyze fab guidelines and work with the methodology team to incorporate sign off corners, margins, and derates into timing analysis flows and methodologies. Collaborate with the architecture, RTL, and DFT teams to analyze the timing complexities and develop consolidated timing modes and constraints for synthesis, along with PnR and chip timing sign-off flows. Analyze and understand

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