Micron Technology

Semiconductor

Sr.ProductDevelopmentEngineer

$135–195k ~AI est. Boise, Idaho, United States FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Sr. Product Development Engineer at Micron Technology. Skills: DRAM, NAND, CPI, Semiconductor fabrication. Resolve CPI related issues for DRAM memory products. Establish package program plans for new DRAM fab”

Industry & Context.

Semiconductor
Problems you'll solve

Root cause analysis

What They're Looking For.

Must Have

Master's degree in Material Science Engineering, Chemical Engineering, Metallurgical Engineering, Electrical Engineering, Physics or related field, 60 months of experience in the job offered or in an Engineering-related occupation, DRAM/NAND memory device structure and function, Chip-package-interaction (CPI), DRAM/NAND device/package design files, DRAM/NAND memory device Wafer Probe and Test flows, DRAM/NAND memory device fabrication knowledge, DRAM/NAND CPI quality and reliability degradation mechanisms

What You'll Do.

Resolve CPI related issues for DRAM memory products

Establish package program plans for new DRAM fab

Coordinate DRAM device/package/module end-to-end reviews

Incorporate device design features into CPI and packaging

Design effective quality and reliability qualification plans

Full Job Description

**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsible for CPI related issues for Micron’s DRAM memory products from pathfinding through NPI start up into HVM. Establish package program plans for new DRAM fab technology process nodes specific to DRAM 3DS products, coordinate DRAM device/package/module end-to-end reviews. Fundamental understanding of key risks in Fab BEOL (Backend of Line), Fab memory array design/processes, wafer probe flows, wafer/device bumping & flip chip assembly technologies, package design, assembly processes, and materials & process interaction effects. Employer will accept a Master’s degree in Material Science Engineering, Chemical Engineering, Metallurgical Engineering, Electrical Engineering, Physics or related field and 60 months of experience in the job offered or in an Engineering-related occupation. Position requires: 1\. DRAM/NAND memory device structure and function 2\. Chip-package-interaction (CPI) which includes assembly process understanding & effects of assembly stresses, package design understanding and effects/influence of design decisions, and DRAM/NAND design/process influences 3\. DRAM/NAND device/package design files and incorporate device design features into CPI and packaging risk assessments 4\. DRAM/NAND memory device Wafer Probe and Test flows, including electrical data analysis and correlating electrical failures under various temperature and voltage conditions to CPI physical defects 5\. DRAM/NAND memory device fabrication knowledge, specifically including memory array and back-end-of-line fabrication processes 6\. DRAM/NAND CPI quality and reliability degradation mechanisms, intrinsic vs extrinsic defects, accelerated reliability stress tests, & sampling

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