SpaceX
Aerospace
Sr.FullChipPhysicalVerificationEngineer(SiliconEngineering)
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“Sr. Full Chip Physical Verification Engineer (Silicon Engineering) at SpaceX. Skills: Physical Verification, DRC, LVS, ESD. Execute full-chip DRC, LVS, ESD, PERC and antenna signoff. Develop, maintain, and optimize physical verification flows”
What You'll Achieve.
Expand the performance and capabilities of the Starlink network; Deliver cutting-edge solutions
Industry & Context.
Resolve complex DRC/LVS violations; Resolve DRM ambiguities
What They're Looking For.
Must Have
Bachelor’s degree in electrical engineering, computer engineering or computer science, 5+ years of ASIC and/or physical design flow development experience in industry
Nice to Have
Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
What You'll Do.
Execute full-chip DRC
PERC and antenna signoff
and optimize physical verification flows
Interpret and implement foundry Design Rule Manuals
Debug and resolve complex DRC/LVS violations
Perform ESD verification
Drive tapeout readiness
Engage directly with foundry teams
Develop/modify design flows
How You'll Work.
Team & Collaboration
Work alongside world-class cross-disciplinary teams; Coordinating signoff across block and top-level and Hard IP design teams
Full Job Description
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars. SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe. We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation silicon for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network. RESPONSIBILITIES: Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools like Calibre, ICV, or Pegasus Develop, maintain, and optimize physical verification flows for advanced node SoC’ s. Interpret and implement foundry Design Rule Manuals (DRM) — translate rule updates into verified flow changes Deb
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