Micron Technology
Semiconductor
SrDesignVerificationEngineer/Architect,HBM
Neural analysis suggests this role is
optimal for Senior candidates.
“Sr Design Verification Engineer/Architect, HBM at Micron Technology. Skills: Design Verification, HBM, RTL2GDS. Develop verification plans. Implement verification plans”
Industry & Context.
Evaluate technical issues; Define solutions
What They're Looking For.
Must Have
Bachelor's degree or higher, 4+ years verification engineering experience, 3+ years digital/analog/mixed-signal verification, 2+ years custom/RTL design verification, Evaluate technical issues, Define solutions, Good verbal communication skills, Good written communication skills
Nice to Have
Master's degree or equivalent experience, 6+ years verification engineering roles, One or more patents, Trade secrets or publications, 2+ years memory products experience, Experience building verification flows, Experience improving verification flows
What You'll Do.
Develop verification plans
Implement verification plans
Develop architecture collateral
Implement architecture collateral
Support co-verification of system
Participate in customer interactions
Provide recommendations
Build verification methodology components
Improve verification methodology components
Build GenAI applications
Improve GenAI applications
Evaluate pre-silicon issues
Debug pre-silicon issues
Evaluate post-silicon issues
Debug post-silicon issues
Contribute to exploration of architectures
How You'll Work.
Team & Collaboration
Multi-functional team; Design Engineering; Product Engineering; Business Units
Communication Scope
Verbal communication; Written communication
Process & Methodology
Verification roadmap
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Join us as a Senior Verification Engineer and contribute to modular, scalable verification solutions for next-generation HBM DRAM products! You will work independently within a multi-functional team of technical domain experts, spanning both IP-level and SoC-level verification. You will collaborate with Design Engineering, Product Engineering, and Business Units to complete the HBM verification roadmap. You will apply your solid understanding of testbench architecture, custom or SoC verification methodologies, and 2.5D & 3D package integration to evaluate issues, define solutions, and broaden your expertise. ## Responsibilities: * Develop and implement verification plans and architecture collateral across IP-level and SoC-level verification for current and future HBM designs * Support co-verification of the overall system and participate in customer interactions to gather feedback and provide recommendations for future HBM solutions * Build and improve verification methodology components and GenAI applications aligned to HBM design cycles, broadening cross-disciplinary knowledge across custom digital and RTL2GDS flows * Evaluate and debug pre-silicon and post-silicon issues in current HBM products, and contribute to e
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