Micron Technology
Semiconductor
SrDesignEngineer
Neural analysis suggests this role is
optimal for Senior candidates.
“Sr Design Engineer at Micron Technology. Skills: NAND Flash memory, Array waveform development, Circuit design, Python AI utilities. Develop array waveforms with timing and biasing conditions. Collaborate with Firmware team”
Industry & Context.
Circuit debugging; Problem-solving skills
What They're Looking For.
Must Have
BS in electrical engineering or equivalent experience required, 2+ years of NAND design relevant industry experience required, Good fundamentals in semiconductor and device physics, Good fundamentals in analog/mixed-signal circuit design, Understanding of semiconductor reliability issues, Understanding of Electromigration (EM) and IR analysis, Circuit debugging and problem-solving skills, Experience in circuit verification and optimization, Experience in layout planning, Experience in parasitic extractions, Experience guiding layout, Coding skills in Python, Comfort working with structured data, Comfort working with version control
Nice to Have
MS/PhD preferred, Bash/Tcl a bonus, Knowledge of analog and digital simulators, Familiarity with Cadence design, Familiarity with LVS/DRC tools a plus, Experience with a scripting language, Familiarity with Linux/UNIX
What You'll Do.
Develop array waveforms with timing and biasing conditions
Collaborate with Firmware team
Collaborate with Analog team
Collaborate with Design validation teams
Plan wordline and bitline path architecture
Establish positioning of electronic units
Coordinate embedding circuit blocks into chip plan
Perform die size cost and benefits analysis
Evaluate NAND power consumptions
Analyze NAND power consumptions
Improve NAND power consumptions
Generate Xpath schematics
Generate Ypath schematics
Generate Array schematics
Integrate Core schematics into fullchip schematics
Run block level simulations
Coordinate layout implementation
Run subsystem simulations
Run fullchip simulations
Develop Python AI utilities
Support Python AI utilities
Support Product Engineering efforts
Support Probe efforts
Support Process Integration efforts
Support Assembly efforts
Support Marketing efforts
Design products to optimize manufacturing functions
Assure best reliability
Assure best time-to-market
Assure best customer satisfaction
How You'll Work.
Team & Collaboration
Collaborate with Firmware team; Collaborate with Analog team; Collaborate with Design validation teams; Work with project groups; Work with project teams; Work with Product Engineering; Work with Test; Work with Probe; Work with Process Integration; Work with Assembly; Work with Marketing
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ## Job Summary As a Sr. Design Engineer in the NVE Design Engineering Core group at Micron Technology, Inc., you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing core and mixed circuits used in the development of memory products. ## **Responsibilities** * Develop array waveforms with detailed timing and biasing conditions of array signals. This requires in-depth familiarity of Nand Flash memory read, program and erase algorithms. * Collaborate with Firmware team, Analog team and Design validation teams during actual implementation of waveforms. * Plan the wordline and bitline path architecture according to area, performance and power specifications. Establish the positioning of these electronic units and coordinate with project groups to embed these circuit blocks into the chip plan. * Perform die size cost and benefits analysis of new array circuits and algorithms prior to implementation. Working closely with other functional teams to evaluate, analyze, and improve NAND power consumptions. * Generate Xpath, Ypath and Array schematics as the project progresses and work with project teams integrating the Core schematics into the fullchip schematics. Run block level simulations for the circuits using spice simulator and coordinate layout implementation related to the circuits. Run subsystem and fullchip simulations throughout the course of the project. * Develop and support Python AI utilities that integrate with EDA environments to accelerate tasks. These tasks cover environment setup, corner execution, regression runs, automated documentation, a
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