SpaceX
Internet
Sr.ASICDesignVerificationEngineer(SiliconEngineering)
“Sr. ASIC Design Verification Engineer (Silicon Engineering) at SpaceX. Skills: ASIC Design Verification, UVM/OVM/VMM, Constrained Random Verification. Responsible for digital ASIC verification. Write and review test plans”
What You'll Achieve.
deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network
Industry & Context.
problem-solving and coding skills
Ability to work extended hours and weekends as needed to meet critical milestones, U. S. citizen or national, U. S. lawful, permanent resident (aka green card holder), Refugee under 8 U. S. C. § 1157, Asylee under 8 U. S. C. § 1158, eligible to obtain the required authorizations from the U. S. Department of State
What They're Looking For.
Must Have
Bachelor’s degree in electrical engineering or computer engineering, 5+ years of experience with design verification and test bench development
Nice to Have
Advanced degree in electrical engineering or computer engineering, Experience with verification methodologies such as UVM/OVM/VMM, object-oriented programming knowledge, problem-solving and coding skills, Experience in constrained random verification, Expertise in developing test plans, implementing coverage models, and analyzing results, Experience with scripting languages, e. g. Python for automation, RTL design, chip bring-up, and post-silicon validation experience, Ability to work in a dynamic environment with changing needs and requirements
What You'll Do.
Responsible for digital ASIC verification
Write and review test plans
Develop test harnesses and test sequences
Responsible for test plan execution
Code and functional coverage closure
Contribute towards pre-silicon verification
Contribute towards chip bring-up
Contribute towards post-silicon validation
How You'll Work.
Team & Collaboration
work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation)
Applying for this Sr. ASIC Design Verification Engineer (Silicon Engineering) role?
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