SoftwareEngineerII

## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.** **Job Description** We are seeking highly motivated and talented engineers with strong C++ development skills and a deep interest in advanced‑node integrated circuit design. In this role, you will contribute to the development of a high‑performance, multi‑threaded, distributed geometry layout engine within the INNOVUS NanoRoute system, including next‑generation GPU‑accelerated DRC capabilities. You will collaborate closely with a global R&D team to design, implement, and optimize core algorithms that drive industry‑leading P&R tools. **Responsibilities** * Design and develop core components of a multi-threaded, distributed geometry layout engine. * Implement efficient data structures and algorithms for large‑scale physical design challenges. * Develop, optimize, and maintain CUDA‑based GPU kernels for DRC and geometric computation. * Analyze and optimize performance across CPU/GPU boundaries, including memory transfers and kernel execution. * Work with cross‑functional global teams to define technical specifications and project scope. * Debug, optimize, and maintain production-quality C++ code in a Linux environment. * Collaborate with internal stakeholders and customers to understand requirements and deliver high‑quality solutions. **Minimum Qualifications** * MS in CS/EE or BS with 2+ years of relevant experience. * C/C++ software development experience in Linux environment. * Solid understanding and practical use of data structures and algorithms. * Self‑motivated with excellent problem‑solving skills. * Ability to write clear technical specifications and accurately estimate development effort. * Strong communication skills and comfort interacting with global customers or internal partners. **Preferred** * Experience with multi-threaded programming. * Knowledge of physical design algorithms. * Knowledge of NVIDIA GPU architecture. * Prior R&D exper