Cadence
electronic design
SoftwareEngineerII
Neural analysis suggests this role is
optimal for Entry candidates.
“Software Engineer II at Cadence. Skills: Formal Verification, RTL design, System Verilog Assertions, Python. Development of Formal Verification IPs. Develop Verilog design model”
What You'll Achieve.
customer success
Industry & Context.
analytical and problem-solving skills
What They're Looking For.
Must Have
2+ years of experience in RTL design/Verification in case of BETECH or master’s degree with Internship, Knowledge of at least one industry standard protocol (for example AHB, AXI, CHI, PCIe etc), Very RTL design and synthesis concepts, verification concepts like understanding spec, creating test plans, adding coverage, analytical and problem-solving skills, written, verbal and presentation skills, good communication skills, Ability to establish a close working relationship with both customer peers and management
Nice to Have
Formal verification knowledge, Knowledge of scripting languages & Flow development, Exposure to AI tools or methodologies used for verification, automation, debugging, or productivity improvement, creative use of unconventional solutions
What You'll Do.
Development of Formal Verification IPs
Develop Verilog design model
Develop System Verilog Assertions
Understand designs and assertions
Automation and scripting
Work as individual contributor
Coordinate with cross geographic teams
Understand verification environment
Understand design verification methodology
How You'll Work.
Team & Collaboration
be a team player; coordinate with cross geographic teams; Work effectively across functions and geographies
Communication Scope
written, verbal and presentation skills; good communication skills
Full Job Description
## **At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.** **Cadence** is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health. **_The Cadence Advantage_** * The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. * Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. * The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success * Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests * You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day. **_Job Summary_** In this job, you will be responsible for development of Formal Verification IPs in form of a Verilog design model and System Verilog Assertions for industry standard bus protocols. This role offers front row access to the cutting-edge innovation happening in Formal Verification and an opportunity to master a variety of protocols. **_Job Responsibilities :_** This Job involves development of the Assertion Based Verification IPs. * He/She should understand the designs and assertion
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