Micron Technology
Semiconductor
SoCPhysicalDesignEngineer,SeniorMemberofTechnicalStaff(SMTS)
“SoC Physical Design Engineer, Senior Member of Technical Staff (SMTS) at Micron Technology. Skills: Physical Design, Timing Closure, PPA Targets, EDA Tools. Own physical implementation for SoC blocks. Drive timing closure”
What You'll Achieve.
Deliver best-in-class PPA; Deliver robust signoff collateral
Industry & Context.
Address violations efficiently; Correlate silicon behavior with PD/STA/power analysis
What They're Looking For.
Must Have
SoC physical design implementation from netlist to GDSII, Proficiency with industry EDA tools, Experience with power intent and power delivery, Exposure to hierarchical physical design, Knowledge of IR analysis, noise, coupling/crosstalk, Proven tapeout history on advanced foundries, Scripting/automation skills using Python, TCL, Perl, and/or shell
Nice to Have
Experience with HBM / DRAM adjacent SoC designs, Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field, Minimum 15 years of experience in a related field
What You'll Do.
Own physical implementation for SoC blocks
Collaborate with design and integration teams
Integrate and implement complex IP
Perform physical signoff
Address violations efficiently
Ensure design meets manufacturability and quality requirements
Support tapeout execution
Contribute to post-silicon debug
Correlate silicon behavior with analysis
Improve productivity through scripting/automation
Develop best-practice methodology
How You'll Work.
Team & Collaboration
RTL design teams; Verification teams; DFT teams; IP providers; Packaging/assembly teams; Manufacturing teams; Architecture teams; STA/signoff teams; Integration teams; Test stakeholders; Probe stakeholders; Manufacturing stakeholders
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