MatX
AGI
SiliconMicro-ArchitectandRTLDesigner
Neural analysis suggests this role is
optimal for Mid+ candidates.
“Silicon Micro-Architect and RTL Designer at MatX. Skills: Silicon Micro-Architecture, RTL Design, ASIC/SOC Design, High-Performance Compute, High-Speed Connectivity, Memory Management. Contribute to MatX’s silicon architecture-to-design methodology with a scalable solution across blocks, subsystems, fullchip design. Own entire subsystem or subsets and/or chip-level silicon design deliverables from micro-architecture to sign-off ready design”
What You'll Achieve.
delivering performant and functionally accurate silicon for MatX products; deliver best-in-class performance-power-area results; achieve high test coverage and best-in-class timing, power and area for designs
Industry & Context.
This position requires access to information that is subject to U. S. export controls., This offer of employment is contingent upon the applicants capacity to perform job functions in compliance with U. S. export control laws without obtaining a license from U. S. export control authorities.
What They're Looking For.
Must Have
Concept-to-silicon experience in driving silicon design for subsystems and/or top-level functions with ASICs and SOCs from an architecture specification to production silicon, 2 years or more experience with SystemVerilog, Python, C/C++ and similar scripting and programming languages for chip design and related flows, Production-proven experience on silicon micro-architecture and design concepts used in high-performance compute (CPUs, GPUs, accelerators), high-speed connectivity, memory management and related functionalities, Experience with testing your designs and working closely with verification teams towards performance and coverage closure goals, Hands-on experience with design synthesis, equivalence checking, design lint, clock-domain-crossing and related flows to take designs to high quality sign-off, Experience on DFT and physical design concepts and methodologies to achieve high test coverage and best-in-class timing, power and area for designs working with experts in these areas to take designs to sign-off, All candidates must be authorized to work in the United States, work from our offices in Mountain View Tuesdays-Thursdays, capacity to perform job functions in compliance with U. S. export control laws without obtaining a license from U. S. export control authorities
Nice to Have
Familiarity with verification, emulation platforms and methodologies is a plus, Hands-on experience with participation in silicon debug and bring-up is a plus, hands-on experience with silicon and firmware implementations of PCIe, HBM, DMA, Die-to-die subsystems
What You'll Do.
Contribute to MatX’s silicon architecture-to-design methodology with a scalable solution across blocks
Own entire subsystem or subsets and/or chip-level silicon design deliverables from micro-architecture to sign-off ready design
Plan and drive intermediate and sign-off reviews on micro-architecture and design specifications
area and timing closure towards various silicon milestones including design freeze and tapeout
Work closely with the verification
and physical design co-owners of the subsystemlock in question and deliver best-in-class performance-power-area results
How You'll Work.
Team & Collaboration
Work closely with the verification, DFT, and physical design co-owners of the subsystemlock in question; working with experts in these areas to take designs to sign-off
Process & Methodology
Plan and drive intermediate and sign-off reviews, execution progress, area and timing closure, silicon milestones, design freeze, tapeout
Full Job Description
What MatX Is Building MatX is on a mission to be the compute platform for AGI. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the largest ML workloads for AGI. MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for these roles will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies. What You'll Do Here Contribute to MatX’s silicon architecture-to-design methodology with a scalable solution across blocks, subsystems, fullchip design Own entire subsystem or subsets and/or chip-level silicon design deliverables from micro-architecture to sign-off ready design Plan and drive intermediate and sign-off reviews on micro-architecture and design specifications, execution progress, area and timing closure towards various silicon milestones including design freeze and tapeout Work closely with the verification, DFT, and physical design co-owners of the subsystem/block in question and deliver best-in-class performance-power-area results Who You Are Concept-to-silicon experience in driving silicon design for subsystems and/or top-level functions with ASICs and SOCs from an architecture specification to production silicon 2 years or more experience with SystemVerilog, Python, C/C++ and similar scripting and programming languages for chip design and related flows Production-proven experience on silicon micro-architecture and design concepts used in high-performance compute (CPUs, GPUs, accelerators), high-speed connectivity, memory management and related functionalities Experience with testing your designs and working closely with verification teams towards performance and coverage closure goals Hands-on experience with design synthesis, equiv
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