NVIDIA

Technology

SeniorVerificationEngineer,MemorySubsystem

Bengaluru, India FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Senior Verification Engineer, Memory Subsystem at NVIDIA. Skills: Verification of complex IPs/units and sub-systems, Verification using random stimulus, Functional coverage, Assertion-based verification, Verilog, SystemVerilog, UVM/VMM. Verifying the ASIC design, architecture and micro-architecture using advanced verification methodologies. Understand the design and implementation”

What You'll Achieve.

make a lasting impact on the world

Industry & Context.

Technology
Problems you'll solve

hard to solve; analytical skills

What They're Looking For.

Must Have

4+ years of relevant experience, Experience in verification of complex IPs/units and sub-systems, Verification experience using random stimulus along with functional coverage and assertion-based verification methodologies, Expertise in Verilog, Knowledge in SystemVerilog or similar HVL, Familiarity with verification methodologies like UVM/VMM, Exposure to industry standard verification tools for simulation and debug

Nice to Have

Experience in memory subsystem or network interconnect IP verification, Scripting knowledge (Python/Perl/shell)

What You'll Do.

Verifying the ASIC design

architecture and micro-architecture using advanced verification methodologies

Understand the design and implementation

Define the verification scope

Develop the verification infrastructure

Verify the correctness of the design

Come up with test plans

tests and verification infrastructure for complex IPs/sub-systems

Responsible for performance and deadlock verification of the GPU memory subsystem unit

Build reusable bus functional models

checkers and scoreboards following coverage driven verification methodology

Perform functional coverage driven verification closure

How You'll Work.

Team & Collaboration

Working with architects, designers, and pre and post silicon verification teams; dream to work as a great teammate

Communication Scope

Good communication skills

Full Job Description

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work , to amplify human creativity and intelligence. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world! **What you’ll be doing:** * Responsible for verifying the ASIC design, architecture and micro-architecture using advanced verification methodologies. * Expected to understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design. * Come up with test plans, tests and verification infrastructure for complex IPs/sub-systems. * Responsible for performance and deadlock verification of the GPU memory subsystem unit. * Build reusable bus functional models, monitors, checkers and scoreboards following coverage driven verification methodology. * Perform functional coverage driven verification closure. * Working with architects, designers, and pre and post silicon verification teams to accomplish your tasks. **What we need to see:** * B.Tech./ M.Tech. with 4+ years of relevant experience * Experience in verification of complex IPs/units and sub-systems * Verification experience using random stimulus along with functional coverage and assertion-based verification methodologies * Expertise in Verilog * Knowledge in SystemVerilog or similar HVL * Familiarity with verification methodologies like UVM/VMM and ex

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