NVIDIA
Technology
SeniorTechnicalProgramManager–SiliconCo-Design
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“Senior Technical Program Manager – Silicon Co-Design at NVIDIA. Skills: SoC program ownership from architecture through tape-out, bring-up, and productization, hands-on knowledge of bring-up and validation, judgment to see integration risks across silicon, systems, and software, driving alignment across engineering, operations, and product, identifying dependencies and misalignment, closing risks with mitigation plans, improving organizational processes, credibility on silicon hardware logistics”
What You'll Achieve.
owning outcomes; accountable for delivery; drive alignment; close risks; improve how the organization completes work; validation and bring-up stay unblocked; improve speed, quality, and predictability
Industry & Context.
resolve scope risks with minimal disruption; make trade-off calls; find technical and schedule risks early; build mitigations with engineering
On-site in Santa Clara, CA, a minimum of three days per week
What They're Looking For.
Must Have
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent experience), 12+ years in technical roles, at least 5 years in technical program management, Deep, hands-on understanding of SoC bring-up, validation, and productization, Ability to work across the silicon–system–software boundary, Proven track record to run fast development cycles in uncertainty, Communication that is precise, direct, and right-sized for the audience, On-site in Santa Clara, CA, a minimum of three days per week
Nice to Have
Master’s degree, Used AI-style program management tools (e.g., automated status, risk flagging, dependency tracking) and can tell which tools help outcomes vs add noise, Experience working with AI/ML teams on inference infrastructure and aligning multi-functional work with go-to-market timing for AI-accelerated products, Experience with AI-assisted logistics tracking to speed bring-up and reduce manual efforts, including where those approaches stop being reliable, Can evaluate and help roll out new AI productivity tools (coding assistants, automated documentation) and make a clear case for what actually improves engineering velocity
What You'll Do.
Own program outcomes end-to-end
define and manage schedules
surface dependencies before they block work
drive multi-functional alignment from architecture review through tape-out and bring-up
accountable for delivery
Lead through design complexity
take part in critical design reviews
flag scope risks early
resolve them with minimal disruption
act as the main technical link among silicon
keep teams aligned on program goals and GTM needs
catch misalignment before it hurts the program
find technical and schedule risks early
build mitigations with engineering
move work forward with clarity and context
capture lessons from finished programs
put in place process changes that measurably improve speed
and availability of silicon
How You'll Work.
Team & Collaboration
drive multi-functional alignment from architecture review through tape-out and bring-up; act as the main technical link among silicon, systems, software, operations; keep teams aligned on program goals and GTM needs; catch misalignment before it hurts the program; build mitigations with engineering
Communication Scope
precise; direct; right-sized for the audience
Process & Methodology
program ownership, schedule management, dependency identification, risk management, trade-off calls, process improvement, execution improvement
Full Job Description
NVIDIA's Silicon Co-Design Group (SCG) sits at the intersection of architecture, silicon, systems, and manufacturing — where engineering judgment at the highest level drives real-world product outcomes at scale. We are hiring a Senior TPM who doesn't just lead programs but shapes them: A Senior TPM who has owned SoC programs from architecture through tape-out, bring-up, and productization—not by coordinating meetings, but by owning outcomes, schedules, and trade-offs. They combine deep hands-on knowledge of bring-up and validation with the judgment to see integration risks across silicon, systems, and software, and they drive alignment across engineering, operations, and product without deferring hard calls. They operate effectively when requirements and architecture are still changing. They identify dependencies and misalignment early, before crises develop. They close risks with mitigation plans that engineers respect. They improve how the organization completes work after each program. They are credible on silicon hardware logistics (silicon, boards, peripherals), so validation and bring-up stay unblocked. The exceptional hire also uses AI deliberately: they have hands-on experience with AI-powered program management tools (e.g., automated status, risk, and dependency signals) and can tell what improves outcomes versus what adds noise. This role requires on-site teamwork in Santa Clara, a minimum of three days per week. **What you 'll be doing:** * Own program outcomes end-to-end — define and manage schedules, surface dependencies before they block work, and drive multi-functional alignment from architecture review through tape-out and bring-up; you’re accountable for delivery, not only oversight. * Lead through design complexity — take part in critical design reviews, flag scope risks early, resolve them with minimal disruption, and make trade-off calls others will depend on. * Be the connective tissue — act as the main technical link among silicon, systems, sof
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