Senior/StaffAnalogDesignEngineer

ABOUT OLIX AI is growing faster than any technology in history and the explosion in demand has created a massive infrastructure gap; we can no longer build chips or power stations fast enough to keep up. The industry is still leaning on a ten-year-old hardware blueprint that has reached its limit. A new paradigm that is faster and more efficient will be the biggest economic opportunity of the next century and create the most important company of the next decade. The OLIX Decode Accelerator 1 (DX-1) is the first accelerator architected specifically for decode. Rack-scale co-design of logic, data movement, packaging, optics and interconnect enables a step change in system level performance. THE ROLE We are seeking highly skilled and motivated Senior/Staff Analog Design Engineer to contribute to the development of high-speed SerDes and mixed-signal subsystems for a next-generation SoC. This role spans the full design lifecycle, from circuit implementation through post-silicon validation, across serializers, clock generation, equalization, and supporting analog blocks, requiring strong hands-on circuit design skills and a solid grasp of high-speed signaling fundamentals. This is a highly collaborative, in-office role based in Austin, TX, working closely with cross-functional teams locally while also partnering with engineers in our London and Bristol offices to drive coordinated, global execution.   RESPONSIBILITIES - Architect and design high-speed SerDes blocks (serializers, TX drivers, TIAs, CTLEs, CDRs, deserializers, and clock generation) from specification through silicon in advanced FinFET nodes. - Perform schematic and post-layout simulations (including EM-IR and reliability simulations) to ensure robust silicon margins, and own design reviews and documentation. - Run EM simulations for passives, package interconnects, and on-die routing. - Develop behavioral and Verilog-A models to enable system-level and mixed-signal verification. - Supervise mask designers cl