NVIDIA
SeniorSignalandPowerIntegrityEngineer
“Senior Signal and Power Integrity Engineer at NVIDIA. Skills: Signal and Power Integrity (SI/PI), high-speed mixed-signal circuit design, PDN design and optimization, SI channel analysis, simulation automation, measurement and simulation correlation. Work on crafting creative Signal and Power Integrity solutions to complex system design problems. System-level power integrity simulations of NVlinks 200Gbs+, PCIe, and other HSIO such as DP2.1/HDMI2.1/CSI/USB4”
Industry & Context.
Signal and Power Integrity solutions to complex system design problems
What They're Looking For.
Must Have
BS/MS-Electrical Engineering or equivalent experience, 5+ years of industry experience, understanding of electromagnetics including transmission line theory and via properties, and the SI/PII S/Y/Z discrete signal processing knowledge, Hands on use of 3/2.5-D modeling tools like ANSYS HFSS/Q3D/SIwave, Cadence PowerSI, Experience with PDN evaluation using layout extraction tools for packages and PCBs and spice-based time domain simulations for power noise, Experience with die power delivery modeling – mixed-signal blocks & digital and associated tools like CSM/Redhawk, Raptor-X, Familiarity with voltage regulator modeling for board power supplies using simplis or spice, Familiarity with use of VNA, TDR, DSO, Familiarity with transient simulation in tools and understanding of eye diagram methodology, Have measurement and simulation correlation experience
Nice to Have
Matlab, Python, VBS, or C for simulation automation, Exposure to interface timing budgets and system modeling, SI analysis flow including frequency and time domain simulation, PDN analysis flow including model generation and time domain simulation, PSIJ Analyses involving co-simulation of circuits and PDN models, Familiarity with high-speed I/O design concepts including clock generation, transmitter & receiver design, and equalization schemes, Develop novel algorithms & new methodologies to improve SI/PII modeling efforts, Understanding of high-volume manufacturing variations and impact to channel signal integrity is a plus
What You'll Do.
Work on crafting creative Signal and Power Integrity solutions to complex system design problems
System-level power integrity simulations of NVlinks 200Gbs+
and other HSIO such as DP2.1/HDMI2.1/CSI/USB4
Design and optimize Power Delivery Network (PDN) across interposers
SI channel analysis for spec development: DP2.1/HDMI FRL2
Constant improvements of SI/PI models through lab measurements
Simulation automation
analysis and visualization using JMP
MATLAB or similar tools
Post-layout SI/PI model extraction for project review sign-off
How You'll Work.
Team & Collaboration
Opportunity to work in dynamic cross-functional role to optimize package, PCB, ASIC, mixed signal circuit
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