Analog Devices

Semiconductor

SeniorProcessIntegrationEngineer

$0–0k Beaverton, Oregon, United States FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Senior Process Integration Engineer at Analog Devices. Skills: Process Integration, Semiconductor Manufacturing, Yield Optimization. Provide technical ownership. Transfer processes from foundry”

Industry & Context.

Semiconductor
Problems you'll solve

Root-cause analysis

Eligibility Requirements

10% travel

What They're Looking For.

Must Have

5+ years semiconductor Process Engineer, 5+ years Process Integration Engineer, Master’s degree or above in Electrical Engineering, Technical foundation in wafer fabrication, Knowledge of semiconductor device physics, Communication skills, Working knowledge of statistical process control, Attention to detail, Proven root-cause analysis capability, Basic familiarity with failure analysis methodologies

Nice to Have

Foundry tape-out flows experience, Foundry NPI experience, Troubleshoot tape-out issues, Troubleshoot process-transfer issues, IC wafer fabrication engineering background, Semiconductor materials background, Manufacturing systems background, Wafer electrical test background

What You'll Do.

Provide technical ownership

Transfer processes from foundry

Execute tape-out activities

Interpret MT-form data

Validate against internal flows

Ensure correct layer generation

Ensure correct scribe selection

Ensure correct die-size matching

Ensure test-line placement

Align with established flow requirements

Identify need for new modules

Identify need for process options

Identify need for flow changes

Lead engineering teams

Investigate yield issues

Investigate defect issues

Resolve defect issues

Investigate parametric performance issues

Resolve parametric performance issues

Optimize manufacturing processes

Drive Corrective Actions

Drive Preventative Actions

Serve as technical interface

Communicate effectively

How You'll Work.

Team & Collaboration

Cross-functional teams; Process Integration; Module Engineering; Manufacturing; Quality; External foundries; Executive management; Key customers; Auditors

Communication Scope

High-visibility situations

Process & Methodology

Design of experiments (DOE), 8D processes

Full Job Description

**About Analog Devices** Analog Devices, Inc. (NASDAQ: [_ADI_](https://finance.yahoo.com/quote/ADI/?ltr=1)) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at [_www.analog.com_](https://www.analog.com/en.html) and on [_LinkedIn_](https://www.linkedin.com/company/analog-devices) and [_X_](https://x.com/ADI_News). We are seeking a highly organized and detail‑oriented **Process Integration Engineer** to support Manufacturing Operations by optimizing and transferring existing 0.18um Mixed Signal and BCD manufacturing processes, driving cross‑functional teams to resolve technical issues, and interfacing with internal and external customers. This role includes ownership of analog/mixed‑signal device processing, parametric testing, and defect analysis for legacy and new technology products. ## **Key Responsibilities** ## **Process Ownership & Technology Transfer** * Provide technical ownership of **BiCMOS and BJT‑focused manufacturing process flows** , including transferring processes from foundry to internal manufacturing site * Execute and support **tape‑out activities** for transferring legacy and new semiconductor products into the Beaverton fab. * Review and interpret **source GDS, mask lists, MT‑form data** , and validate against internal process flows and PDK structures. * Ensure correct **layer generation, scribe selection, die‑size matching, test‑line placement** , and alignment with established flow requirements. * Identify when **new modules, process options, or flow changes** are needed and work with cross‑functional integrat

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