SeniorPowerandPerformanceEngineer

NVIDIA's Silicon Co-design Group (SCG) sits at a rare intersection: we own the full product development lifecycle, from early architecture definition through silicon bringup to product release. Our ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. If you want to see your work go from whiteboard to world-class silicon, this is where that happens. **What You 'll Be Doing:** * Architect and integrate system-level performance and power management features, controllers, and policies to optimize product efficiency across datacenter and client products. * Build feature roadmaps to address low-power, low-noise, and performance-per-watt product needs through prototyping, use-case analysis, and cost/benefit trade-offs. * Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams to drive design decisions and debug complex issues. * Track industry trends and market needs and translate them into forward-looking roadmaps that keep NVIDIA's products ahead of the curve. * Lead debug efforts, develop workarounds, and support bringup, validation, manufacturing, and customer escalations. **What We Need to See:** * BS or MS in EE/CE (or equivalent experience) with 8+ years in silicon power architecture, system-level design, validation, and power/performance optimization. * Strong EE fundamentals: digital design, low power design, DVFS, control systems, power management, timing, and architecture. * Solid understanding of firmware/driver structures and HW/SW interaction. * Familiarity with clocking, boot/reset flows, and system architecture is a plus. * Hands-on lab experience (oscilloscopes, multimeters, logic analyzers) and silicon bringup exposure are a bonus. * Programming proficiency in C/C++, Python, or Perl in Windows/Linux environments. * Strong problem-solving, collaboration, and communication skills. **Ways to Stand Out in a Crow