SeniorPowerandPerformanceEngineer

NVIDIA's Silicon Co-design Group (SCG) sits at a rare intersection: we own the full product development lifecycle, from early architecture definition through silicon bringup to product release. Our ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. If you want to see your work go from whiteboard to world-class silicon, this is where that happens. **What You 'll Be Doing:** * Architect and integrate system-level performance and power management features, controllers, and policies to optimize product efficiency across datacenter and client products. * Build feature roadmaps to address low-power, low-noise, and performance-per-watt product needs through prototyping, use-case analysis, and cost/benefit trade-offs. * Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams to drive design decisions and debug complex issues. * Track industry trends and market needs and translate them into forward-looking roadmaps that keep NVIDIA's products ahead of the curve. * Lead debug efforts, develop workarounds, and support bringup, validation, manufacturing, and customer escalations. * Utilize AI-driven techniques to enhance performance prediction models and power management strategies. **What We Need to See:** * BS pr MS in EE/CE (or equivalent experience). * 8+ years of experience with a strong focus of performance and power management on one or two of below areas that optimize power for perf-per-watt efficiency in datacenter or client systems: DVFS, power gating, clock policy, sequencing, throttling, control systems, boot/reset. * Strong EE fundamentals on digital design, low power design, DVFS, control systems, power management techniques, timing, and architecture. * Knowledge of PVT dependencies, binning methodologies, and VF characterization. * Solid understanding of firmware/driver structures and HW/SW interaction with differ