NVIDIA

Technology

SeniorPowerAnalysisandOptimizationEngineer

$136–265k Santa Clara, California, United States FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Senior Power Analysis and Optimization Engineer at NVIDIA. Skills: Power analysis, Power optimization, Machine learning, LLMs. Analyze power using tools. Translate data into improvements”

What You'll Achieve.

Shape energy profile of products

Industry & Context.

Technology
Problems you'll solve

Root-cause analysis; Anomaly detection; Troubleshooting power bugs

What They're Looking For.

Must Have

MS or equivalent experience and 5 years experience, PHD plus 3 years experience, Understanding of energy consumption, Understanding of power estimation, Understanding of data movement, Understanding of low-power design, Familiarity with Verilog, Familiarity with ASIC design principles, Hands-on experience with PowerArtist, Hands-on experience with PrimePower/PrimePower RTL, Hands-on experience with RTL Architect, Solid coding skills, Automation skills, Excellent communication skills, Excellent collaboration skills

Nice to Have

Experience in machine learning, Experience in reinforcement learning, Experience in data analytics, Experience applied to EDA, Experience applied to architecture, Experience applied to system-level optimization, Interest in building LLMs, Interest in using LLMs, Experience building foundation models, Experience using foundation models, Experience as engineering copilots, Experience for EDA/power/architecture workflows, Genuine desire for data-driven decision-making, Genuine desire for AI-assisted decision-making

What You'll Do.

Analyze power using tools

Translate data into improvements

Develop power-aware models

Develop power-aware flows

Productionize power-aware models

Productionize power-aware flows

Assist engineers interpreting data

Propose candidate fixes

Recommend architectural optimizations

Recommend micro-architectural optimizations

Perform comparative power analysis

Identify optimization opportunities

Partner with Architects

Partner with Performance teams

Partner with Software teams

Partner with ASIC Design teams

Partner with Physical Design teams

Root-cause power bugs

Prototype new architectural features

Evaluate new architectural features

Fast-track power anomaly detection

Close loop between data and models

Apply AI to power optimization

Build data-driven models

Deploy data-driven models

Tune power-efficient configurations

How You'll Work.

Team & Collaboration

Cross-functional design teams; Cross-functional architecture teams

Communication Scope

Interpreting complex data; Communicating with teams

Full Job Description

We’re looking for a Senior Power Architecture & Optimization Engineer to push the limits of energy efficiency using advanced analytics and AI, including LLMs trained specifically for power analysis. NVIDIA’s leadership in accelerated computing depends on building the most energy‑efficient GPUs and SoCs in the industry. As AI and graphics workloads scale explosively, we believe that Power Analysis and Optimization driven by AI and LLMs is the future—and a key differentiator for our next generations of GPUs and Tegra SoCs. In this role, you’ll be at the center of that effort—combining power architecture expertise with machine learning, reinforcement learning, data analytics, and large language models (LLMs) to invent new ways to model, analyze, and optimize energy consumption across full‑chip and unit‑level designs. **What You’ll Be Doing:** * Analyze full‑chip and unit‑level power using internal and industry‑standard RTL and gate‑level power tools, and translate data into concrete design and architectural improvements. * Develop and productionize power‑aware models and flows, including ML/RL‑based techniques for anomaly detection, dynamic power management, and design‑space exploration. * Design and train new LLMs that “learn the art” of power analysis from design data, power reports, bug histories, and best practices—so they can: * Assist engineers in interpreting complex power data * Propose likely root causes and candidate fixes * Recommend architectural and micro‑architectural optimizations for power * Perform comparative power analysis across workloads, products, and design options to identify trends, anomalies, and optimization opportunities that aren’t obvious from first principles alone. * Partner closely with Architects, Performance, Software, ASIC Design, and Physical Design teams to interpret power data, root‑cause power bugs, and drive fixes and design changes. * Prototype and evaluate new architectural features in Verilog, with a strong focus on their pow

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