NVIDIA

AI hardware

SeniorP&RMethodologyArchitect

$168–311k Santa Clara, California, United States FULL TIME Remote Friendly
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Senior P&R Methodology Architect at NVIDIA. Skills: RTL2GDS flow architecture, physical design methodology, EDA tool expertise, Python, Perl, TCL scripting, AI/ML application in physical design. Define and own the next generation RTL2GDS flow for advanced nodes (3nm and below) and high performance GPU, CPU and SoC designs. Working directly with core P&R engine developers to define real‑world optimization problems, shape requirements and roadmaps, and provide detailed feedback on engine behavior,”

What You'll Achieve.

define and own the next generation RTL2GDS flow; rolling out next‑gen flows; consolidating ad‑hoc solutions into scalable, maintainable frameworks; driving aggressive PPA and schedule targets; adoption of new tools and flows across the company

Industry & Context.

AI hardware
Problems you'll solve

problem‑solving skills; simplifying complex, cluttered environments; modernizing legacy tools and processes; deep root‑cause analysis on QoR issues; driving methodologies to resolve the ‘long tail’ of timing closure and performance limiters

What They're Looking For.

Must Have

8+ years physical design experience, deep expertise in industry standard tools like ICC2/Innovus, PrimeTime/Tempus, etc., Extensive hands‑on P&R experience taking complex blocks or chips to tape‑out with aggressive PPA targets, Proven skills in Python, Perl, and TCL flow development, problem‑solving skills and self‑motivation, demonstrated by simplifying complex, cluttered environments and modernizing legacy tools and processes, Excellent communication and collaboration skills, with a track record of driving consensus and solving complex issues across distributed design, CAD, and R&D teams

Nice to Have

Experience collaborating with EDA or internal R&D teams on core engine development, co‑defining features, developing benchmarks and leading validation and deployment, Expertise in designing and automating A tests and large‑scale regressions, and analyzing large QoR datasets to understand trends and drive root‑cause analysis, Background in advanced‑node and large‑scale designs with exposure to advanced‑node challenges (DFM, variability, EM/IR, power integrity), Hands‑on experience applying AI/ML or GenAI to physical design, QoR analysis, or flow development will be a plus

What You'll Do.

Define and own the next generation RTL2GDS flow for advanced nodes (3nm and below) and high performance GPU

Working directly with core P&R engine developers to define real‑world optimization problems

shape requirements and roadmaps

and provide detailed feedback on engine behavior

Defining and rolling out next‑gen flows

including refactoring legacy flows and consolidating ad‑hoc solutions into scalable

maintainable frameworks used across multiple design teams

Designing and running rigorous A and multi‑variant experiments to compare flows

Developing Python‑based analytics and ML/GenAI techniques to mine large QoR datasets

recommend flow settings

and automate analysis

Performing deep root‑cause analysis on QoR issues across engines

and driving methodologies to resolve the ‘long tail’ of timing closure and performance limiters

Driving aggressive PPA and schedule targets and the adoption of new tools and flows across the company

How You'll Work.

Team & Collaboration

Partnering with architecture, RTL, DFT, synthesis, physical design, power, signoff, and CAD/methodology teams as a key technical leader and bridge; Collaborating with EDA or internal R&D teams on core engine development; Driving consensus and solving complex issues across distributed design, CAD, and R&D teams

Communication Scope

Excellent communication skills; track record of driving consensus

Full Job Description

NVIDIA's success builds on a foundation of industry leading hardware. We achieve distinction through extensive design optimization, including combining the best of external EDA with highly optimized, internal EDA tools. Our team develops these tools by fusing advances in parallel computing, machine learning, and specialized algorithms for VLSI design. We are seeking a Senior P&R Methodology Architect to define and own the next generation RTL2GDS flow for advanced nodes (3nm and below) and high performance GPU, CPU and SoC designs. You should have deep, hands‑on experience across the full RTL2GDS flow, with expertise in key stages such as RTL, DFT, synthesis, placement, optimization, CTS, routing, and signoff. Creativity and self-drive to explore is required. Our engineers enjoy unusually high intellectual freedom and the ability to explore broad roles. If you like to work across many technical areas and see your successes directly realized in the world's best AI hardware, it does not get any better than this! **What you’ll be doing:** * Working directly with core P&R engine developers to define real‑world optimization problems, shape requirements and roadmaps, and provide detailed feedback on engine behavior, QoR, and scalability. * Defining and rolling out next‑gen flows, including refactoring legacy flows and consolidating ad‑hoc solutions into scalable, maintainable frameworks used across multiple design teams. * Designing and running rigorous A/B and multi‑variant experiments to compare flows, engines, and tool settings. Developing Python‑based analytics and ML/GenAI techniques to mine large QoR datasets, recommend flow settings, and automate analysis. * Performing deep root‑cause analysis on QoR issues across engines, tools, and flows, and driving methodologies to resolve the ‘long tail’ of timing closure and performance limiters. * Partnering with architecture, RTL, DFT, synthesis, physical design, power, signoff, and CAD/methodology teams as a key technical l

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