NVIDIA
Networking
SeniorICPackagingDesignEngineer
Neural analysis suggests this role is
optimal for Senior candidates.
“Senior IC Packaging Design Engineer at NVIDIA. Skills: IC Packaging design, high-speed Interconnect systems, complex, detailed layout of IC substrates, high speed and PDN design for ASIC packages, substrate package routing, placement, stack-up, reference plane, power distribution using Cadence APD (Allegro) or SiP tools, Optimize package pin out incorporating system level trade-offs of pins assignment. implement high speed and PDN design for ASIC packages. Develop symbols, pad stack and perform ”
What You'll Achieve.
delivering and designing state of the art high-speed Interconnect systems for Supercomputers and Datacenters
Industry & Context.
system level trade-offs of pins assignment; Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations
What They're Looking For.
Must Have
5+ years hands-on in Package/PCB Layout and outing including high speed design signal integrity practices, B. Sc. Electrical Engineering or an Electrical Practical Engineer certificate or equivalent experience, Cadence APD (Allegro) or SiP tools, substrate layout of wire bond and flip chip packages
Nice to Have
Knowledge in Ansys (SIwave, HFSS) or Cadence (Sigrity, PowerSI) simulation tools, Familiarity with Skill language (Cadence) and basic parsing abilities (Python/Perl/Shell-scripting)
What You'll Do.
implement high speed and PDN design for ASIC packages
pad stack and perform substrate package routing
power distribution using Cadence APD (Allegro) or SiP tools
Optimize package pin out incorporating system level trade-offs of pins assignment
Develop methodologies to improve layout environment
and schedule considerations
How You'll Work.
Team & Collaboration
collaborate with Technical Package Lead; cooperation with different design teams; In close co-operation with the SI/PI/HW design teams and product teams
Process & Methodology
Planning, stakeholder management, leading projects from start to finish
Full Job Description
NVIDIA Networking unit has continuously reinvented itself over two decades. Our high-speed products are leading in the markets with innovative ways to improve speed and bandwidth from one generation to another. Today, we are increasingly known as the place for getting “End-to-End High-Speed Ethernet and InfiniBand Solutions. We're looking to grow our company and build our teams with smart people who can join us at the forefront of technological advancement. NVIDIA IC Packaging design team is looking for a Senior IC Packaging Design Engineer to join our package team. and focus on delivering and designing state of the art high-speed Interconnect systems for Supercomputers and Datacenters. This position will collaborate with Technical Package Lead and cooperation with different design teams and development of complex, detailed layout of IC substrates for NVIDIA products. **What you 'll be doing:** * As part of a IC Packaging design team, you will collaborate to implement high speed and PDN design for ASIC packages. * Develop symbols, pad stack and perform substrate package routing, placement, stack-up, reference plane, power distribution using Cadence APD (Allegro) or SiP tools. * Optimize package pin out incorporating system level trade-offs of pins assignment. * Develop methodologies to improve layout environment, productivity, reliability, and schedule considerations. * In close co-operation with the SI/PI/HW design teams and product teams * Planning, ensuring stakeholder management and leading projects from start to finish **What we need to see:** * B.Sc. Electrical Engineering or an Electrical Practical Engineer certificate or equivalent experience * 5+ years hands-on in Package/PCB Layout and outing experience; including high speed design signal integrity practices. * Experience in substrate layout of wire bond and flip chip packages, preferred * Knowledge in substrates or board manufacturing process * Significant background with Cadence Virtuoso and APD (Allegro
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