SeniorFPGAEmulationEngineer

Immediately Hiring with a $5000 sign on bonus! Embark on a journey with QDSS at the forefront of technological innovation as we seek talented Engineers to shape the future of cutting-edge projects and contribute to a culture of excellence and creativity. What we do matters. Quest Defense Systems & Solutions (QDSS) is seeking a Senior FPGA Emulation Engineer to build and scale hardware-accelerated verification environments for complex, safety-critical FPGA systems. This role is focused on emulation and system-level validation, not just simulation. You’ll be working with platforms like Siemens Veloce (or similar) to accelerate verification, debug full-chip behavior, and enable validation of designs that can’t realistically be verified in simulation alone. If you enjoy working close to the hardware, solving performance bottlenecks, and making large-scale FPGA systems actually testable and debuggable, this is where you want to be. Location: Remote (U. S. based) Travel: Occasional Clearance: U. S. Citizen or Permanent Resident required What You’ll Do Build and maintain FPGA emulation environments using Siemens Veloce or similar platforms Port and optimize RTL and test environments from simulation into emulation Debug complex system-level issues that only appear at scale or in hardware-accelerated environments Improve emulation performance, compile times, and runtime efficiency Integrate UVM-based environments into emulation workflows (not building UVM from scratch, but making it work in emulation) Support validation of high-speed interfaces and system-level data flows Collaborate with RTL, verification, and systems teams to resolve design and integration issues Enable full-chip and subsystem validation that cannot be achieved in simulation alone Support DO-254 verification activities, including traceability and test evidence where needed Help define best practices for emulation workflows across programs What You Bring 5+ years of experience in FPGA/ASIC verification or v