Analog Devices, Inc.

Semiconductor

SeniorEngineer,SemiPackagingEngineering

$0–0k San Jose, California, United States FULL TIME
Market Sentiment
HIGH DEMAND

Neural analysis suggests this role is
optimal for Senior candidates.

The Brief

“Senior Engineer, Semi Packaging Engineering at Analog Devices, Inc.. Skills: IC packaging, FEA software, CAD tools. Develop integrated circuit packaging solutions. Select materials for IC packages”

Industry & Context.

Semiconductor
Problems you'll solve

Root cause analysis

What They're Looking For.

Must Have

Master's degree in Mechanical Engineering, Materials Science, Electrical Engineering, Autonomy and Robotics Engineering, or related field, 2 years of experience as a Packaging Engineer or related occupation, Demonstrated Expertise in 3D CAD tools (SolidWorks), Demonstrated Expertise in FEA software ANSYS, Demonstrated Expertise in semiconductor IC or electronics assembly, Demonstrated Expertise in IC package design, optimization, and manufacturing, Demonstrated Expertise in IC package reliability requirements, failure analysis techniques, or assembly process issues, Demonstrated Expertise in manufacturing control plan, process failure mode and effects analysis (FMEA), process change notification (PCN), statistical process control (SPC), and design of experiment (DOE), Demonstrated Expertise in CAD tools such as Autocad

What You'll Do.

Develop integrated circuit packaging solutions

Select materials for IC packages

Qualify IC packaging solutions

Release IC packages to manufacturing

Perform mechanical stress simulations

Perform thermal simulations

Manage projects through design iterations

Manage substrate layout/simulation

Manage assembly of prototype

Manage qualification of IC packages

Document manufacturing process flows

Document control plans for IC packages

Establish reliability criteria

Establish qualification plan

How You'll Work.

Team & Collaboration

Cross-functional team

Communication Scope

Communicate complex engineering ideas

Process & Methodology

Project management

Full Job Description

**About Analog Devices** Analog Devices, Inc. (NASDAQ: _[ADI](http://finance.yahoo.com/q?s=ADI)_ ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at _[www.analog.com](https://www.analog.com/)_ and on _[LinkedIn](https://www.linkedin.com/company/analog-devices/posts/?feedView=all)_ and _[Twitter (X)](https://x.com/adi_news)_. **Employer:** Analog Devices, Inc. **Job Title:** Senior Engineer, Semi Packaging Engineering **Job Requisition:** 1010.1551.2 / R262672 **Job Location:** San Jose, California **Job Type:** Full Time **Rate of Pay:** $132,142 - $164,910 per year [multiple openings] **Duties:** Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions that include design, material selections, qualification, and release-to-manufacturing for various product groups. Perform component or system level mechanical stress and thermal simulations. Manage projects through development of design iterations, substrate layout/simulation, assembly of prototype, and qualification. Document manufacturing process flows and control plans for IC packages at company’s external suppliers. Work with quality and reliability groups to establish the reliability criteria and qualification plan for various end applications. Communicate complex engineering ideas to global teams simply and effectively, as rooted in engineering principles. **Requirements:** Must have a Master’s degree in Mechanical Engineering, Materials Science, Electrical Engineering, Autonomy and Robotics Engineering, or related

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