Analog Devices
Semiconductor
SeniorEngineer,DigitalDesignEngineering
Neural analysis suggests this role is
optimal for Senior candidates.
“Senior Engineer, Digital Design Engineering at Analog Devices. Skills: Design for Testability, DFT, ATPG, MBIST. Collaborate with design team. Ensure testability of integrated circuits”
Industry & Context.
Problem-solving skills
10% travel
What They're Looking For.
Must Have
4-10 years of hands-on experience in DFT methodologies, Bachelor's/Master's degree in Electrical/Electronic Engineering
Nice to Have
Master's degree in Electrical/Electronic Engineering
What You'll Do.
Collaborate with design team
Ensure testability of integrated circuits
Implement scan chains
Implement compression
Design built-in self-test structures
Implement built-in self-test structures
Conduct DFT DRC checks
Optimize testability metrics
Generate manufacturing ATPG test patterns
Generate test patterns for stuck-at
Generate test patterns for transition fault
Perform MBIST Verification
Validate DFT structures
Validate DFT patterns
Define DFT verification plans
Implement DFT verification plans
Work with physical design team
Provide DFT implementation strategy
Provide constraints strategy
Analyze test failures
Collaborate with test engineering team
Provide guidance to junior engineers
Mentor junior DFT engineers
How You'll Work.
Team & Collaboration
Design team; Verification team; Physical design team; Test engineering team
Full Job Description
**About Analog Devices** Analog Devices, Inc. (NASDAQ: [_ADI_](https://finance.yahoo.com/quote/ADI/?ltr=1)) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at [_www.analog.com_](https://www.analog.com/en.html) and on [_LinkedIn_](https://www.linkedin.com/company/analog-devices) and [_X_](https://x.com/ADI_News). **Job Description:** We are seeking a skilled and experienced DFT Engineer to join our VLSI design team. The ideal candidate should have a strong background in Design for Testability (DFT) techniques, including LBIST (Logic Built-In Self-Test), ATPG (Automatic Test Pattern Generation), DFT DRC (Design Rule Checking), MBIST (Memory Built-in Sefl-Test), Boundary Scan, JTAG and Analog/Phy DFT. **Job Location:** Bangalore **Responsibilities:** * Collaborate with the design team to ensure efficient and effective testability of complex integrated circuits. * Design and implement DFT features such as scan chains, compression, and built-in self-test structures to enhance testability. * Conduct DFT DRC checks in RTL/Netlist database to ensure compliance with DFT guidelines and rules. * Utilize Cadence/Siemen’s DFT tool to perform DFT analysis and optimize testability metrics. * Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models using on-chip test compression techniques. * MBIST Design (including repair) and Verification using Siemen’s EDA tool. * Validation of DFT structures/patterns in RTL, Netlist with and without SDF. * Work closely with the verification team to define and
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