Analog Devices, Inc.
semiconductor
SeniorEngineer,DesignVerificationEngineering
“Senior Engineer, Design Verification Engineering at Analog Devices, Inc.. Skills: SystemVerilog, UVM, Verification Planning, Debugging. Lead verification strategy. Develop UVM environments”
What You'll Achieve.
Ensure quality and reliability of products
Industry & Context.
Resolve complex design issues; Provide strategic solutions
Export licensing review process may apply
What They're Looking For.
Must Have
SystemVerilog, UVM, Test Bench Development, Verification Planning, Scripting languages, Python, Perl, TCL, Debugging, Constrained random verification, Assertion-based verification, Mixed-signal design principles, Technical Leadership
Nice to Have
Master's degree, Electrical Engineering, Computer Engineering
What You'll Do.
Lead verification strategy
Develop UVM environments
Establish verification metrics
Mentor junior engineers
Collaborate with design teams
Lead silicon bring-up
Contribute to methodology improvements
How You'll Work.
Team & Collaboration
Collaborate with design teams; Cross-functional collaboration
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