Micron Technology
Technology
SeniorEngineer-CMOS&MetallizationTestStructureDesignandLayout
Neural analysis suggests this role is
optimal for Senior candidates.
“Senior Engineer - CMOS & Metallization Test Structure Design and Layout at Micron Technology. Skills: Test Structure Design, Layout, CMOS, Metallization. Design electrical test structures. Layout electrical test structures”
Industry & Context.
problem-solving; debug
What They're Looking For.
Must Have
5 years of experience, Electrical or Microelectronic Engineering, Cadence Virtuoso Layout and Schematic Editor, Calibre, DRC, LVS, and circuit simulation (hspice), semiconductor device physics, operation, parametric testing, and Design for Manufacturability (DFM), DRAM and NAND Memory Array design architectures, Fab processes, and failure modes, problem-solving and people skills, global mindset, sense of ownership
Nice to Have
Master of Science in Electrical or Microelectronic Engineering, 3 years of experience, Proficiency in Perl, Skill code, and UNIX shell scripting languages, Willingness to learn new skills, explore unfamiliar concepts
What You'll Do.
Design electrical test structures
Layout electrical test structures
Verify electrical test structures
Support process development activities
Interpret electrical DUT definition
Implement novel solutions
Study failure mechanisms
Monitor silicon health
Assist with parametric correlation
Ensure build accuracy
Verify test structure documentation
Validate test structure documentation
Verify related parametric information
Validate related parametric information
How You'll Work.
Team & Collaboration
Cross-functional teams; Process Integration; Product and Design; Electrical Characterization; Advanced Mask Development; Design Rule teams
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, our vision is to transform how the world uses information to enrich life for all. We are a global leader in memory and storage solutions. We accelerate the transformation of information into intelligence. We encourage the world to learn, communicate, and advance faster than ever. In the Research and Development (R&D) Scribe Build Group, we drive innovation in advanced technology development through scribe test structure build, layout, and validation. Our team collaborates across multiple disciplines to enable cutting-edge semiconductor solutions. As a Scribe Design Non-Array Engineer, you will design, layout, and verify electrical test structures that enable CMOS device development, Compact modeling, Reliability, modeling and Fab process monitoring. You will partner with cross-functional teams to support process development and manufacturing integration. **Responsibilities:** * Support process development activities through memory cell-based test structure solutions by actively engaging with Process Integration, Product and Design, Electrical Characterization, Advanced Mask Development and Design Rule teams. * Interpret electrical DUT (Device under Test) definition and build completed TEGs (Test Element Groups) with high confidence functionality on Silicon. * Implement novel solutions as the need arises to study the failure mechanisms and to monitor the health of silicon. * Assist with parametric correlation and debug to ensure build accuracy. * Verify and validate test structure documentation and related parametric information. **Minimum Qualifications:** **** * Bachelor of Science in Electrical or Microelectronic Engineering with 5 years o
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