Micron Technology
Technology
SeniorDRAMRTLdesignengineer
Neural analysis suggests this role is
optimal for Senior candidates.
“Senior DRAM RTL design engineer at Micron Technology. Skills: RTL design, Memory design, AI-driven flows. Design digital IP blocks. Create RTL”
Industry & Context.
Problem-solving skills
What They're Looking For.
Must Have
3 - 6 years of experience in RTL design, Master’s degree in electrical or computer engineering, Solid knowledge of asynchronous and synchronous design concepts, Solid knowledge of CDC methodologies, Deep understanding of SoC design flows, Fundamentals in CMOS circuit design, Fundamentals in device physics, Fundamentals in memory operation, Ability to work effectively with global multi-functional teams
Nice to Have
Domain knowledge in DRAM design, Domain knowledge in NAND memory design, Experience on SoC / ASIC semicustom flow, Exposure to AI/ML-assisted design flows, Exposure to agentic AI, Exposure to advanced automation in digital design and verification, Interest in AI/ML-assisted design flows, Interest in agentic AI, Interest in advanced automation in digital design and verification, Experience working with Spyglass
What You'll Do.
Design digital IP blocks
Integrate digital IP blocks
Support physical hardware development
Define module interfaces
Review module interfaces
Define system-level architecture
Review system-level architecture
Demonstrate AI-based tools
Demonstrate agentic workflows
Demonstrate automation frameworks
Accelerate RTL design optimization
Accelerate design-space exploration
Assist in testbench generation
Assist in corner coverage
Improve debug efficiency
Define semicustom methodology
Drive full-chip integration
Integrate AI-driven flows
Collaborate with architecture teams
Collaborate with design teams
Collaborate with verification teams
Collaborate with physical design teams
Collaborate with layout teams
Oversee layout process
Manage layout process
Perform block-level verification
Perform full-chip verification
Contribute to cross-group communication
Work towards standardization
Provide technical mentorship
Participate in design reviews
Participate in methodology reviews
Drive innovation into future memory generations
Drive design methodology
How You'll Work.
Team & Collaboration
Global multi-functional teams; Architecture teams; Design teams; Verification teams; Physical design teams; Layout teams; CAD teams; EDA teams; Software teams; Cross-group communication
Full Job Description
**Our vision is to transform how the world uses information to enrich life for _all_. ** Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. **Key Responsibilities:** * Take responsibility for designing digital IP blocks from initial microarchitecture to RTL creation, integration, and supporting physical hardware development. * Define and review module interfaces and system-level architecture. * Actively demonstrate AI‑based tools, agentic workflows, and automation frameworks to: * Accelerate RTL design optimization and design‑space exploration * Assist in testbench generation and corner coverage * Improve debug efficiency across simulation and silicon learning loops * Define semicustom methodology for memory design * Drive full-chip integration including CDC, Lint, synthesis, STA and power analysis. * Collaborate with CAD, EDA, and software teams to integrate AI‑driven flows into simulation, verification, and design sign‑off environments. * Collaborate closely with architecture, design, verification, and physical design / layout teams. * Oversee and manage the layout process including floor-planning, placement, and routing. * Perform block-level and full-chip verification including functional, timing, power and reliability analysis using industry standard and Micron-specific simulators and tools. * Contribute to cross-group communication to work towards standardization and group success * Provide technical mentorship and participate in design and methodology reviews. * Drive innovation into the future memory generations and design methodology within a dynamic work environment **Minimum Qualifications** * Master’s degree in electrical or computer engineering with 3 - 6 years of experience in RTL design. * Solid knowledge of asynchronous and synchronous design concepts and CDC methodologies. * Deep und
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